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description the hcpl-7510 isolated linear current sensing ic family is designed for current sensing in low-power electronic motor drives. in a typical implement a tion, motor current fows through an external resistor and the resulting analog voltage drop is sensed by the hcpl-7510. an output voltage is created on the other side of the hcpl- 7510 optical isolation barrier. this single-ended output voltage is proportional to the motor current. since common-mode voltage swings of several hundred volts in tens of nanoseconds are common in modern switching inverter motor drives, the hcpl-7510 was designed to ignore very high common-mode transient slew rates (of at least 10 kv/s). the high cmr capability of the hcpl-7510 isolation amplifer provides the precision and stability needed to accurately monitor motor current in high noise motor control enviro n ments, providing for smoother control (less torque ripple) in various types of motor control applications. the product can also be used for general analog signal isolation applications. for general applications, we recommend the hcpl-7510 (gain tolerance of 3%). the hcpl-7510 utilizes sigma-delta ( s - d ) analog-to- digital converter technology to delivery ofset and gain accuracy and stability over time and tempe ra ture. this performance is delivered in a compact, auto-insert, 8- pin dip package that meets worl d wide regulatory safety standards. (a gull-wing surface mount option 300 is also available). features ? 15 kv/s common-mode rejection at vcm = 1000 v ? compact, auto-insertable 8-pin dip package ? 60 ppm/c gain drift vs. temperature ? C0.6 mv input ofset voltage ? 8 v/c input ofset voltage vs. temperature ? 100 khz bandwidth ? 0.06% nonlinearity, single-ended amplifer output for low power application. ? worldwide safety approval: ul 1577 (3750 vrms/1 min.), csa and iec/en/din en 60747-5-2 (option 060 only) ? advanced sigma-delta ( s - d ) a/d converter technology applications ? low-power inverter current sensing ? motor phase and rail current sensing ? switched mode power supply signal isolation ? general purpose low-power current sensing and monitoring ? general purpose analog signal isolation functional diagram caution: it is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and /or degradation which may be induced by esd. hcpl-7510 isolated linear sensing ic data sheet note: a 0.1 f bypass capacitor must be connected between pins 1 and 4 and between pins 5 and 8. lead (pb) free rohs 6 fully compliant rohs 6 fully compliant options available; -xxxe denotes a lead-free product 1 2 3 4 8 7 6 5 i dd1 v dd1 v in+ v in? gnd1 i dd2 v dd2 v out v ref gnd2 + ? + ? shield
2 package outline drawings hcpl-7510 standard dip package ordering information hcpl-7510 is ul recognized with 3750 vrms for 1 minute per ul1577. part number option package surface mount gull wing tape & reel iec/en/din en 60747-5-2 quantity rohs compliant non-rohs compliant hcpl-7510 -000e no option 300 mil dip-8 50 per tube -300e -300 x x 50 per tube -500e -500 x x x 1000 per reel -060e -060 x 50 per tube -360e -360 x x x 50 per tube -560e -560 x x x x 1000 per reel to order, choose a part number from the part number column and combine with the desired option from the option column to form an order entry. example 1: hcpl-7510-560e to order product of gull wing surface mount package in tape and reel packaging with iec/en/din en 60747-5-2 safety approval in rohs compliant. example 2: hcpl-7510 to order product of 300 mil dip package in tube packaging and non-rohs compliant. option datasheets are available. contact your avago sales representative or authorized distributor for information. 9.80 0.25 (0.386 0.010) 1.78 (0.070) max. 1.19 (0.047) max. a 7510 yyww date code 1.080 0.320 (0.043 0.013) 2.54 0.25 (0.100 0.010) 0.51 (0.020) min. 0.65 (0.025) max. 4.70 (0.185) max. 2.92 (0.115) min. dimensions in millimeters and (inches). note: floating lead protusion is 0.5 mm (20 mils) max. 5 6 7 8 4 3 2 1 5 typ. 0.20 (0.008) 0.33 (0.013) 7.62 0.25 (0.300 0.010) 6.35 0.25 (0.250 0.010) 3.56 0.13 (0.140 0.005)
3 hcpl-7510 gull wing surface mount option 300 outline drawing 0.635 0.25 (0.025 0.010) 12 nom. 0.20 (0.008) 0.33 (0.013) 9.65 0.25 (0.380 0.010) 0.635 0.130 (0.025 0.005) 7.62 0.25 (0.300 0.010) 5 6 7 8 4 3 2 1 9.80 0.25 (0.386 0.010) 6.350 0.25 (0.250 0.010) 1.080 0.320 (0.043 0.013) 3.56 0.13 (0.140 0.005) 1.780 (0.070) max. 1.19 (0.047) max. 2.54 (0.100) bsc a 7510 yyww lead coplanarity maximum: 0.102 (0.004) 1.016 (0.040) 10.9 (0.430) 2.0 (0.080) land pattern recommendation 1.27 (0.050) dimensions in millimeters (inches). tolerances (unless otherwise speci?ed): xx.xx = 0.01 xx.xxx = 0.005 note: floating lead protusion is 0.5 mm (20 mils) max.
4 solder refow temperature profle recommended pb-free ir profle note: use of non-chlorine-activated fuxes is highly recommended. note: use of non-chlorine-activated fuxes is highly recommended. 0 time (seconds) temperature (c) 200 100 50 150 100 200 250 300 0 30 sec. 50 sec. 30 sec. 160c 140c 150c peak temp. 245c peak temp. 240c peak temp. 230c soldering time 200c preheating time 150c, 90 + 30 sec. 2.5c 0.5c/sec. 3c + 1c/?0.5c tight typical loose room temperature preheating rate 3c + 1c/?0.5c/sec. reflow heating rate 2.5c 0.5c/sec. 217c ramp-down 6c/sec. max. ramp-up 3c/sec. max. 150 - 200c 260 +0/-5c t 25c to peak 60 to 150 sec. 20-40 sec. time within 5c of actual peak temperature t p t s preheat 60 to 180 sec. t l t l t smax t smin 25 t p time (seconds) temperature (c) notes: the time from 25c to peak temperature = 8 minutes max. t smax = 200c, t smin = 150c
5 iec/en/din en 60747-5-2 approved under: iec 60747-5-2:1997 + a1:2002 en 60747-5-2:2001 + a1:2002 din en 60747-5-2 (vde 0884 teil 2):2003-01. notes: 1. insulation characteristics are guaranteed only within the safety maximum ratings which must be ensured by protective circuits within the application. surface mount classifcations is class a in accordance with cecc00802. 2. refer to the optocoupler section of the isolation and control components designers cata - log, under product safety regulations section, (iec/en/din en 60747-5-2) for a detailed description of method a and method b partial dis - charge test profles. 3. refer to the following fgure for dependence of p s and i s on ambient temperature. regulatory information the hcpl-7510 has been approved by the following organizations: ul approved under ul 1577, component recognition program up to v iso = 3750 v rms . file e55361. csa approved under csa component acceptance notice #5, file ca 88324. iec/en/din en 60747-5-2 insulation characteristics [1] description symbol characteristic unit installation classifcation per din en 0110-1/1997-04, table 1 for rated mains voltage 150 v rms i C iv for rated mains voltag e 300 v rms i C iii for rated mains voltag e 600 v rms i C ii climatic classifcation 55/100/21 pollution degree (din en 0110-1/1997-04) 2 maximum working insulation voltage v iorm 891 v peak input to output test voltage, method b [2] v iorm x 1.875 = v pr , 100% production test with t m = 1 sec, partial discharge <5 pc v pr 1670 v peak input to output test voltage, method a [2] v iorm x 1.5 = v pr , type and sample test, t m = 60 sec, partial discharge <5 pc v pr 1336 v peak highest allowable overvoltage (transient overvoltage t ini = 10 sec) v iotm 6000 v peak safety-limiting values C maximum values allowed in the event of a failure. case temperature t s 175 c input current [3] i s, input 400 ma output power [3] p s, output 600 mw insulation resistance at t s , v io = 500 v r s >10 9 f output power ? p s , input current ? i s 0 0 t s ? case temperature ? c 200 600 400 25 800 50 75 100 200 150 175 125 100 300 500 700 p s (mw) i s (ma)
6 insulation and safety related specifcations parameter symbol value unit conditions minimum external air gap l(101) 7.4 mm measured from input terminals to output terminals, (clearance) shortest distance through air. minimum external tracking l(102) 8.0 mm measured from input terminals to output terminals, (creepage) shortest distance path along body. minimum internal plastic gap 0.5 mm through insulation distance conductor to conductor, (internal clearance) usually the straight line distance thickness between the emitter and detector. tracking resistance cti >175 v din iec 112 part 1 (comparative tracking index) isolation group iiia material group (din en 0110-1/1997-04) option 300 - surface mount classifcation is class a in accordance with cecc 00802. absolute maximum ratings parameter symbol min. max. units note storage temperature t s C55 125 c operating temperature t a C40 100 c supply voltage v dd1 , v dd2 0 6 v steady-state input voltage v in+ , v in- C2.0 v dd1 + 0.5 v two second transient input voltage v in+ , v in- C6.0 v dd1 + 0.5 v output voltage v out C0.5 v dd2 + 0.5 v reference input voltage v ref 0.0 v dd2 + 0.5 v reference input current i ref 20 ma lead solder temperature 260c for 10 sec., 1.6 mm below seating plane solder refow temperature profle see package outline drawings section recommended operating conditions parameter symbol min. max. units note operating temperature t a C40 85 c supply voltage v dd1 , v dd2 4.5 5.5 v input voltage (accurate and linear) v in+ , v in- C200 200 mv input voltage (functional) v in+ , v in- C2.0 2.0 v reference input voltage v ref 4.0 v dd2 v
7 electrical specifcations (dc) unless otherwise noted, all typicals and fgures are at the nominal operation conditions of v in+ = 0 v, v in- = 0 v, v ref = 4.0 v, v dd1 = v dd2 = 5.0 v and t a = 25c; all minimum/maximum specifcations are within the recommended operating conditions. test parameter symbol min. typ. max. units conditions fig. note input ofset voltage v os C6 C0.6 6 mv v in+ = 0 v 6 1 magnitude of input ofset ?vos/?t 8 20 v/c v in+ = 0 v 7 change vs. temperature gain g v ref /0.512 v ref / v ref /0.512 v/v -0.2 v < v in+ 8, 9 2 C 3% 0.512 + 3% < 0.2 v t a = 25c magnitude of gain change ?g/?t 60 300 ppm/c -0.2 v < v in+ 9 vs. temperature < 0.2 v v out 200 mv nonlinearity nl 200 0.06 0.55 % -0.2 v < v in+ 10, 3,4 < 0.2 v 11 magnitude of v out 200 mv |dnl 200 /dt| 0.0004 %/c -0.2 v < v in+ 11 nonlinearity change < 0.2 v vs. temperature v out 100 mv nonlinearity nl 100 0.04 0.4 % -0.1 v < v in+ 10, 3,5 < 0.1 v 11 input supply current i dd1 11.7 16 ma 1,2,3 output supply current i dd2 9.9 16 ma 1,2,3 reference voltage input i ref 0.26 1 ma current input current i in+ C0.6 5 a v in+ = 0 v 4 magnitude of input bias |di in /dt| 0.45 na/c current vs. termperature coefcient maximum input voltage |v in+ | max 256 mv 5 before v out clipping equivalent input impedance r in 700 kf v out output impedance r out 15 f input dc common-mode cmrr in 63 db 7 rejection ratio
8 package characteristics parameter symbol min. typ. max. units test conditions fig. note input-output momentary v iso 3750 v rms t a = 25c, rh < 50% 6 withstand voltage input-output resistance r i-o >10 9 f v i-o = 500 v input-output capacitance c i-o 1.4 pf freq = 1 mhz notes: general note: typical values were taken from a sample of nominal units operating at nominal conditions (v dd1 = v dd2 = 5 v, v ref = 4.0 v, tempera - ture = 25c) unless otherwise stated. nominal plots shown from figure 1 to 11 represented the drift of these nominal units from their nominal operating conditions. 1. input ofset voltage is defned as the dc input voltage required to obtain an output voltage of v ref /2. 2. gain is defned as the slope of the best-ft line of the output voltage vs. the diferential input voltage (v in+ - v in- ) over the specifed input range. gain is derived from v ref /512 mv; e.g. v ref = 5.0, gain will be 9.77 v/v. 3. nonlinearity is defned as half of the peak-to-peak output deviation from the best-ft gain line, expressed as a percentage of the full-scale output voltage range. 4. nl 200 is the nonlinearity specifed over an input voltage range of 200 mv. 5. nl 100 is the nonlinearity specifed over an input voltage range of 100 mv. 6. in accordance with ul1577, each optocoupler is proof tested by applying an insulation test voltage 4500 vrms for 1 second (leakage detection current limit, i i-o 5 a). this test is performed before the 100% production test for the partial discharge (method b) shown in iec/en/din en 60747-5-2 insulation characteristic table, if applicable. 7. cmrr is defned as the ratio of the diferential signal gain (signal applied diferentially between pins 2 and 3) to the common-mode gain (input pins tied together and the signal applied to both inputs at the same time), expressed in db. switching specifcations (ac) over recommended operating conditions unless otherwise specifed. parameter symbol min. typ. max. units test conditions fig. note v in to v out signal delay (50 C 10%) t pd10 2.2 4 s v in+ = 0 mv to 200 mv step 13 v in to v out signal delay (50 C 50%) t pd50 3.4 5 s v in to v out signal delay (50 C 90%) t pd90 5.2 9.9 s v out rise time (10 C 90%) t r 3.0 7 s v out fall time (10 C 90%) t f 3.2 7 s v out bandwidth (-3 db) bw 50 100 khz v in+ = 200 mv pk-pk 14 v out noise n out 31.5 mvrms v in+ = 0 v common mode transient cmti 10 15 kv/s t a = 25c, v cm = 1000 v 15 immunity
9 i dd ? supply current ? ma v dd ? supply voltage ? v 11 13 4.7 4.9 8 4.5 5.5 5.3 12 10 9 5.1 i dd1 i dd2 t a ? temperature ? c 9.5 9.0 7.5 -20 11.0 20 80 7.0 10.5 -40 100 8.5 0 40 i dd ? supply current ? ma 60 8.0 10.0 9.0 8.0 5.0 -0.2 12.0 0 0.2 4.0 11.0 -0.3 0.3 7.0 -0.1 i dd ? supply current ? ma 0.1 6.0 10.0 v in ? input voltage ? v -0.4 -0.6 -1.2 -0.2 0.2 0 0.2 -1.4 0 -0.3 0.3 -0.8 -0.1 i in ? input current ? a 0.1 -1.0 -0.2 v in ? input voltage ? v 2.5 2.0 0.5 -0.2 4.0 0 0.2 0 3.5 -0.3 0.3 1.5 -0.1 v o ? output voltage ? v 0.1 1.0 3.0 v in ? input voltage ? v dvos ? input offset change ? v v dd ? supply voltage ? v 1.0 2.5 4.7 4.9 -2.0 4.5 5.5 5.3 1.5 0 -1.5 5.1 v dd1 v dd2 2.0 0.5 -1.0 -0.5 i dd1 i dd2 i dd1 i dd2 figure 1. supply current vs. supply voltage. figure 6. input ofset change vs. supply voltage. figure 5. output voltage vs. input voltage. figure 4. input current vs. input voltage. figure 3. supply current vs. input voltage. figure 2. supply current vs. temperature.
10 figure 7. input ofset change vs. temperature. figure 11. nonlinearity vs. temperature. figure 10. nonlinearity vs. supply voltage. figure 9. gain change vs. temperature. figure 8. gain change vs. supply voltage. dv os ? input offset change ? mv t a ? temperature ? c -0.5 -20 2.0 80 -2.0 0 1.5 -40 100 20 40 -1.5 0.5 0 60 -1.0 1.0 typical maximum t a ? temperature ? c 0.3 0.2 -0.2 -20 0.7 20 80 -0.3 0.6 -40 100 0.1 0 40 dgain ? gain change ? % 60 -0.1 0.4 0 0.5 t a ? temperature ? c 0.07 -20 0.09 20 80 0.05 -40 100 0 40 nl ? nonlinearity ? % 60 0.06 0.08 dgain ? gain change ? % v dd ? supply voltage ? v 0.010 0.020 4.7 4.9 -0.010 4.5 5.5 5.3 0.015 0.005 -0.005 5.1 0 nl ? nonlinearity ? % v dd ? supply voltage ? v 0.046 0.050 4.7 4.9 0.040 4.5 5.5 5.3 0.048 0.044 0.042 5.1 v dd2 v dd1 v dd1 v dd2
11 figure 15. cmti test circuit. figure 14. bandwidth. figure 13. propagation delay vs. temperature. figure 12. propagation delay test circuit. 0.1 f v dd2 v out 8 7 6 1 3 hcpl-7510 5 2 4 0.1 f v ref v dd1 v in 0.1 f gnd1 gnd2 t a ? temperature ? c 3 -20 6 20 80 0 -40 100 0 40 t pd ? propagation delay ? s 60 2 5 4 1 tp5010 tp5050 tp5090 trise frequency ? khz -1 -2 -5 100.0 -6 1 0.1 1000.0 -3 1.0 10.0 normalized gain - db -4 0 0.1 f v dd2 v out 8 7 6 1 3 hcpl-7510 5 2 4 78l05 in out 0.1 f 0.1 f 9 v pulse gen. v cm + ? v ref
12 application information power supplies and bypassing the recommended supply connections are shown in figure 16. a foating power supply (which in many ap - plications could be the same supply that is used to drive the high-side power transistor) is regulated to 5 v using a simple zener diode (d1); the value of resistor r4 should be chosen to supply sufcient current from the existing foating supply. the voltage from the current sensing resistor (rsense) is applied to the input of the hcpl-7510 through an rc anti-aliasing flter (r2 and c2). although the application circuit is relatively simple, a few recom - mendations should be followed to ensure optimal per - formance. the power supply for the hcpl-7510 is most often obtained from the same supply used to power the power transistor gate drive circuit. if a dedicated supply is required, in many cases it is possible to add an ad - ditional winding on an existing transformer. otherwise, some sort of simple isolated supply can be used, such as a line powered transformer or a high-frequency dc-dc converter. an inexpensive 78l05 three-terminal regulator can also be used to reduce the foating supply voltage to 5 v. to help attenuate high- frequency power supply noise or ripple, a resistor or inductor can be used in series with the input of the regulator to form a low-pass flter with the regulators input bypass capacitor. figure 16. recommended supply and sense resistor connections. + motor hv hv+ r sense gate drive circuit v dd1 v in+ v in gnd1 hcpl-7510 c1 0.1 f c2 0.01 f r2 39 w r4 d1 5.1 v + 1 2 3 4 r1 floating positive supply
13 as shown in figure 17, 0.1 f bypass capacitors (c1, c2) should be located as close as possible to the pins of the hcpl-7510. the bypass capacitors are required because of the high-speed digital nature of the signals inside the hcpl-7510. a 0.01 f bypass capacitor (c2) is also rec - ommended at the input due to the switched-capacitor nature of the input circuit. the input bypass capacitor also forms part of the anti-aliasing flter, which is recom - mended to prevent high frequency noise from aliasing down to lower frequencies and interfering with the input signal. the input flter also performs an important reliabil - ity functionit reduces transient spikes from esd events fowing through the current sensing resistor. pc board layout the design of the printed circuit board (pcb) should follow good layout practices, such as keeping bypass capacitors close to the supply pins, keeping output signals away from input signals, the use of ground and power planes, etc. in addition, the layout of the pcb can also afect the isolation transient immunity (cmti) of the hcpl-7510, due primarily to stray capacitive coupling between the input and the output circuits. to obtain optimal cmti performance, the layout of the pc board should minimize any stray coupling by maintaining the maximum possible distance between the input and output sides of the circuit and ensuring that any ground or power plane on the pc board does not pass directly below or extend much wider than the body of the hcpl- 7510. figure 17. recommended hcpl-7510 application circuit. + motor hv hv+ r sense floating positive supply gate drive circuit hcpl-7510 c2 0.1 f c3 0.01 f r5 68 w r1 1 2 3 4 8 7 6 5 in out c1 0.1 f u1 78l05 c4 c5 c6 v dd1 v in+ v in gnd1 v dd2 v out v ref gnd2 a/d v ref gnd c c6 = 150 pf c4 = c5 = 0.1 f +5 v
14 current sensing resistors the current sensing resistor should have low resistance (to minimize power dissipation), low inductance (to minimize di/dt induced voltage spikes which could adversely afect operation), and reasonable tolerance (to maintain overall circuit accuracy). choosing a particular value for the resistor is usually a compromise between minimizing power dissipation and maximizing accuracy. smaller sense resistance decreases power dissipation, while larger sense resistance can improve circuit accuracy by utilizing the full input range of the hcpl-7510. the frst step in selecting a sense resistor is determining how much current the resistor will be sensing. the graph in figure 18 shows the rms current in each phase of a three-phase induction motor as a function of average motor output power (in horsepower, hp) and motor drive supply voltage. the maximum value of the sense resistor is determined by the current being measured and the maximum recommended input voltage of the isolation amplifer. the maximum sense resistance can be calculated by taking the maximum recommended input voltage and dividing by the peak current that the sense resistor should see during normal operation. for example, if a motor will have a maximum rms current of 10 a and can experience up to 50% overloads during normal operation, then the peak current is 21.1 a (=10 x 1.414 x 1.5). assuming a maximum input voltage of 200 mv, the maximum value of sense resistance in this case would be about 10 mf. the maximum average power dissipation in the sense resistor can also be easily calculated by multiplying the sense resistance times the square of the maximum rms current, which is about 1 w in the previous example. if the power dissipation in the sense resistor is too high, the resistance can be decreased below the maximum value to decrease power dissipation. the minimum value of the sense resistor is limited by precision and accuracy requirements of the design. as the resistance value is reduced, the output voltage across the resistor is also reduced, which means that the ofset and noise, which are fxed, become a larger percentage of the signal amplitude. the selected value of the sense resistor will fall somewhere between the minimum and maximum values, depending on the particular require - ments of a specifc design. when sensing currents large enough to cause signifcant heating of the sense resistor, the temperature coefcient (tempco) of the resistor can introduce nonlinearity due to the signal dependent temperature rise of the resistor. the efect increases as the resistor-to-ambient thermal resistance increases. this efect can be minimized by reducing the thermal resistance of the current sensing resistor or by using a resistor with a lower tempco. lowering the thermal resistance can be accomplished by repositioning the current sensing resistor on the pc board, by using larger pc board traces to carry away more heat, or by using a heat sink. for a two-terminal current sensing resistor, as the value of resistance decreases, the resistance of the leads become a signifcant percentage of the total resistance. this has two primary efects on resistor accuracy. first, the efective resistance of the sense resistor can become dependent on factors such as how long the leads are, how they are bent, how far they are inserted into the board, and how far solder wicks up the leads during assembly (these issues will be discussed in more detail shortly). second, the leads are typically made from a material, such as copper, which has a much higher tempco than the material from which the resistive element itself is made, resulting in a higher tempco overall. both of these efects are eliminated when a four-terminal current sensing resistor is used. a four-terminal resistor has two additional terminals that are kelvin-connected directly across the resistive element itself; these two terminals are used to monitor the voltage across the resistive element while the other two terminals are used to carry the load current. because of the kelvin connection, any voltage drops across the leads carrying the load current should have no impact on the measured voltage. figure 18. motor output horsepower vs. motor phase current and supply voltage. 15 5 40 15 20 25 30 25 motor phase current ? a (rms) 10 30 motor output power ? horsepower 5 35 0 0 10 20 35 440 380 220 120
15 when laying out a pc board for the current sensing resistors, a couple of points should be kept in mind. the kelvin connections to the resistor should be brought together under the body of the resistor and then run very close to each other to the input of the hcpl-7510; this minimizes the loop area of the connection and reduces the possibility of stray magnetic felds from interfering with the measured signal. if the sense resistor is not located on the same pc board as the hcpl-7510 circuit, a tightly twisted pair of wires can accomplish the same thing. also, multiple layers of the pc board can be used to increase current carrying capacity. numerous plated- through vias should surround each non-kelvin terminal of the sense resistor to help distribute the current between the layers of the pc board. the pc board should use 2 or 4 oz. copper for the layers, resulting in a current carrying capacity in excess of 20 a. making the current carrying traces on the pc board fairly large can also improve the sense resistors power dissipation capability by acting as a heat sink. liberal use of vias where the load current enters and exits the pc board is also recommended. sense resistor connections the recommended method for connecting the hcpl- 7510 to the current sensing resistor is shown in figure 17. vin+ (pin 2 of the hpcl-7510) is connected to the positive terminal of the sense resistor, while vin- (pin 3) is shorted to gnd1 (pin 4), with the powersupply return path functioning as the sense line to the negative terminal of the current sense resistor. this allows a single pair of wires or pc board traces to connect the hcpl- 7510 circuit to the sense resistor. by referencing the input circuit to the negative side of the sense resistor, any load current induced noise transients on the resistor are seen as a common- mode signal and will not interfere with the current-sense signal. this is important because the large load currents fowing through the motor drive, along with the parasitic inductances inherent in the wiring of the circuit, can generate both noise spikes and ofsets that are relatively large compared to the small voltages that are being measured across the current sensing resistor. if the same power supply is used both for the gate drive circuit and for the current sensing circuit, it is very important that the connection from gnd1 of the hcpl-7510 to the sense resistor be the only return path for supply current to the gate drive power supply in order to eliminate potential ground loop problems. the only direct connec - tion between the hcpl-7510 circuit and the gate drive circuit should be the positive power supply line.
16 1. the basics 1.1: why should i use the hcpl-7510 for sensing current when hall- efect sensors are available which dont need an isolated supply voltage? available in an auto-insertable, 8-pin dip package, the hcpl-7510 is smaller than and has better linearity, ofset vs. temperature and common mode rejection (cmr) performance than most hall-efect sensors. addition - ally, often the required input-side power supply can be derived from the same supply that powers the gate-drive optocoupler. 2. sense resistor and input filter 2.1: where do i get 10 m f resistors? i have never seen one that low. although less common than values above 10 f, there are quite a few manufacturers of resistors suitable for measuring currents up to 50 a when combined with the hcpl-7510. example product information may be found at dales web site (http://www.vishay.com/vishay/dale) and isoteks web site (http://www.isotekcorp.com) and iwaki musen kenkyushos website (http://www.iwaki - musen.co.jp) and micron electrics website (http://www. micron-e.co.jp). 2.2: should i connect both inputs across the sense resistor instead of grounding vin- directly to pin 4? this is not necessary, but it will work. if you do, be sure to use an rc flter on both pin 2 (vin+) and pin 3 (vin-) to limit the input voltage at both pads. 2.3: do i really need an rc flter on the input? what is it for? are other values of r and c okay? the input anti-aliasing flter (r=39 f, c=0.01 f) shown in the typical application circuit is recommended for fltering fast switching voltage transients from the input signal. (this helps to attenuate higher signal frequencies which could otherwise alias with the input sampling rate and cause higher input ofset voltage.) some issues to keep in mind using diferent flter resistors or capacitors are: 1. (filter resistor:) the equivalent input resistance for hcpl-7510 is around 700 kf. it is therefore best to ensure that the flter resistance is not a signifcant percentage of this value; otherwise the ofset voltage will be increased through the resistor divider efect. [as an example, if rflt = 5.5 kf, then vos = (vin * 1%) = 2 mv for a maximum 200 mv input and vos will vary with respect to vin.] frequently asked questions about the hcpl-7510 2. the input bandwidth is changed as a result of this diferent r-c flter confguration. in fact this is one of the main reasons for changing the input-flter r-c time constant. 3. (filter capacitance:) the input capacitance of the hcpl- 7510 is approximately 1.5 pf. for proper o p e r a t i o n the switching input-side sampling capacitors must be charged from a relatively fxed (low impedance) voltage source. therefore, if a flter capacitor is used it is best for this capacitor to be a few orders of magnitude greater than the c input (a value of at least 100 pf works well.) 2.4: how do i ensure that the hcpl-7510 is not destroyed as a result of short circuit conditions which cause voltage drops across the sense resistor that exceed the ratings of the hcpl-7510s inputs? select the sense resistor so that it will have less than 5 v drop when short circuits occur. the only other require - ment is to shut down the drive before the sense resistor is damaged or its solder joints melt. this ensures that the input of the hcpl-7510 can not be damaged by sense resistors going open-circuit. 3. isolation and insulation 3.1: how many volts will the hcpl-7510 withstand? the momentary (1 minute) withstand voltage is 3750 v rms per ul 1577 and csa component acceptance notice #5. 4. accuracy 4.1: does the gain change if the internal led light output degrades with time? no. the led is used only to transmit a digital pattern. avago technologies has accounted for led degradation in the design of the product to ensure long life. 5. miscellaneous 5.1: how does the hcpl-7510 measure negative signals with only a +5 v supply? the inputs have a series resistor for protection against large negative inputs. normal signals are no more than 200 mv in amplitude. such signals do not forward bias any junctions sufficiently to interfere with accurate operation of the switched capacitor input circuit.
for product information and a complete list of distributors, please go to our web site: www.avagotech.com avago, avago technologies, and the a logo are trademarks of avago technologies in the united states and other countries. data subject to change. copyright ? 2005-2009 avago technologies. all rights reserved. obsoletes 5989-2162en av02-0951en - april 15, 2009

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