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rev.2.0 _00 high ripple-rejection and low dropout middle-output current cmos voltage regulator s-1133 series seiko instruments inc. 1 the s-1133 series is a positive vo ltage regulator with a low dropout voltage, high output voltage accura cy, and low current consumption (300 ma output current) devel oped based on cmos technology. a 1 f small ceramic capacitor can be used *1 . it operates with lo w current consumption of 60 a typ. the s-1133 series includes an overcurrent protection circuit that prevents the out put current from exceeding the current capacitance of the out put transistor and a thermal shutdown circuit that prevents damage due to overheating. in addition to the types in which out put voltage is set inside the ic, a type for which output voltage can be set via an external resistor is added to a lineup (s-1133x00 series). sot-89-5 and super-small snt-8a packages realize high-dens ity mounting. this, in addition to low current consumption, makes the s-1133 series ideal fo r mobile devices. *1. a ceramic capacitor of 2.2 f or more can be used for products whose output voltage is 1.7 v or less. ? features ? output voltage : 1.2 to 6.0 v, selectable in 0.1 v steps. ? voltage setting via external resistor : se lectable from 1.8 to 8.2 v (s-1133b00/s-1133a00) ? input voltage range : 2.0 to 10 v ? high-accuracy output voltage : 1.0% accuracy (1.2 to 1.4 v output product : 15 mv accuracy) ? low dropout voltage : 130 mv typ. (3.0 v output product, i out = 100 ma) ? low current consumption : during operation : 60 a typ., 90 a max. during shutdown : 0.1 a typ., 1.0 a max. ? output current : 300 ma output is possible (at v in v out(s) + 1.0 v) *1 ? low esr capacitor can be used : a ceramic capacitor of 1.0 f or more can be used for the input and output capacitors. (a ceramic capacitor of 2.2 f or more can be used for products whose output voltage is 1.7 v or less.) ? high ripple rejection : 70 db typ. (at 1.0 khz, v out = 1.2 v) ? built-in overcurrent protection circuit : over current of output transis tor can be restricted. ? built-in thermal shutdown circuit : prevents damage due to overheating. ? built-in on/off circuit : ensures long battery life. ? small package : sot-89-5, snt-8a ? lead-free products *1. attention should be paid to the power dissipation of the package when the out put current is large. ? applications ? power supply for battery-powered devices ? power supply for communication devices ? power supply for home electric appliances ? packages drawing code package name package tape reel land sot-89-5 up005-a up005-a up005-a up005-a snt-8a ph008-a ph008-a ph008-a ?
high ripple-rejection and low dropout middle-output current cmos voltage regulator s-1133 series rev.2.0 _00 2 seiko instruments inc. ? block diagrams 1. types in which output voltage is internally set (s-1133x12 to s-1133x60) *1. parasitic diode *1 on/off vin vss vout reference voltage circuit on/off circuit overcurrent protection circuit thermal shutdown circuit figure 1 2. types in which output voltage is externally set (s-1133b00 and s-1133a00 only) *1. parasitic diode *1 on/off vin vss vout reference voltage circuit on/off circuit overcurrent protection circuit thermal shutdown circuit vadj figure 2
high ripple-rejection and low dropout middle-output current cmos voltage regulator rev.2.0 _00 s-1133 series seiko instruments inc. 3 ? product name structure ? the product types, output voltage, and package types for t he s-1133 series can be select ed at the user?s request. refer to the ? product name ? for the meanings of the char acters in the product name and ? product name list ? for the full product names. 1. product name s-1133 x xx - xxxx g package abbreviation and packing specifications *1 u5t1 : sot-89-5, tape i8t1 : snt-8a, tape output voltage 00 : externally set 12 to 60 : internally set (e.g., when the output voltage is 1. 2 v, it is expressed as 12.) product type *2 a : on/off pin negative logic b : on/off pin positive logic *1. refer to the taping specific ations at the end of this book. *2. refer to ?3. shutdown pin (on/off pin)? in ?operation?.
high ripple-rejection and low dropout middle-output current cmos voltage regulator s-1133 series rev.2.0 _00 4 seiko instruments inc. 2. product name list table 1 (1/2) output voltage sot-89-5 snt-8a externally set s-1133b00-u5t1g s-1133b00-i8t1g 1.2 v 15 mv s-1133b12-u5t1g s-1133b12-i8t1g 1.3 v 15 mv s-1133b13-u5t1g s-1133b13-i8t1g 1.4 v 15 mv s-1133b14-u5t1g s-1133b14-i8t1g 1.5 v 1.0% s-1133b15-u5t1g s-1133b15-i8t1g 1.6 v 1.0% s-1133b16-u5t1g s-1133b16-i8t1g 1.7 v 1.0% s-1133b17-u5t1g s-1133b17-i8t1g 1.8 v 1.0% s-1133b18-u5t1g s-1133b18-i8t1g 1.9 v 1.0% s-1133b19-u5t1g s-1133b19-i8t1g 2.0 v 1.0% s-1133b20-u5t1g s-1133b20-i8t1g 2.1 v 1.0% s-1133b21-u5t1g s-1133b21-i8t1g 2.2 v 1.0% s-1133b22-u5t1g s-1133b22-i8t1g 2.3 v 1.0% s-1133b23-u5t1g s-1133b23-i8t1g 2.4 v 1.0% s-1133b24-u5t1g s-1133b24-i8t1g 2.5 v 1.0% s-1133b25-u5t1g s-1133b25-i8t1g 2.6 v 1.0% s-1133b26-u5t1g s-1133b26-i8t1g 2.7 v 1.0% s-1133b27-u5t1g s-1133b27-i8t1g 2.8 v 1.0% s-1133b28-u5t1g s-1133b28-i8t1g 2.9 v 1.0% s-1133b29-u5t1g s-1133b29-i8t1g 3.0 v 1.0% s-1133b30-u5t1g s-1133b30-i8t1g 3.1 v 1.0% s-1133b31-u5t1g s-1133b31-i8t1g 3.2 v 1.0% s-1133b32-u5t1g s-1133b32-i8t1g 3.3 v 1.0% s-1133b33-u5t1g s-1133b33-i8t1g 3.4 v 1.0% s-1133b34-u5t1g s-1133b34-i8t1g 3.5 v 1.0% s-1133b35-u5t1g s-1133b35-i8t1g 3.6 v 1.0% s-1133b36-u5t1g s-1133b36-i8t1g 3.7 v 1.0% s-1133b37-u5t1g s-1133b37-i8t1g 3.8 v 1.0% s-1133b38-u5t1g s-1133b38-i8t1g 3.9 v 1.0% s-1133b39-u5t1g s-1133b39-i8t1g 4.0 v 1.0% s-1133b40-u5t1g s-1133b40-i8t1g 4.1 v 1.0% s-1133b41-u5t1g s-1133b41-i8t1g 4.2 v 1.0% s-1133b42-u5t1g s-1133b42-i8t1g 4.3 v 1.0% s-1133b43-u5t1g s-1133b43-i8t1g 4.4 v 1.0% s-1133b44-u5t1g s-1133b44-i8t1g 4.5 v 1.0% s-1133b45-u5t1g s-1133b45-i8t1g 4.6 v 1.0% s-1133b46-u5t1g s-1133b46-i8t1g 4.7 v 1.0% s-1133b47-u5t1g s-1133b47-i8t1g 4.8 v 1.0% s-1133b48-u5t1g s-1133b48-i8t1g 4.9 v 1.0% s-1133b49-u5t1g s-1133b49-i8t1g 5.0 v 1.0% s-1133b50-u5t1g s-1133b50-i8t1g 5.1 v 1.0% s-1133b51-u5t1g s-1133b51-i8t1g 5.2 v 1.0% s-1133b52-u5t1g s-1133b52-i8t1g 5.3 v 1.0% s-1133b53-u5t1g s-1133b53-i8t1g 5.4 v 1.0% s-1133b54-u5t1g s-1133b54-i8t1g 5.5 v 1.0% s-1133b55-u5t1g s-1133b55-i8t1g 5.6 v 1.0% s-1133b56-u5t1g s-1133b56-i8t1g
high ripple-rejection and low dropout middle-output current cmos voltage regulator rev.2.0 _00 s-1133 series seiko instruments inc. 5 table 1 (2/2) output voltage sot-89-5 snt-8a 5.7 v 1.0% s-1133b57-u5t1g s-1133b57-i8t1g 5.8 v 1.0% s-1133b58-u5t1g s-1133b58-i8t1g 5.9 v 1.0% s-1133b59-u5t1g s-1133b59-i8t1g 6.0 v 1.0% s-1133b60-u5t1g s-1133b60-i8t1g remark please contact our sales office for type a products.
high ripple-rejection and low dropout middle-output current cmos voltage regulator s-1133 series rev.2.0 _00 6 seiko instruments inc. ? pin configurations table 2 pin no. symbol description vadj output voltage adjustment pin (s-1133b00/s-1133a00 only) 1 nc *1 no connection (s-1133x12 to s-1133x60) 2 vss gnd pin 3 on/off shutdown pin 4 vin voltage input pin 5 vout voltage output pin 5 4 1 3 2 sot-89-5 top vie w *1. the nc pin is electrically open. the nc pin can be connected to vin or vss. figure 3 table 3 pin no. pin name functions 1 vout *1 voltage output pin 2 vout *1 voltage output pin nc *2 no connection (s-1133x12 to s-1133x60) 1 2 3 4 snt-8a top view 8 7 6 5 3 vadj output voltage adjustment pin (s-1133b00/s-1133a00 only) 4 nc *2 no connection 5 vss gnd pin figure 4 6 on/off shutdown pin 7 vin *3 voltage input pin 8 vin *3 voltage input pin *1. although pins of number 1 and 2 are connected internally, be sure to short-circuit them nearest in use. *2. the nc pin is electrically open. the nc pin can be connected to vin or vss. *3. although pins of number 7 and 8 are connected internally, be sure to short-circuit them nearest in use.
high ripple-rejection and low dropout middle-output current cmos voltage regulator rev.2.0 _00 s-1133 series seiko instruments inc. 7 ? absolute maximum ratings table 4 (ta = 25 c unless otherwise specified) item symbol absolute maximum rating unit v in v ss ? 0.3 to v ss + 12 v v on/off v ss ? 0.3 to v ss + 12 v input voltage v adj v ss ? 0.3 to v ss + 12 v output voltage v out v ss ? 0.3 to v in + 0.3 v sot-89-5 1000 *1 mw power dissipation snt-8a p d 450 *1 mw operating ambient temperature t opr ? 40 to + 85 c storage temperature t stg ? 40 to + 125 c *1. when mounted on printed circuit board [mounted board] (1) board size : 114 mm 76 mm t1.6 mm (2) board name : jedec standard51-7 caution the absolute maximum ra tings are rated values exceeding whic h the product could suffer physical damage. these values must therefor e not be exceeded under any conditions. 0 50 100 150 1200 800 0 power dissipation (p d ) [mw] ambient temperature (ta) [ c] 400 snt-8a sot-89-5 figure 5 power dissipation of packages (mount ed on printed circuit board) caution the thermal shutdown ci rcuit may operate when the j unction temperature is around 150 c.
high ripple-rejection and low dropout middle-output current cmos voltage regulator s-1133 series rev.2.0 _00 8 seiko instruments inc. ? electrical characteristics 1. types in which output voltage is internally set (s-1133x12 to s-1133x60) table 5 (ta = 25 c unless otherwise specified) item symbol conditions min. typ. max. unit test circuit output voltage *1 v out(e) 1.2 v v out(s) 1.4 v v out(s) ? 0.015 v out(s) v out(s) + 0.015 v 1 v in = v out(s) + 1.0 v, i out = 100 ma 1.5 v v out(s) 6.0 v v out(s) 0.99 v out(s) v out(s) 1.01 v 1 output current *2 i out v in v out(s) + 1.0 v 300 *5 ? ? ma 3 dropout voltage *3 v drop i out = 100 ma v out(s) = 1.2 v 0.8 0.84 0.88 v 1 v out(s) = 1.3 v ? 0.74 0.78 v 1 v out(s) = 1.4 v ? 0.64 0.68 v 1 1.5 v v out(s) 1.9 v ? 0.54 0.58 v 1 2.0 v v out(s) 2.4 v ? 0.15 0.23 v 1 2.5 v v out(s) 2.9 v ? 0.14 0.21 v 1 3.0 v v out(s) 3.2 v ? 0.13 0.19 v 1 3.3 v v out(s) 6.0 v ? 0.10 0.15 v 1 line regulation out in out1 v v v ? ? ? v out(s) + 0.5 v v in 10 v, i out = 100 ma ? 0.02 0.2 %/v 1 load regulation ? v out2 v in = v out(s) + 1.0 v, 1.0 ma i out 100 ma ? 15 40 mv 1 output voltage temperature coefficient *4 out out v ta v ? ? ? v in = v out(s) + 1.0 v, i out = 30 ma, ? 40 c ta 85 c ? 130 ? ppm/ c 1 current consumption during operation i ss1 v in = v out(s) + 1.0 v, on/off pin = on, no load ? 60 90 a 2 current consumption during shutdown i ss2 v in = v out(s) + 1.0 v, on/off pin = off, no load ? 0.1 1.0 a 2 input voltage v in ? 2.0 ? 10 v ? shutdown pin input voltage ?h? v sh v in = v out(s) + 1.0 v, r l = 1.0 k ? 1.5 ? ? v 4 shutdown pin input voltage ?l? v sl v in = v out(s) + 1.0 v, r l = 1.0 k ? ? ? 0.25 v 4 shutdown pin input current ?h? i sh v in = v out(s) + 1.0 v, v on/off = 7 v ? 0.1 ? 0.1 a 4 shutdown pin input current ?l? i sl v in = v out(s) + 1.0 v, v on/off = 0 v ? 0.1 ? 0.1 a 4 1.2 v v out(s) 1.5 v ? 70 ? db 5 1.6 v v out(s) 3.0 v ? 65 ? db 5 ripple rejection rr v in = v out(s) + 1.0 v, f = 1.0 khz, ? v rip = 0.5 vrms, i out = 50 ma 3.1 v v out(s) 6.0 v ? 60 ? db 5 short-circuit current i short v in = v out(s) + 1.0 v, on/off pin = on, v out = 0 v ? 200 ? ma 3 thermal shutdown detection temperature t sd junction temperature ? 150 ? c ? thermal shutdown release temperature t sr junction temperature ? 120 ? c ?
high ripple-rejection and low dropout middle-output current cmos voltage regulator rev.2.0 _00 s-1133 series seiko instruments inc. 9 *1. v out(s) : specified output voltage v out(e) : actual output volt age at the fixed load the output voltage when fixing i out ( = 100 ma) and inputting v out(s) + 1.0 v *2. the output current at which t he output voltage becomes 95% of v out(e) after gradually increasing the output current. *3. v drop = v in1 ? (v out3 0.98) v out3 is the output voltage when v in = v out(s) + 1.0 v and i out = 100 ma. v in1 is the input voltage at which t he output voltage bec omes 98% of v out3 after gradually decreasing the input voltage. *4. the change in temperature [mv/c] is calculated using the following equation. [] [] [] 1000 c ppm/ v ? ta ? v v v c mv/ ? ta ? v out out out(s) out ? = *3 *2 *1 *1. the change in temperatur e of the output voltage *2. specified output voltage *3. output voltage temperature coefficient *5. the output current can be at least this value. due to restrictions on the pa ckage power dissipation, this value may not be satisfied. attention should be paid to the power dissipation of the package w hen the output current is large. this specification is guaranteed by design.
high ripple-rejection and low dropout middle-output current cmos voltage regulator s-1133 series rev.2.0 _00 10 seiko instruments inc. 2. types in which output voltage is externally set (s-1133b00 and s-1133a00 only) table 6 (ta = 25 c unless otherwise specified) item symbol conditions min. typ. max. unit test circuit output voltage of adjust pin *1 v vadj v vadj = v out , v in = v out(s) + 1.0 v, i out = 100 ma 1.782 1.800 1.818 v 6 output voltage range v rout ? 1.8 ? 8.2 v 11 internal resistance value of adjust pin r vadj ? ? 200 ? k ? ? output current *2 i out v in v out(s) + 1.0 v 300 *5 ? ? ma 8 dropout voltage *3 v drop i out = 100 ma, v vadj = v out , v out(s) = 1.8 v ? 0.24 0.88 v 6 line regulation out in out1 v v v ? ? ? v vadj = v out , v out(s) + 0.5 v v in 10 v, i out = 100 ma ? 0.02 0.2 %/v 6 load regulation ? v out2 v vadj = v out , v in = v out(s) + 1.0 v, 1.0 ma i out 100 ma ? 15 40 mv 6 output voltage temperature coefficient *4 out out v ta v ? ? ? v in = v out(s) + 1.0 v, i out = 30 ma, ? 40 c ta 85 c ? 130 ? ppm/ c 6 current consumption during operation i ss1 v in = v out(s) + 1.0 v, v out = v vadj , on/off pin = on, no load ? 60 90 a 7 current consumption during shutdown i ss2 v in = v out(s) + 1.0 v, v out = v vadj , on/off pin = off, no load ? 0.1 1.0 a 7 input voltage v in ? 2.0 ? 10 v ? shutdown pin input voltage ?h? v sh v in = v out(s) + 1.0 v, r l = 1.0 k ? 1.5 ? ? v 9 shutdown pin input voltage ?l? v sl v in = v out(s) + 1.0 v, r l = 1.0 k ? ? ? 0.25 v 9 shutdown pin input current ?h? i sh v in = v out(s) + 1.0 v, v on/off = 7 v ? 0.1 ? 0.1 a 9 shutdown pin input current ?l? i sl v in = v out(s) + 1.0 v, v on/off = 0 v ? 0.1 ? 0.1 a 9 ripple rejection rr v vadj = v out , v in = v out(s) + 1.0 v, f = 1.0 khz, ? v rip = 0.5 vrms, i out = 50 ma, v out(s) = 1.8 v ? 65 ? db 10 short-circuit current i short v in = v out(s) + 1.0 v, on/off pin = on, v out = 0 v ? 200 ? ma 8 thermal shutdown detection temperature t sd junction temperature ? 150 ? c ? thermal shutdown release temperature t sr junction temperature ? 120 ? c ?
high ripple-rejection and low dropout middle-output current cmos voltage regulator rev.2.0 _00 s-1133 series seiko instruments inc. 11 *1. v out(s) : extarnal setting reference voltage ( = 1.8 v) *2. the output current at which t he output voltage becomes 95% of v vadj after gradually increasing the output current. *3. v drop = v in1 ? (v out3 0.98) v out3 is the output voltage when v in = v out(s) + 1.0 v and i out = 100 ma. v in1 is the input voltage at which t he output voltage bec omes 98% of v out3 after gradually decreasing the input voltage. *4. the change in temperature [mv/ c] is calculated usi ng the following equation. [] [] [] 1000 c ppm/ v ? ta ? v v v c mv/ ? ta ? v out out out(s) out ? = *3 *2 *1 *1. the change in temperatur e of the output voltage *2. extarnal setting reference voltage *3. output voltage temperature coefficient *5. the output current can be at least this value. due to restrictions on the pack age power dissipation, this value may not be satisfied. attention should be paid to the power dissipation of the package w hen the output current is large. this specification is guaranteed by design.
high ripple-rejection and low dropout middle-output current cmos voltage regulator s-1133 series rev.2.0 _00 12 seiko instruments inc. ? test circuits 1. vss vout on/off vin v a set to power on + + figure 6 2. vss vout on/off vin set to v in or gnd a + figure 7 3. vss vout on/off vin v a set to power on + + figure 8 4. vss vout on/off vin a v r l + + figure 9 5. vss vout on / off vin v + set to power on r l figure 10
high ripple-rejection and low dropout middle-output current cmos voltage regulator rev.2.0 _00 s-1133 series seiko instruments inc. 13 6. vss vout on/off vin v a set to power on + + vadj figure 11 7. vss vout on/off vin set to v in or gnd a vadj + figure 12 8. vss vout on/off vin v a set to power on + + vadj figure 13 9. vss vout on / off vin v a r l + + vadj figure 14 10. vss vout on / off vin v + set to power on r l vadj figure 15 11. vss vout on/off vin v a set to power on + + vadj figure 16
high ripple-rejection and low dropout middle-output current cmos voltage regulator s-1133 series rev.2.0 _00 14 seiko instruments inc. ? standard circuit vss vout on/off vin c in *1 c l * 2 input output gnd single gnd *1. c in is a capacitor for stabilizing the input. a ceramic capacitor of 2.2 f or more can be used as the output capacitor for products whose output volt age is 1.7 v or less. *2. a ceramic capacitor of 1.0 f or more can be used for c l . a ceramic capacitor of 2.2 f or more can be used as the output capacitor for products whose output volt age is 1.7 v or less. figure 17 caution the above connection diag ram and constant will not guarantee successful operation. perform thorough evaluation using the actual application to set the constant. ? application conditions input capacitor (c in ) : 1.0 f or more *1 output capacitor (c l ) : 1.0 f or more *1 esr of output capacitor : 1.0 ? or less *1. 2.2 f or more for products whose output voltage is 1.7 v or less caution a general series regulator may oscillate, depending on the ext ernal components selected. check that no oscillation occurs with the application using the above capacitor. ? selection of input and output capacitors (c in , c l ) the s-1133 series requires an output capac itor between the vout and vss pins fo r phase compensation. operation is stabilized by a ceramic capacitor with an output c apacitance of 1.0 f or more *1 in the entire temperat ure range. however, when using an os capacitor, tantal um capacitor, or aluminum electrolytic capac itor, a capacitor with a capacitance of 1.0 f or more and an equivalent series resistance (esr) of 1.0 ? or less is required. the value of the output overs hoot or undershoot transient re sponse varies depending on the val ue of the output capacitor. perform thorough evaluation using t he actual application, including te mperature characteristics. *1. the capacitance is 2.2 f or more for products whose out put voltage is 1.7 v or less.
high ripple-rejection and low dropout middle-output current cmos voltage regulator rev.2.0 _00 s-1133 series seiko instruments inc. 15 ? explanation of terms 1. low dropout voltage regulator the low dropout voltage regulat or is a voltage regulator whose dropout voltage is low due to its built-in low on- resistance transistor. 2. low esr a capacitor whose esr (equivalent se ries resistance) is low. the s- 1133 series enables use of a low esr capacitor, such as a ceramic capacit or, for the output-side capacitor c l . a capacitor whose esr is 1.0 ? or less can be used. 3. output voltage (v out ) the accuracy of the out put voltage is ensured at 1.0% under the specified condi tions of fixed input voltage *1 , fixed output current, and fixed temperature. *1. differs depending on the product. caution if the above conditions change, the output voltage value may vary and exceed the accuracy range of the output voltage. please see th e electrical character istics and attached characteristics data for details. remark in the types of the s-1133 series in which the output voltage is 1.2 to 1.4 v, the output voltage accuracy is 15 mv. 4. line regulation ? v in ? v out1 ? v out indicates the dependency of the out put voltage on the input voltage. that is, the values show how much the output voltage changes due to a change in the input volt age with the output curr ent remaining unchanged. 5. load regulation ( ? v out2 ) indicates the dependency of the output voltage on the out put current. that is, the values show how much the output voltage changes due to a change in the output current with t he input voltage remaining unchanged. 6. dropout voltage (v drop ) indicates the difference between the input voltage v in1 , which is the input voltage (v in ) at the point where the output voltage has fallen to 98% of the output voltage value v out3 after v in was gradually decreased from v in = v out(s) + 1.0 v, and the output vo ltage at that point (v out3 0.98). v drop = v in1 ? (v out3 0.98)
high ripple-rejection and low dropout middle-output current cmos voltage regulator s-1133 series rev.2.0 _00 16 seiko instruments inc. 7. temperature coefficient of output voltage ? ta ? v out ? v out the shadowed area in figure 18 is the range where v out varies in the operating temperature range when the temperature coefficient of the output voltage is 130 ppm/ c. v out ( e ) *1 ex. s-1133b30 typ. ? 40 25 + 0.39 mv/ c v out [v] *1. v out(e) is the value of the output voltage measured at 25 c. 85 ta [ c] ? 0.39 mv/ c figure 18 a change in the temperature of t he output voltage [mv/c] is calcul ated using the following equation. [] [] [] c ppm/ v ta v v v c mv/ ta v out out out(s) out ? ? ? = ? ? 3 * 2 * *1 1000 *1. change in temperat ure of output voltage *2. specified output voltage *3. output voltage tem perature coefficient
high ripple-rejection and low dropout middle-output current cmos voltage regulator rev.2.0 _00 s-1133 series seiko instruments inc. 17 ? operation 1. basic operation figure 19 shows the block diagram of the s-1133 series. the error amplifier compar es the reference voltage (v ref ) with v fb , which is the output vo ltage resistance-divided by feedback resistors r s and r f . it supplies the output transistor with the gate voltage necessary to ensure a certain output voltage free of any fluctuations of input voltage and temperature. current supply reference voltage circuit vout *1 *1. parasitic diode vss vin r s r f error amplifier v ref ? + v fb figure 19 2. output transistor the s-1133 series uses a low on-resistance p- channel mos fet as the output transistor. be sure that v out does not exceed v in + 0.3 v to prevent the voltage regulator from being damaged due to inverse current flowing from the vout pin th rough a parasitic diode to the vin pin.
high ripple-rejection and low dropout middle-output current cmos voltage regulator s-1133 series rev.2.0 _00 18 seiko instruments inc. 3. shutdown pin (on/off pin) this pin starts and stops the regulator. when the on/off pin is set to the shutdown level, the operati on of all internal circuits stops, and the built-in p-channel mos fet output transistor between the vin pin and vout pi n is turned off to substantially reduce the current consumption. the vout pin becomes the v ss level due to the internally divided resistance of several hundreds k ? between the vout pin and vss pin. the structure of the on/off pin is as shown in figure 20 . since the on/off pin is neither pulled down nor pulled up internally, do not use it in the floating state. in addition, note that the current consumption increases if a voltage of 0.3 v to v in ? 0.3 v is applied to the on/off pin. when the on/off pin is not used, connect it to the vss pin if the logic type is ?a? and to the vin pin if it is ?b?. table 7 logic type on/off pin internal circuits vout pin voltage current consumption a ?l?: power on operating set value i ss1 a ?h?: power off stopped v ss level i ss2 b ?l?: power off stopped v ss level i ss2 b ?h?: power on operating set value i ss1 vss on/off vin figure 20
high ripple-rejection and low dropout middle-output current cmos voltage regulator rev.2.0 _00 s-1133 series seiko instruments inc. 19 4. thermal shutdown circuit the s-1133 series implements a thermal shutdown circuit to protect the device from damage due to overheating. when the junction temperature rises to 150 c (typ.), the thermal shutdown circui t operates and the regulator operation stops. when the junction temperature drops to 120 c (typ.), the thermal shutdown circuit is released and the regulator operation resumes. if the thermal shutdown circuit starts operating due to self -heating, the regulator operation stops and the output voltage falls. when the regulator operation has stopped, no self-heat is generated and the tem perature of the ic is lowered. when the temperature has dropped, the t hermal shutdown circuit is released, the regulator operation resumes, and self-heat is generated again. by repeating this procedur e, the output voltage waveform forms pulses. this phenomenon, stopping and resuming the regulator operation, c ontinues until the internal power consumption is reduced by reducing either the input voltage or output curr ent or both, or the ambient temperature is lowered. table 8 thermal shutdown circuit vout pin voltage operating : 150 c (typ.) *1 v ss level released : 120 c (typ.) *1 set value *1. junction temperature 5. externally setting output voltage the s-1133 series provides the types in which output vo ltage can be set via the external resistor (s-1133b00/s- 1133a00). with such types, the external voltage can be optionally set between 1.8 v and 8.2 v by connecting a resistor (r a ) between the vout and vadj pins and a resistor (r b ) between the vadj and vss pins. the output voltage to be set is determined by the following formulas. v out = 1.8 + r a l a (1) by substituting i a = i vadj + 1.8/r b to above formula (1), v out = 1.8 + r a (i vadj + 1.8/r b ) = 1.8 (1.0 + r a /r b ) + r a i vadj (2) in above formula (2), r a i vadj is a factor for the output voltage error. whether the output voltage error is minute is judged depending on the following (3) formula. by substituting i vadj = 1.8/r vadj to r a i vadj v out = 1.8 (1.0 + r a /r b ) + 1.8 r a /r vadj (3) if r vadj is sufficiently larger than r a , the error is judged as minute. vss vout vin vadj v out r a r b i a i b r vadj i vadj 1.8 v figure 21 the following expression is in order to determine output voltage v out = 3.0 v. if resistance r b = 2 k ? , substitute internal resistance in adjust pin r vadj = 200 ? (typ.) into (3), resistance r a = (3.0/1.8-1) ((2 k 200 k)/(2 k + 200 k)) P 1.3 k ? caution the above connection diag rams and constants w ill not guarantee successful operation. perform thorough evaluation using the actual application to set the constants.
high ripple-rejection and low dropout middle-output current cmos voltage regulator s-1133 series rev.2.0 _00 20 seiko instruments inc. ? precautions ? wiring patterns for the vin, vout and gnd pins s hould be designed so that the impedance is low. when mounting an output c apacitor between the vout and vss pins (c l ) and a capacitor for stab ilizing the input between vin and vss pins (c in ), the distance from the capacitors to t hese pins should be as short as possible. ? when setting the output voltage using the external resistor, connect the resistors, r a between the vout and vadj pins and r b between the vadj and vss pins close to the respective pins. ? note that the output voltage may increase when a series r egulator is used at low load current (1.0 ma or less). ? note that the output voltage may increase due to driv er leakage when a series regulator is used at high temperatures. ? a general series regulator may oscillate, depending on the ex ternal components selected. the following conditions are recommended for this ic. however, be sure to perform sufficient evaluation under the actual usage conditions for selection, including evaluation of temperature characteristics. input capacitor (c in ) : 1.0 f or more *1 output capacitor (c l ) : 1.0 f or more *1 equivalent series resistance (esr) : 1.0 ? or less *1. the capacitance is 2.2 f or more for products whose output voltage is 1.7 v or less. ? the voltage regulator may oscillate w hen the impedance of the power supply is high and the i nput capacitor is small or an input capacitor is not connected. ? the power supply fluctuation and load fl uctuation characteristics become wors e. it is therefore important to sufficiently evaluate the output voltage fluctuation in the actual equipment. ? if the power supply suddenly increases shar ply, a momentary overshoot may be out put. it is therefore important to sufficiently evaluate the output voltage at power application in the actual equipment. ? when the thermal shutdown circuit starts operating and t he regulator stops, input voltage may exceed the absolute maximum ratings. it will be affected largely when input voltage, output current and induct ance of power supply are high. perform thorough evaluation using the actual application. ? the application conditions for the input voltage, output voltage, and load current should not exceed the package power dissipation. ? do not apply an electrostatic discharge to this ic that ex ceeds the performance ratings of the built-in electrostatic protection circuit. ? in determining the output current, attention should be paid to the output current value specified in tables 5 and 6 in ?electrical characteristics? and footnote *5 of the table. ? sii claims no responsibility for any dis putes arising out of or in connecti on with any infringement by products including this ic of patents owned by a third party.
high ripple-rejection and low dropout middle-output current cmos voltage regulator rev.2.0 _00 s-1133 series seiko instruments inc. 21 ? characteristics (typical data) (1) output voltage vs. output current (when load current increases) (ta = 25 c) s-1133b12 s-1133b30

s-1133b60

remark in determining the output current, attention should be paid to the following. 1. the minimum output current value and footnote *5 in table 5 to 6 in the ? electrical characteristics ? 2. the package power dissipation (2) output voltage vs. input voltage (ta = 25 c) s-1133b12 s-1133b30 1.0 1.5 2.0 2.5 v out [v] 1.25 1.20 1.15 1.10 1.05 1.00 v in [v] 1.30 3.5 3.0 100 ma i out = 1 ma 30 ma 2.5 3.0 3.5 4.0 4.5 v out [v] 3.0 2.9 2.8 2.7 2.6 2.5 v in [v] 3.1 5.0 100 ma i out = 1 ma 30 ma s-1133b60 4.5 5.0 6.0 5.5 7.0 6.5 v out [v] 6.0 5.5 5.0 4.5 v in [v] 6.5 100 ma i out = 1 ma 30 ma
high ripple-rejection and low dropout middle-output current cmos voltage regulator s-1133 series rev.2.0 _00 22 seiko instruments inc. (3) dropout voltage vs. output current s-1133b12 s-1133b30

0 100 150 350 v drop [v] 0.15 0.20 0.25 0.30 0.35 0.40 0.45 0.05 0.10 0 i out [ma] 50 200 250 300 85 c 25 c ? 40 c s-1133b60 0 100 150 350 v drop [v] 0 i out [ma] 50 200 250 300 0.15 0.20 0.25 0.30 0.35 0.40 0.45 0.05 0.10 85 c 25 c ? 40 c (4) dropout voltage vs. set output voltage

high ripple-rejection and low dropout middle-output current cmos voltage regulator rev.2.0 _00 s-1133 series seiko instruments inc. 23 (5) output voltage vs. ambient temperature s-1133b12 s-1133b30

s-1133b60 (6) current consumption vs. input voltage s-1133b12 s-1133b30 02 5678910 i ss1 [ a] 30 20 0 v in [v] 1 34 60 10 40 50 85 c 25 c ? 40 c 02 5678910 i ss1 [ a] 30 20 0 v in [v] 1 34 60 10 40 50 85 c 25 c ? 40 c s-1133b60 02 5678910 i ss1 [ a] 30 20 0 v in [v] 1 34 60 10 40 50 85 c 25 c ? 40 c
high ripple-rejection and low dropout middle-output current cmos voltage regulator s-1133 series rev.2.0 _00 24 seiko instruments inc. (7) ripple rejection (ta = 25 c) s-1133b12 v in = 2.2 v, c out = 2.2 f s-1133b30 v in = 4.0 v, c out = 1.0 f 10 100 1k 10k 100k ripple rejection [db] 0 20 40 60 80 frequency [hz] 1m 100 50 ma i out = 1 ma 100 ma

! "#$ s-1133b60 v in = 7.0 v, c out = 1.0 f

! "#$
high ripple-rejection and low dropout middle-output current cmos voltage regulator rev.2.0 _00 s-1133 series seiko instruments inc. 25 ? reference data (1) input transient response characteristics (ta = 25 c) s-1133b12 i out = 100 ma, tr = tf = 5.0 s, c out = 2.2 f, c in = 2.2 f s-1133b30 i out = 100 ma, tr = tf = 5.0 s, c out = 1.0 f, c in = 1.0 f 1.36 1.32 1.28 1.24 1.20 1.16 1.12 ? 20 80 120 180 v out [v] t [ s] v in [v] 3.5 3.0 2.5 0.5 1.0 1.5 2.0 0 20 40 60 100 140 160 v out v in 3.16 3.12 3.08 3.04 3.00 2.96 2.92 ? 20 80 120 180 v out [v] t [ s] v in [v] 6 5 4 0 1 2 3 0 20 40 60 100 140 160 v out v in s-1133b60 i out = 100 ma, tr = tf = 5.0 s, c out = 1.0 f, c in = 1.0 f 6.16 6.12 6.08 6.04 6.00 5.96 5.92 ? 20 80 120 180 v out [v] t [ s] v in [v] 9 8 7 3 4 5 6 0 20 40 60 100 140 160 v out v in (2) load transient response characteristics (ta = 25 c) s-1133b12 v in = 2.2 v, c out = 2.2 f, c in = 2.2 f, i out = 50 ? 100 ma s-1133b30 v in = 4.0 v, c out = 1.0 f, c in = 1.0 f, i out = 50 ? 100 ma ? 40 60 100 160 v out [v] 1.6 1.5 1.4 1.3 1.2 1.1 1.0 t [ s] i out [ma] 150 100 50 ? 150 ? 100 ? 50 0 ? 20 0 20 40 80 120 140 v out i out ? 40 60 100 160 v out [v] 3.16 3.12 3.08 3.04 3.00 2.96 2.92 t [ s] i out [ma] 150 100 50 ? 150 ? 100 ? 50 0 ? 20 0 20 40 80 120 140 v out i out s-1133b60 v in = 7.0 v, c out = 1.0 f, c in = 1.0 f, i out = 50 ? 100 ma ? 40 60 100 160 v out [v] 6.16 6.12 6.08 6.04 6.00 5.96 5.92 t [ s] i out [ma] 150 100 50 ? 150 ? 100 ? 50 0 ? 20 0 20 40 80 120 140 v out i out
high ripple-rejection and low dropout middle-output current cmos voltage regulator s-1133 series rev.2.0 _00 26 seiko instruments inc. (3) on/off pin transient response characteristics (ta = 25 c) s-1133b12 v in = 2.2 v, c out = 2.2 f, c in = 2.2 f, i out = 100 ma s-1133b30 v in = 4.0 v, c out = 1.0 f, c in = 1.0 f, i out = 100 ma v out [v] 5 4 3 2 1 0 ? 1 v on/off [v] 6 4 2 0 ? 6 ? 4 ? 2 ? 40 60 100 160 t [ s] ? 20 0 20 40 80 120 140 v on/off v out v out [v] 10 8 6 4 2 0 ? 2 v on/off [v] 6 4 2 0 ? 6 ? 4 ? 2 ? 40 60 100 160 t [ s] ? 20 0 20 40 80 120 140 v on/off v out s-1133b60 v in = 7.0 v, c out = 1.0 f, c in = 1.0 f, i out = 100 ma v out [v] 10 8 6 4 2 0 ? 2 12 14 v on/off [v] 8 4 2 0 ? 8 ? 6 ? 4 ? 2 6 ? 40 60 100 160 t [ s] ? 20 0 20 40 80 120 140 v on/off v out
high ripple-rejection and low dropout middle-output current cmos voltage regulator rev.2.0 _00 s-1133 series seiko instruments inc. 27 ? marking specifications (1) sot-89-5 (1) to (3) : product code (refer to product name vs. product code .) (4) to (6) : lot number 5 4 1 3 2 (2) sot-89-5 to p vie w (1) (3) (5) (4) (6) product name vs. product code product code product code product name (1) (2) (3) product name (1) (2) (3) s-1133b00-u5t1g q 8 a s-1133b36-u5t1g q 8 z s-1133b12-u5t1g q 8 b s-1133b37-u5t1g q 9 a s-1133b13-u5t1g q 8 c s-1133b38-u5t1g q 9 b s-1133b14-u5t1g q 8 d s-1133b39-u5t1g q 9 c s-1133b15-u5t1g q 8 e s-1133b40-u5t1g q 9 d s-1133b16-u5t1g q 8 f s-1133b41-u5t1g q 9 e s-1133b17-u5t1g q 8 g s-1133b42-u5t1g q 9 f s-1133b18-u5t1g q 8 h s-1133b43-u5t1g q 9 g s-1133b19-u5t1g q 8 i s-1133b44-u5t1g q 9 h s-1133b20-u5t1g q 8 j s-1133b45-u5t1g q 9 i s-1133b21-u5t1g q 8 k s-1133b46-u5t1g q 9 j s-1133b22-u5t1g q 8 l s-1133b47-u5t1g q 9 k s-1133b23-u5t1g q 8 m s-1133b48-u5t1g q 9 l s-1133b24-u5t1g q 8 n s-1133b49-u5t1g q 9 m s-1133b25-u5t1g q 8 o s-1133b50-u5t1g q 9 n s-1133b26-u5t1g q 8 p s-1133b51-u5t1g q 9 o s-1133b27-u5t1g q 8 q s-1133b52-u5t1g q 9 p s-1133b28-u5t1g q 8 r s-1133b53-u5t1g q 9 q s-1133b29-u5t1g q 8 s s-1133b54-u5t1g q 9 r s-1133b30-u5t1g q 8 t s-1133b55-u5t1g q 9 s s-1133b31-u5t1g q 8 u s-1133b56-u5t1g q 9 t s-1133b32-u5t1g q 8 v s-1133b57-u5t1g q 9 u s-1133b33-u5t1g q 8 w s-1133b58-u5t1g q 9 v s-1133b34-u5t1g q 8 x s-1133b59-u5t1g q 9 w s-1133b35-u5t1g q 8 y s-1133b60-u5t1g q 9 x remark please contact the sii marketing department for type a products.
high ripple-rejection and low dropout middle-output current cmos voltage regulator s-1133 series rev.2.0 _00 28 seiko instruments inc. (2) snt-8a (1) to (3) product code (refer to product name vs. product code ) (4) to (9) lot number snt-8a top view 1 4 8 5 (7) (4) (1) (8) (5) (2) (9) (6) (3) product name vs. product code product code product code product name (1) (2) (3) product name (1) (2) (3) s-1133b00-i8t1g q 8 a s-1133b36-i8t1g q 8 z s-1133b12-i8t1g q 8 b s-1133b37-i8t1g q 9 a s-1133b13-i8t1g q 8 c s-1133b38-i8t1g q 9 b s-1133b14-i8t1g q 8 d s-1133b39-i8t1g q 9 c s-1133b15-i8t1g q 8 e s-1133b40-i8t1g q 9 d s-1133b16-i8t1g q 8 f s-1133b41-i8t1g q 9 e s-1133b17-i8t1g q 8 g s-1133b42-i8t1g q 9 f s-1133b18-i8t1g q 8 h s-1133b43-i8t1g q 9 g s-1133b19-i8t1g q 8 i s-1133b44-i8t1g q 9 h s-1133b20-i8t1g q 8 j s-1133b45-i8t1g q 9 i s-1133b21-i8t1g q 8 k s-1133b46-i8t1g q 9 j s-1133b22-i8t1g q 8 l s-1133b47-i8t1g q 9 k s-1133b23-i8t1g q 8 m s-1133b48-i8t1g q 9 l s-1133b24-i8t1g q 8 n s-1133b49-i8t1g q 9 m s-1133b25-i8t1g q 8 o s-1133b50-i8t1g q 9 n s-1133b26-i8t1g q 8 p s-1133b51-i8t1g q 9 o s-1133b27-i8t1g q 8 q s-1133b52-i8t1g q 9 p s-1133b28-i8t1g q 8 r s-1133b53-i8t1g q 9 q s-1133b29-i8t1g q 8 s s-1133b54-i8t1g q 9 r s-1133b30-i8t1g q 8 t s-1133b55-i8t1g q 9 s s-1133b31-i8t1g q 8 u s-1133b56-i8t1g q 9 t s-1133b32-i8t1g q 8 v s-1133b57-i8t1g q 9 u s-1133b33-i8t1g q 8 w s-1133b58-i8t1g q 9 v s-1133b34-i8t1g q 8 x s-1133b59-i8t1g q 9 w s-1133b35-i8t1g q 8 y s-1133b60-i8t1g q 9 x remark please contact the sii marketing department for type a products.

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the information described herein is subject to change without notice. seiko instruments inc. is not responsible for any problems caused by circuits or diagrams described herein whose related industrial properties, patents, or other rights belong to third parties. the application circuit examples explain typical applications of the products, and do not guarantee the success of any specific mass-production design. when the products described herein are regulated products subject to the wassenaar arrangement or other agreements, they may not be exported without authorization from the appropriate governmental authority. use of the information described herein for other purposes and/or reproduction or copying without the express permission of seiko instruments inc. is strictly prohibited. the products described herein cannot be used as part of any device or equipment affecting the human body, such as exercise equipment, medical equipment, security systems, gas equipment, or any apparatus installed in airplanes and other vehicles, without prior written permission of seiko instruments inc. although seiko instruments inc. exerts the greatest possible effort to ensure high quality and reliability, the failure or malfunction of semiconductor products may occur. the user of these products should therefore give thorough consideration to safety design, including redundancy, fire-prevention measures, and malfunction prevention, to prevent any accidents, fires, or community damage that may ensue.

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