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is32wv10008all is32wv10008bll issi ? integrated silicon solution, inc. ? www.issi.com ? 1-800-379-4774 1 rev. 00a 08/15/02 copyright ? 2002 integrated silicon solution, inc. all rights reserved. issi reserves the right to make changes to this speci fication and its products at any time without notice. issi assumes no liability arising out of the application or use of any information, products or services desc ribed herein. customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders fo r products. 1meg x 8 low voltage, ultra low power pseudo ram features ? high-speed access time: 55ns, 70, 85, 100ns cmos low power operation ttl compatible interface levels single power supply ? 1.65v--2.2v v dd (32wv10008all) ? 2.3v--3.6v v dd (32wv10008bll) fully static operation: no clock or refresh required three state outputs industrial temperature available description the issi is32wv10008all/ is32wv10008bll are high- speed, 8m bit static rams organized as 1m words by 8 bits. it is fabricated using issi 's high-performance cmos technology. this highly reliable process coupled with innovative circuit design techniques, yields high- performance and low power consumption devices. when cs1 is high (deselected) or when cs2 is low (deselected) or when cs1 is low, cs2 is high, the device assumes a standby mode at which the power dissipation can be reduced down with cmos input levels. easy memory expansion is provided by using chip enable and output enable inputs. the active low write enable (we) controls both writing and reading of the memory. the is32wv10008all and is32wv10008bll are packged in the jedec standard 48-pin mini bga (6mm x 8mm) and 44-pin tsop (type ii). functional block diagram advanced information august 2002 a0-a19 cs1 oe we 1m x 8 memory array decoder column i/o control circuit gnd vdd i/o data circuit dq0-dq7 cs2
is32wv10008all, is32wv10008bll issi ? 2 integrated silicon solution, inc. ? www.issi.com ? 1-800-379-4774 rev. 00a 08/15/02 pin descriptions a0-a19 address inputs cs1 chip enable 1 input cs2 chip enable 2 input oe output enable input we write enable input dq0-dq7 i nput/output nc no connection v dd power gnd ground 48-pin mini bga (b) (6mm x 8mm) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 a4 a3 a2 a1 a0 cs1 nc nc dq0 dq1 vdd gnd dq2 dq3 nc nc we a19 a18 a17 a16 a15 a5 a6 a7 oe cs2 a8 nc nc dq7 dq6 gnd vdd dq5 dq4 nc nc a9 a10 a11 a12 a13 a14 44-pin tsop (type ii) pin configuration 1 2 3 4 5 6 a b c d e f g h nc oe a 0 a 1 a 2 cs 2 nc nc a 3 a 4 cs1 nc dq 0 a 5 a 6 nc dq 4 gnd dq 1 a 17 a 7 dq 5 v dd v dd dq 2 nc a 16 dq 6 gnd dq 3 nc a 14 a 15 nc dq 7 nc a 12 a 13 we nc a 18 a 8 a 9 a 10 a 11 a 19 nc nc
is32wv10008all, is32wv10008bll issi ? integrated silicon solution, inc. ? www.issi.com ? 1-800-379-4774 3 rev. 00a 08/15/02 dc electrical characteristics (over operating range) symbol parameter test conditions v dd min. max. unit v oh output high voltage i oh = -0.1 ma 1.65-2.2v 1.4 ? v i oh = -1 ma 2.3-3.6v 2.2 ? v v ol output low voltage i ol = 0.1 ma 1.65-2.2v ? 0.2 v i ol = 2.1 ma 2.3-3.6v ? 0.4 v v ih input high voltage 1.65-2.2v 1.4 v dd + 0.2 v 2.3-3.6v 2.2 v dd + 0.3 v v il (1) input low voltage 1.65-2.2v ?0.2 0.4 v 2.3-3.6v ?0.2 0.6 v i li input leakage gnd v in v dd ?1 1 a i lo output leakage gnd v out v dd , outputs disabled ?1 1 a notes: 1. v il (min.) = ?1.0v for pulse width less than 10 ns. absolute maximum ratings (1) symbol parameter value unit v term terminal voltage with respect to gnd ?0.2 to v dd +0.3 v t bias temperature under bias ?40 to +85 c v dd v dd related to gnd ?0.2 to +3.8 v t stg storage temperature ?65 to +150 c p t power dissipation 1.0 w note: 1. stress greater than those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect reliability. operating range (v dd ) range ambient temperature i s32wv10008all is32wv10008bll commercial 0c to +70c 1.65v - 2.2v 2.3v - 3.6v industrial ?40c to +85c 1.65v - 2.2v 2.3v - 3.6v
is32wv10008all, is32wv10008bll issi ? 4 integrated silicon solution, inc. ? www.issi.com ? 1-800-379-4774 rev. 00a 08/15/02 ac test loads figure 1 figure 2 capacitance (1) symbol parameter cond itions max. unit c in input capacitance v in = 0v 8 pf c out input/output capacitance v out = 0v 10 pf note: 1. tested initially and after any design or process changes that may affect these parameters. ac test conditions parameter 32wv10008all 32wv10008bll (unit) (unit) input pulse level 0.4v to v dd -0.2 0.4 to 2.2v input rise and fall times 5 ns 5ns input and output timing v ref v ref and reference level output load see figures 1 and 2 see figures 1 and 2 v dd =1.65-2.2v v dd =2.3v-3.6v r1( ?) 3070 3070 r2( ?) 3150 3150 v ref 0.9v 1.5v v tm 1.8v 2.8v r1 30 pf including jig and scope r2 output vtm r1 5 pf including jig and scope r2 output vtm
is32wv10008all, is32wv10008bll issi ? integrated silicon solution, inc. ? www.issi.com ? 1-800-379-4774 5 rev. 00a 08/15/02 power supply characteristics (1) (over operating range) 32wv10008all symbol parameter test conditions max. max. max. unit 70 85 100 i cc v dd dynamic operating v dd = max., com. 15 10 10 ma supply current i out = 0 ma, f = f max ind. 15 10 10 i cc 1 operating supply v dd = max., com. 3 3 3 ma current i out = 0 ma, f = 0 ind. 3 3 3 i sb 1 ttl standby current v dd = max., com. 0.3 0.3 0.3 ma (ttl inputs) v in = v ih or v il ind. 0.3 0.3 0.3 cs1 = v ih , cs2 = v il , f = 1 mh z i sb 2 cmos standby v dd = max., com. 40 40 40 a current (cmos inputs) cs1 v dd ? 0.2v, ind. 40 40 40 cs2 0.2v, v in v dd ? 0.2v, or v in 0.2v, f = 0 note: 1. at f = f max , address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change. power supply characteristics (1) (over operating range) 32wv10008bll symbol parameter test conditions max. max. max. unit 55 70 85 i cc v dd dynamic operating v dd = max., com. 15 15 10 ma supply current i out = 0 ma, f = f max ind. 15 15 10 i cc 1 operating supply v dd = max., com. 3 3 3 ma current i out = 0 ma, f = 0 ind. 3 3 3 i sb 1 ttl standby current v dd = max., com. 0.3 0.3 0.3 ma (ttl inputs) v in = v ih or v il ind. 0.3 0.3 0.3 cs1 = v ih , cs2 = v il , f = 1 mh z i sb 2 cmos standby v dd = max., com. 40 40 40 a current (cmos inputs) cs1 v dd ? 0.2v, ind. 40 40 40 cs2 0.2v, v in v dd ? 0.2v, or v in 0.2v, f = 0 note: 1. at f = f max , address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
is32wv10008all, is32wv10008bll issi ? 6 integrated silicon solution, inc. ? www.issi.com ? 1-800-379-4774 rev. 00a 08/15/02 ac waveforms read cycle no. 1 (1,2) (address controlled) ( cs1 = oe = v il , cs2 = we = v ih ) data valid previous data valid t aa t oha t oha t rc d out address read cycle switching characteristics (1) (over operating range) 55 ns 70 ns 85ns 100ns symbol parameter min. max. min. max. min. max. min. max. unit t rc read cycle time 55 ? 70 ? 85 ? 100 ? ns t aa address access time ? 55 ? 70 ? 85 ? 100 ns t oha output hold time 10 ? 10 ? 10 ? 10 ? ns t acs1/ t acs2 cs1/ cs2 access time ? 55 ? 70 ? 85 ? 100 ns t doe oe access time ? 25 ? 35 ? 40 ? 45 ns t hzoe (2) oe to high-z output ? 20 ? 25 ? 25 ? 25 ns t lzoe (2) oe to low-z output 5 ? 5 ? 5 ? 5 ? ns t hzcs1/ t hzcs2 (2) cs1/ cs2 to high-z output 0 20 0 25 0 25 0 25 ns t lzcs1/ t lzcs2 (2) cs1/ cs2 to low-z output 10 ? 10 ? 10 ? 10 ? ns notes: 1. test conditions assume signal transition times of 5 ns or less, timing reference levels of 0.9v, input pulse levels of 0.4 to 1.4v and output loading specified in figure 1. 2. tested with the load in figure 2. transition is measured 500 mv from steady-state voltage. not 100% tested.
is32wv10008all, is32wv10008bll issi ? integrated silicon solution, inc. ? www.issi.com ? 1-800-379-4774 7 rev. 00a 08/15/02 ac waveforms read cycle no. 2 (1,3) ( cs1 , cs2, oe controlled) notes: 1. we is high for a read cycle. 2. the device is continuously selected. oe , cs1 = v il . cs2= we =v ih . 3. address is valid prior to or coincident with cs1 low and cs2 high transition. t rc t oha t aa t doe t lzoe t acs1/ t acs2 t lzcs1/ t lzcs2 t hzoe high-z data valid t hzcs address oe cs1 cs2 dout
is32wv10008all, is32wv10008bll issi ? 8 integrated silicon solution, inc. ? www.issi.com ? 1-800-379-4774 rev. 00a 08/15/02 write cycle switching characteristics (1,2) (over operating range) 55 ns 70 ns 85 ns 100 ns symbol parameter min. max. min. max. min. max. min. max. unit t wc write cycle time 55 ? 70 ? 85 ? 100 ? ns t scs1/ t scs2 cs1/ cs2 to write end 45 ? 60 ? 65 ? 70 ? ns t aw address setup time to write end 45 ? 60 ? 65 ? 70 ? ns t ha address hold from write end 0 ? 0 ? 0 ? 0 ? ns t sa address setup time 0 ? 0 ? 0 ? 0 ? ns t pwe we pulse width 40 ? 50 ? 60 ? 60 ? ns t sd data setup to write end 25 ? 30 ? 35 ? 40 ? ns t hd data hold from write end 0 ? 0 ? 0 ? 0 ? ns t hzwe (3) we low to high-z output ? 20 ? 20 ? 20 ? 20 ns t lzwe (3) we high to low-z output 5 ? 5 ? 5 ? 5 ? ns notes: 1. test conditions assume signal transition times of 5 ns or less, timing reference levels of 0.9v, input pulse levels of 0.4v t o 1.4v and output loading specified in figure 1. 2. the internal write time is defined by the overlap of cs1 low, cs2 high and ub or lb , and we low. all signals must be in valid states to initiate a write, but any one can go inactive to terminate the write. the data input setup and hold timing are referenced to the rising or falling edge of the signal that termi nates the write. 3. tested with the load in figure 2. transition is measured 500 mv from steady-state voltage. not 100% tested. ac waveforms write cycle no. 1 ( cs1 /cs2 controlled, oe = high or low ) data-in valid data undefined t wc t scs1 t scs2 t aw t ha t pwe t hzwe high-z t lzwe t sa t sd t hd address cs1 cs2 we dout din
is32wv10008all, is32wv10008bll issi ? integrated silicon solution, inc. ? www.issi.com ? 1-800-379-4774 9 rev. 00a 08/15/02 write cycle no. 2 ( we controlled: oe is high during write cycle) write cycle no. 3 ( we controlled: oe is low during write cycle) data-in valid data undefined t wc t scs1 t scs2 t aw t ha t pwe t hzwe high-z t lzwe t sa t sd t hd address oe cs1 cs2 we dout din data-in valid data undefined t wc t scs1 t scs2 t aw t ha t pwe t hzwe high-z t lzwe t sa t sd t hd address oe cs1 cs2 we dout din
is32wv10008all, is32wv10008bll issi ? 10 integrated silicon solution, inc. ? www.issi.com ? 1-800-379-4774 rev. 00a 08/15/02 data retention switching characteristics symbol parameter test condition min. max. unit v dr v dd for data retention see data retention waveform 1.0 3.6 v i dr data retention current v dd = 1.0v, cs1/ cs2 v dd ? 0.2v ? 15 a t sdr data retention setup time see data retention waveform 0 ? ns t rdr recovery time see data retention waveform t rc ?ns data retention waveform ( cs1 cs1 cs1 cs1 cs1 controlled) data retention waveform (cs2 controlled) vdd cs1 3 vdd - 0.2v t sdr t rdr v dr cs1 gnd 3.0v 2.2v data retention mode v dd cs2 0.2v t sdr t rdr v dr 0.4v cs2 gnd 3.0 2.2v data retention mode
is32wv10008all, is32wv10008bll issi ? integrated silicon solution, inc. ? www.issi.com ? 1-800-379-4774 11 rev. 00a 08/15/02 ordering information is32wv10008all (v dd = 1.65v - 2.2v) commercial range: 0c to +70c speed (ns) order part no. package 70 is32wv10008all-70t tsop is32wv10008all-70b mini bga (6mm x 8mm) 85 is32wv10008all-70t tsop is32wv10008all-70b mini bga (6mm x 8mm) 100 is32wv10008all-70t tsop is32wv10008all-70b mini bga (6mm x 8mm) ordering information is32wv10008all (v dd = 1.65v - 2.2v) industrial range: -40c to +85c speed (ns) order part no. package 70 is32wv10008all-70ti tsop is32wv10008all-70bi mini bga (6mm x 8mm) 85 is32wv10008all-70ti tsop is32wv10008all-70bi mini bga (6mm x 8mm) 100 is32wv10008all-70ti tsop is32wv10008all-70bi mini bga (6mm x 8mm)
is32wv10008all, is32wv10008bll issi ? 12 integrated silicon solution, inc. ? www.issi.com ? 1-800-379-4774 rev. 00a 08/15/02 ordering information is32wv10008bll (v dd = 2.3v - 3.6v) commercial range: 0c to +70c speed (ns) order part no. package 55 is32wv10008bll-55t tsop is32wv10008bll-55b mini bga (6mm x 8mm) 70 is32wv10008bll-70t tsop is32wv10008bll-70b mini bga (6mm x 8mm) 85 is32wv10008bll-70t tsop is32wv10008bll-70b mini bga (6mm x 8mm) 100 is32wv10008bll-70t tsop is32wv10008bll-70b mini bga (6mm x 8mm) ordering information is32wv10008bll (v dd = 2.3v - 3.6v) industrial range: -40c to +85c speed (ns) order part no. package 55 is32wv10008bll-55ti tsop is32wv10008bll-55bi mini bga (6mm x 8mm) 70 is32wv10008bll-70ti tsop is32wv10008bll-70bi mini bga (6mm x 8mm) 85 is32wv10008bll-70ti tsop is32wv10008bll-70bi mini bga (6mm x 8mm) 100 is32wv10008bll-70ti tsop is32wv10008bll-70bi mini bga (6mm x 8mm)

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