description recommended for high-side switching applications that benefit from separate logic and load grounds, these devices encompass load supply voltages to 50 v and output currents to -500 ma. these 8-channel source drivers are useful for interfacing between low-level logic and high-current loads. typical loads include relays, solenoids, lamps, stepper and/or servo motors, print hammers, and leds. all devices may be used with 5 v logic systems ? ttl, schottky ttl, dtl, and 5 v cmos. the device packages offered are electrically interchangeable, and will withstand a maximum output off voltage of 50 v, and operate to a minimum of 5 v. all devices in this series integrate input current limiting resistors and output transient suppression diodes, and are activated by an active high input. the suffix ?a? indicates an 18-lead plastic dual in-line package with copper lead frame for optimum power dissipation. under normal operating conditions, these devices will sustain 120 ma continuously for each of the eight outputs at an ambient temperature of +50c and a supply of 15 v. the suffix ?lw? packages are provided in a 20-lead wide- body soic package with improved thermal characteristics. the a2982elw drivers are available for operation over an extended temperature range to -40c. these packages are pb (lead) free (suffix ?-t?), with 100% matte-tin leadframe plating. 29310l features and benefits ? ttl, dtl, pmos, or cmos compatible inputs ? 500 ma output source current capability ? transient-protected outputs ? output breakdown voltage to 50 v ? dip or soic packaging 8-channel source drivers packages: simplified block diagram not to scale 2981 and 2982 18-pin dip (suf x a) 18- and 20-pin soicw (suf x lw) 18-pin a package 20-pin lw package (nc pins omitted for 18-pin package)
8-channel source drivers 2981 and 2982 2 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com 1 pb-based variants are being phased out of the product line. some variants cited in this footnote are in production but have bee n determined to be last time buy. this classi cation indicates that sale of this device is currently restricted to existing customer applications. the variants should not be purchased for new design applications because obsolescence in the near future is proba ble. samples are no longer available. status change april 30, 2007. deadline for receipt of last time buy orders: august 24, 2007; t hese variants include: udn2982lw, udn2982lw-t, udn2982lwtr, udn2982lwtr-t, udq2982lw-t, and udq2982lwtr-t . selection guide 1 part number pb-free package packing ambient temperature (c) a2982elw-t yes 20-pin soicw 37 per tube ?40 to 85 a2982elwtr-t yes 20-pin soicw 1000 per reel a2982slw-t yes 20-pin soicw 37 per tube ?20 to 85 a2982slwtr-t yes 20-pin soicw 1000 per reel udn2981a-t yes 18-pin dip 21 per tube UDN2982A-t yes 18-pin dip 21 per tube absolute maximum ratings characteristic symbol notes rating units output voltage range v ce 5 to 50 v input voltage v in udn2981 25 v a2982, udn2982 20 v output current i out ?500 ma package power dissipation p d see graph ? ? operating ambient temperature t a range e ?40 to 85 oc range s ?20 to 85 oc maximum junction temperature t j (max) 150 oc storage temperature t stg ?55 to 150 oc
8-channel source drivers 2981 and 2982 3 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com one of eight drivers copyright ? 1977, 2001 allegro microsystems, inc. 50 75 100 125 150 2.5 0.5 0 allowab l ep a cka g epow e rd i s s ipation in wat ts ambient temperature in c 2.0 1.5 1.0 25 dwg. gp-022-4a 20-le ad s oic , r ja =90 c/w 18-pin dip, r ja =65 c/w
8-channel source drivers 2981 and 2982 4 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com electrical characteristics 1 at t a = +25c (unless otherwise speci ed). 1 negative current is de ned as coming out of (sourcing) the speci ed device terminal. 2 all inputs simultaneously. 3 turn-off delay is in uenced by load conditions. systems applications well below the speci ed output loading may require timing con- siderations for some designs, i.e., multiplexed displays or when used in combination with sink drivers in a totem pole con guration. characteristic symbol variant test conditions test fig. min. typ. max. units output leakage current 2 i cex all v in = 0.4 v, v s = 50 v, t a = +70c 1 ? ? 200 a output sustaining voltage v ce(sus) all i out = -45 ma ? 35 ? ? v collector-emitter saturation voltage v ce(sat) all v in = 2.4 v, i out = -100 ma 2 ? 1.6 1.8 v v in = 2.4 v, i out = -225 ma 2 ? 1.7 1.9 v v in = 2.4 v, i out = -350 ma 2 ? 1.8 2.0 v input current i in(on) 2981 v in = 2.4 v 3 ? 140 200 a v in = 3.85 v 3 ? 310 450 a 2982 v in = 2.4 v 3 ? 140 200 a v in = 12 v 3 ? 1.25 1.93 ma output source current (outputs open) l out 2981 v in = 2.4 v, v ce = 2.0 v 2 -350 ? ? ma 2982 v in = 2.4 v, v ce = 2.0 v 2 -350 ? ? ma supply current leakage current i s all v in = 2.4 v*, v s = 50 v 4 ? ? 10 ma clamp diode current i r all v r = 50 v, v in = 0.4 v* 5 ? ? 50 a clamp diode forward voltage v f all i f = 350 ma 6 ? 1.5 2.0 v turn-on delay t on all 0.5 e in to 0.5 e out , r l = 100 , v s = 35 v ? ? 1.0 2.0 s turn-off delay 3 t off all 0.5 e in to 0.5 e out , r l = 100 , v s = 35 v, see note ? ? 5.0 10 s
8-channel source drivers 2981 and 2982 5 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com test figures figure 1 figure 2 figure 3 dwg. no. a-11,083 dwg. no. a-11,084 dwg. no. a-11,085 v v in cex i s a v v v i out in ce s v ma open v v in in i s ma dwg. no. a-11,086 dwg. no. a-11,087 dwg. no. a-11,088 figure 5 figure 6 figure 4 open open v i f f v v s i r v in a v in i s s v open ma
8-channel source drivers 2981 and 2982 6 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com allowable peak collector current as a function of duty cycle udn2981a and UDN2982A 100 v = 15 v 8 7 6 4 5 number of outputs conducting simultaneously 90 80 70 60 50 40 30 20 10 0 0 50 100 150 200 250 300 350 400 450 500 recommended maximum output current allowable peak collector current in ma at 50 c per cent duty cycle s 3 100 v = 15 v 8 7 6 4 5 number of outputs conducting simultaneously 90 80 70 60 50 40 30 20 10 0 0 50 100 150 200 250 300 350 400 450 500 recommended maximum output current allowable peak collector current in ma at 70 c per cent duty cycle s 3 dwg. no. a-11,107b dwg. no. a-11,108b input current as a function of input voltage typical electrosensitive printer application typ ical 2.5 input current, i (ma) in 2.0 1.5 1.0 0.5 2 4 6 8 10 12 input voltage (volts) maximu m dwg. no. a-11,115b 1 2 3 4 5 6 7 8 9 11 12 13 14 15 16 17 18 10 electrodes in 1 in 2 in 3 in 4 in 5 in 6 in 7 in 8 v s r l r l r l r l r l r l r l r l dwg. no. a-11,113a
8-channel source drivers 2981 and 2982 7 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com lw package, 18-pin soicw a package, 18-pin dip 2 0.900 0.250 0.430 0.210 max 0.300 0.010 0.018 0.100 0.130 0.060 0.005 1 18 a dimensions exclusive of mold flash, gate burrs, and dambar protrusions exact case and lead configuration at supplier discretion within limits shown a terminal #1 mark area all dimensions nominal, not for tooling use (reference jedec ms-001 ac) dimensions in inches 2 1 18 a 11.55 2.65 max 0.20 1.27 10.30 7.50 c seating plane 0.41 c 0.10 18x all dimensions nominal, not for tooling use dimensions in millimeters (reference jedec ms-013 ab) dimensions exclusive of mold flash, gate burrs, and dambar protrusions exact case and lead configuration at supplier discretion within limits shown a terminal #1 mark area 4o 0.27 0.84 0.25 gauge plane seating plane
8-channel source drivers 2981 and 2982 8 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com copyright ?1977, 2007, allegro microsystems, inc. the products described here are manufactured under one or more u.s. patents or u.s. patents pending. allegro microsystems, inc. reserves the right to make, from time to time, such departures from the detail speci cations as may be required to permit improvements in the performance, reliability, or manufacturability of its products. before placing an order, the user is cauti oned to verify that the information being relied upon is current. allegro?s products are not to be used in life support devices or systems, if a failure of an allegro product can reasonably be expected to cause the failure of that life support device or system, or to affect the safety or effectiveness of that device or system. the information included herein is believed to be accurate and reliable. however, allegro microsystems, inc. assumes no respon sibility for its use; nor for any infringement of patents or other rights of third parties which may result from its use. for the latest version of this document, visit our website: www.allegromicro.com lw package, 20-pin soicw 2 1 20 a 12.80 2.65 max 0.20 1.27 10.30 7.50 c seating plane 0.41 c 0.10 20x all dimensions nominal, not for tooling use dimensions in millimeters (reference jedec ms-013 ac) dimensions exclusive of mold flash, gate burrs, and dambar protrusions exact case and lead configuration at supplier discretion within limits shown a terminal #1 mark area 4o 0.27 0.84 0.25 gauge plane seating plane
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