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1 date: 04/27/06 sp26lv432 high speed, low power quad differential line receiver ? copyright 2006 sipex corp oration sp26lv432 high-speed, low-power quad rs-422 differential line receiver the sp26lv432 is a quad differential line receiver with three-state outputs designed to meet the specifications of rs-422. the sp26lv432 features sipex's bicmos process allowing low power operational characteristics of cmos technology while meeting all of the demands of the rs-422 serial protocol at 50mbps under load. the rs-422 protocol allows up to ten receivers to be connected to a multipoint bus transmission line. the sp26lv432 f eatures a receiver enable control common to all four receivers and a high-z output with 6ma source and sink capability. since the cabling can be as long as 4,000 feet, the rs-422 receivers of the sp26lv432 are equipped with a wide (-7.0v to +7.0v) common-mode input voltage range to accommodate ground potential differences. quad differential line receivers compatible with the eia standard for rs-422 serial protocol high-z output control 14ns typical receiver propagation delays 60mv typical input hysteresis single +3.3v supply operation common receiver enable control 26lv32 industry standard footprint compatible -7.0v to +7.0v common-mode input voltage range switching rates up to 50mbps ideal for use with sp26lv431 quad drivers ri 4 a ri 4 b v cc gnd r0 4 r0 2 r0 3 r0 1 inputs outputs enable enable ri 3 a ri 3 b ri 2 a ri 2 b ri 1 a ri 1 b description v cc ri 2 b 1 2 3 4 13 14 5 6 7 ri 3 a ri 1 a r0 1 enable r0 2 ri 2 a r0 3 ri 1 b enable r0 4 ri 4 a ri 4 b 8 9 gnd ri 3 b 10 12 11 15 16 sp26lv432 typical application circuit now available in lead-free packaging e l b a n ee l b a n et u p n it u p t u o w o lh g i he r a c t ' n o dz - h g i h h g i he r a c t ' n o dv d i > v h t ) x a m (h g i h h g i he r a c t ' n o dv d i < v h t ) n i m (w o l e r a c t ' n o dw o lv d i > v h t ) x a m (h g i h e r a c t ' n o dw o lv d i < v h t ) n i m (w o l h g i he r a c t ' n o dn e p oh g i h e r a c t ' n o dw o ln e p oh g i h
2 date: 04/27/06 sp26lv432 high speed, low power quad differential line receiver ? copyright 2006 sipex corp oration absolute maximum ratings these are stress ratings only and functional operation of the device at these ratings or any other above those indicated in the operation sections of the specifications below is not implied. exposure to absolute maximum rating conditions for extended periods of time may affect reliability and cause permanent damage to the device. v cc (supply voltage) ................................................................... +7.0v v cm (common mode range) ........................................................ 14v v diff (differential input voltage) .................................................. 14v v in (enable input voltage) ................................................... v cc + 1.5v t stg (storage temperature range) ........................... -65 c to +150 c maximum current per output .................................................... 25ma storage temperature .................................................. -65 c to +150 c power dissipation per package 16-pin pdip (derate 14.3mw/oc above +70oc) ...................... 1150mw 16-pin nsoic (derate 8.95mw/oc above +70oc) ..................... 725mw unless otherwise noted, the following specifications apply for v cc = +3.0v to +3.6v with t amb = 25 c and all min and max limits apply across the recommended operating temperature range. electrical characteristics s r e t e m a r a p c d. n i m. p y t. x a ms t i n us n o i t i d n o c , e g a t l o v y l p p u sv c c 0 . 36 . 3v s e m i t l l a f r o e s i r t u p n i e l b a n e3s n s c i t s i r e t c a r a h c l a c i r t c e l e t u p n i v , e g a t l o v t u p n i l a i t n e r e f f i d m u m i n i m h t 0 0 2 -0 50 0 2 +v mv t u o v = h o v r o l o , v < v 7 - m c v 7 + < r , e c n a t s i s e r t u p n i n i 0 . 5k ? v n i v 0 1 + , v 7 + , v 7 - = d n g = t u p n i r e h t o t n e r r u c t u p n i i n i 5 2 . 1 +5 . 1 +a mv n i d n g = t u p n i r e h t o , v 0 1 + = i n i 5 . 1 -5 . 2 -a mv n i d n g = t u p n i r e h t o , v 0 1 - = , e g a t l o v l e v e l t u p n i h g i h e l b a n e m u m i n i m v ) n e ( h i 0 . 2v , e g a t l o v l e v e l t u p n i w o l e l b a n e m u m i x a m v ) n e ( l i 8 . 0v i , t n e r r u c t u p n i e l b a n e m u m i x a m n e 0 . 1 a v n i v = c c d n g r o v , s i s e r e t s y h t u p n i t s y h 0 6v mv m c v 0 = i , t n e r r u c y l p p u s t n e c s e i u q c c 55 1a mv c c v , v 3 . 3 + = f i d v 1 + = s c i t s i r e t c a r a h c l a c i r t c e l e t u p t u o v , e g a t l o v t u p t u o l e v e l h g i h m u m i n i m h o 4 . 28 . 2vv c c v , v 0 . 3 + = f f i d , v 1 + = i t u o a m 6 - = v , e g a t l o v t u p t u o l e v e l w o l m u m i x a m l o 2 . 05 . 0vv c c v , v 0 . 3 + = f f i d , v 1 - = i t u o a m 6 + = , t n e r r u c e g a k a e l t u p t u o e t a t s - i r t m u m i x a m i q z o 5 . 0 0 . 5 a v t u o v = c c , d n g r o v = e l b a n e l i v = e l b a n e , h i
3 date: 04/27/06 sp26lv432 high speed, low power quad differential line receiver ? copyright 2006 sipex corp oration specifications (continued) unless otherwise noted, the following specifications apply for v cc = +3.0v to +3.6v, t amb = 25 c, t r < 6ns, t f < 6ns, and all min and max limits apply across the recommended operating temperature range. . n i m. p y t. x a ms t i n us n o i t i d n o c s r e t e m a r a p c a , t u p t u o o t t u p n i s y a l e d n o i t a g a p o r p . 2 e r u g i f o t r e f e r t h l p t , l h p 4 15 3s nc l v , f p 0 5 = f f i d v , v 5 . 2 = m c , v 0 = v c c v 5 + = , s e m i t l l a f d n a e s i r t u p t u o t e s i r t , l l a f 50 1s nc l v , f p 0 5 = f f i d v , v 5 . 2 = m c , v 0 = v c c v 5 + = , t u p t u o o t e l b a n e y a l e d n o i t a g a p o r p t z l p t , z h p 0 4s nc l r , f p 0 5 = l 0 0 0 1 = ? v , f f i d , v 5 . 2 = v c c v 5 + = , t u p t u o o t e l b a n e y a l e d n o i t a g a p o r p . 4 e r u g i f o t r e f e r t l z p t , h z p 0 4s nc l r , f p 0 5 = l 0 0 0 1 = ? v , f f i d , v 5 . 2 = v c c v 5 + = ri 4 a ri 4 b v cc gnd r0 4 r0 2 r0 3 r0 1 inputs outputs enable enable ri 3 a ri 3 b ri 2 a ri 2 b ri 1 a ri 1 b figure 1. sp26lv432 block diagram
4 date: 04/27/06 sp26lv432 high speed, low power quad differential line receiver ? copyright 2006 sipex corp oration pin number pin name description 1ri 1 bi nverted rs-422 receiver input. 2ri 1 a non-inverted rs-422 receiver input. 3r0 1 ttl receiver output. 4 enable receiver input enable, active high. 5r0 2 ttl receiver output. 6ri 2 a non-inverted rs-422 receiver input. 7ri 2 bi nverted rs-422 receiver input. 8 gnd ground. 9ri 3 bi nverted rs-422 receiver input. 10 ri 3 a non-inverted rs-422 receiver input. 11 r0 3 ttl receiver output. 12 enable receiver input enable, active low. 13 r0 4 ttl receiver output. 14 ri 4 a non-inverted rs-422 receiver input. 15 ri 4 bi nverted rs-422 receiver input. 16 v cc +3.0v to +3.6v power supply. pinout v cc ri 2 b 1 2 3 4 13 14 5 6 7 ri 3 a ri 1 a r0 1 enable r0 2 ri 2 a r0 3 ri 1 b enable r0 4 ri 4 a ri 4 b 8 9 gnd ri 3 b 10 12 11 15 16 sp26lv432 pin description
5 date: 04/27/06 sp26lv432 high speed, low power quad differential line receiver ? copyright 2006 sipex corp oration figure 4. high impedance output enable and disable waveforms figure 2. propagation delay figure 3. test circuit for high-z output timing ac test circuits and switching time waveforms t phl t plh output v oh 50% v ol +2.5v 0v -2.5v 10% 10% 90% 90% t rise t f all inputs (v-) C (v+) v cc r l device under test s1 c l v+ input v- input c l includes load and test jig capacitance. s1 = v cc for t pzl and t plz measurements. s1 = gnd for t pzh and t phz measurements. enable enable t phl t plh figure 5. differential propagation delay vs temperature figure 6. differential propagation delay vs supply voltage figure 7. differential skew vs temperature t pzl 1.3v 3.0v gnd 1.3v t pzh output output 0v v cc t plz t phz 0.5v 0.5v v oh v ol 50% 50% enable enable 10 11 12 13 14 15 16 -40 -15 10 35 60 8 5 t emperature ( c) differential prop. delay (ns) t phld t plhd 11 12 13 14 15 16 17 3.0 3.1 3.2 3.3 3.4 3.5 3 .6 power supply voltage (v) t phld t plhd differential prop. delay (ns) 0.6 0.8 1 1.2 1.4 1.6 1.8 2 -40 -15 10 35 60 8 5 t emperature ( c) differential skew (ns)
6 date: 04/27/06 sp26lv432 high speed, low power quad differential line receiver ? copyright 2006 sipex corp oration figure 10. high output voltage vs current over supply voltage figure 8. differntial skew vs supply voltage figure 9. high output voltage vs current over temperature figure 11. low output voltage vs current over temperature figure 12. low output voltage vs current over supply voltage figure 13. input resistance vs input voltage 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 3.0 3.1 3.2 3.3 3.4 3.5 3 .6 power supply voltage (v) differential skew (ns) 2.1 2.3 2.5 2.7 2.9 3.1 3.3 0510 15 20 output high current (ma) output high voltage (v) t = -40 c t = +85 c t = +25 c v cc = 3.3v 1.2 1.6 2.0 2.4 2.8 3.2 3.6 0510 15 20 25 output high current (ma) output high voltage (v) v cc = 3.6v v cc = 3.0v v cc = 3.3v 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 0510 15 2 0 output low current (ma) output low voltage (v) t= -40 c t= +85 c t=+25 c v cc = 3.3v 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 0510 15 2 0 output low current (ma) output low voltage (v) v cc = 3.6v v cc = 3.0v v cc = 3.3v 5 15 25 35 45 -10.0 -8.0 -6.0 -4.0 -2.0 0.0 2.0 4.0 6.0 8.0 10 .0 input voltage (v) input resistance (k ? )
7 date: 04/27/06 sp26lv432 high speed, low power quad differential line receiver ? copyright 2006 sipex corp oration figure 16. transition voltage vs supply voltage figure 14. input current vs supply voltage figure 15. transition voltage vs temperature figure 17. supply current vs temperature figure 18. disabled supply current vs supply voltage figure 19. supply current vs data rate -1.2 -0.9 -0.6 -0.3 0.0 0.3 0.6 0.9 3.0 3.1 3.2 3.3 3.4 3.5 3 .6 power supply voltage (v) input current (ma) +10v @ inverting input +10v @ non-inverting input 0v @ non-inverting input -10v @ non-inverting input -10v @ inverting input 0v @ inverting input -40 -20 0 20 40 60 80 -40 -15 10 35 60 8 5 t emperature ( c) t ransition voltage (mv) v hyst v th v tl v cc = 3.3v -40 -20 0 20 40 60 80 3.0 3.1 3.2 3.3 3.4 3.5 3 .6 power supply voltage (v) t ransition voltage (mv) v hyst v tl 4.0 4.5 5.0 5.5 6.0 6.5 7.0 -40 -15 10 35 60 85 t emperature ( c) supply current (ma) v cc = 3.3v 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0 3.0 3.1 3.2 3.3 3.4 3.5 3 .6 power supply voltage (v) disabled supply current (ma) 3.6 3.9 4.2 4.5 4.8 5.1 5.4 11 0 100 1000 10000 1000 00 data rate (kbaud) supply current (ma) no load 50pf load 1 ttl load v cc = 3.0v
8 date: 04/27/06 sp26lv432 high speed, low power quad differential line receiver ? copyright 2006 sipex corp oration the sp26lv432 is a low-power quad differ- ential line receiver designed for digital data transmission meeting specifications of the eia standard rs-422 protocol. the sp26lv432 features sipex's bicmos pro- cess allowing low power operational char- acteristics of cmos technology while meet- ing all of the demands of the rs-422 serial protocol to at least 50mbps under load in harsh environments. the rs-422 standard is ideal for multi-drop applications and for long-distance commu- nication. the rs-422 protocol allows up to ten receivers to be connected to a data bus, making it an ideal choice for multi-drop ap- plications. since the cabling can be as long as 4,000 feet, the rs-422 receivers have an input sensitivity of 200mv over the wide (-7.0v to +7.0v) common mode range to accommodate ground potential differences. internal pull-up and pull-down resistors prevent output oscillation on un- used channels. because the rs-422 is a differential interface, data is virtually im- mune to noise in the transmission line. figure 21. two-wire balanced systems, rs-422 *r t enable d ata d ata output *r t is optional although highly recommended to reduce reflection. driver side such as sp26lv431 receiver side such as sp26lv432 figure 20. truth table, enable/disable function common to all four rs-422 receivers the sp26lv432 accepts rs-422 levels and translates t hese into ttl or cmos input levels. the sp26lv432 features active high and active low receiver enable controls common to all four receiver channels. a logic high on the enable pin (pin 4) or a logic low on the enable pin (pin 12) will enable the differential receiver outputs. a logic low on the enable pin (pin 4) and a logic high on the enable pin (pin 12) will force the receiver outputs into high imped- ance (high-z). refer to the truth table in figure 20. the rs-422 line receivers feature high source and sink current capability. all re- ceivers are internally protected against short circuits on their inputs. the receivers fea- ture tri-state outputs with 6ma source and sink capability. the typical receiver propa- gation delay is 14ns (35ns max). to minimize reflections, the multipoint bus transmission line should be terminated at both ends in its characteristic impedance, and stub lengths off the main line should be kept as short as possible. theory of operation e l b a n ee l b a n et u p n it u p t u o w o lh g i he r a c t ' n o dz - h g i h h g i he r a c t ' n o dv d i > v h t ) x a m (h g i h h g i he r a c t ' n o dv d i < v h t ) n i m (w o l e r a c t ' n o dw o lv d i > v h t ) x a m (h g i h e r a c t ' n o dw o lv d i < v h t ) n i m (w o l h g i he r a c t ' n o dn e p oh g i h e r a c t ' n o dw o ln e p oh g i h
9 date: 04/27/06 sp26lv432 high speed, low power quad differential line receiver ? copyright 2006 sipex corp oration package: 16 pin pdip ea eb e d1 d l a1 b b2 e b3 n 1 23 index area n/2 e e1 c b symbol min nom max a--0 .21 a1 0.15 - - a2 0.115 0.13 0.195 b0. 014 0.018 0.022 b2 0.045 0.06 0.07 b3 0.3 0.039 0.045 c0. 008 0.01 0.014 d0. 735 0.75 0.755 d1 0.005 - - e0.30. 31 0.325 e1 0.24 0.25 0.28 e ea eb - - 0.43 l0. 115 0.13 0.15 note: dimensions in (mm) .100 bsc .300 bsc 16 pin pdip jedec ms-001 (bb) variation a a2 c
10 date: 04/27/06 sp26lv432 high speed, low power quad differential line receiver ? copyright 2006 sipex corp oration package: 16 pin nsoic top view b gauge plane l1 l ? 1 ? seating plane l2 view c a a1 a2 see view c b b section b-b with plating c base metal b symbol min nom max a1.35- 1.75 a1 0.1 - 0.25 a2 1.25 - 1.65 b0.31- 0.51 c0.17- 0.25 d e e1 e l0.4- 1.27 l1 l2 ?0o-8o ?1 5o - 15o note: dimensions in (mm) 1.27 bsc 1.04 ref 0.25 bsc 16 pin nsoic jedec mo-012 (ac) variation 9.90 bsc 6.00 bsc 3.90 bsc e e/2 e1 index area (d/2 x e1/2) e1/2 d 1 e side view seating plane
11 date: 04/27/06 sp26lv432 high speed, low power quad differential line receiver ? copyright 2006 sipex corp oration ordering information model temperature range package SP26LV432CP ............................................................................. 0 c to +70 c ..................................................................................... 16Cpin pdip SP26LV432CP-l ......................................................................... 0 c to +70 c ..................................................................................... 16Cpin pdip sp26lv432cn ............................................................................ 0 c to +70 c .................................................................................. 16Cpin nsoic sp26lv432cn-l ......................................................................... 0 c to +70 c .................................................................................. 16Cpin nsoic sp26lv432cn/tr ...................................................................... 0 c to +70 c .................................................................................. 16Cpin nsoic sp26lv432cn-l/tr ................................................................... 0 c to +70 c .................................................................................. 16Cpin nsoic solved by sipex sipex corporation reserves the right to make changes to any products described herein. sipex does not assume any liability aris ing out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor t he rights of others. sipex corporation headquarters and sales office 233 south hillview drive milpitas, ca 95035 tel: (408) 934-7500 fax: (408) 935-7600 date revision description 3/08/04 a production release. 3/08/04 b included tape and reel p/n. 4/17/06 c fixed truth table typo pg1 revision history available in lead free packaging. to order add -l suffix to part number. example: sp26lv432cn/tr = standard; sp26lv432cn-l/tr = lead free /tr = tape and reel pack quantity is 2,500 for nsoic.

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