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1 a micropower cmos operational amplifiers ad8502/ad8504 rev. a information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2007C2009 analog devices, inc. all rights reserved. features supply current: 1 a maximum/amplifier offset voltage: 3 mv maximum single-supply or dual-supply operation rail-to-rail input and output no phase reversal unity gain stable applications portable equipment remote sensors low power filters threshold detectors current sensing pin configurations out a 1 ?in a 2 +in a 3 v? 4 v+ 8 out b 7 ?in b 6 +in b 5 ad8502 top view (not to scale) 06323-001 figure 1. 8-lead sot-23 1 2 3 4 5 6 7 ad8504 ?in a +in a v+ out b ?in b +in b out a 14 13 12 11 10 9 8 ?in d +in d v? out c ?in c +in c out d top view (not to scale) 06323-038 figure 2. 14-lead tssop (ru-14) general description the ad8502/ad8504 are low power, precision cmos operational amplifiers featuring a maximum supply current of 1 a per amplifier. the ad8502/ad8504 have a maximum offset voltage of 3 mv and a typical input bias current of 1 pa operating rail- to-rail on both the input and output. the ad8502/ad8504 can operate from a single-supply voltage of +1.8 v to +5.5 v or a dual-supply voltage of 0.9 v to 2.75 v. with its low power consumption, low input bias current, and rail-to-rail input and output, the ad8502/ad8504 are ideally suited for a variety of battery-powered portable applications. potential applications include bedside monitors, pulse monitors, glucose meters, smoke and fire detectors, vibration monitors, and backup battery sensors. the ability to swing rail-to-rail at both the input and output helps maximize dynamic range and signal-to-noise ratio in systems that operate at very low voltages. the low offset voltage allows use of the ad8502/ad8504 in systems with high gain without creating excessively large output offset errors. the ad8502 and ad8504 offer an additional benefit by providing high accuracy without the need for system calibration. the ad8502/ad8504 are fully specified over the industrial temperature range (?40c to +85c) and the extended indus- trial temperature range (?40c to +125c). the ad8502 is available in an 8-lead, sot-23 surface-mount package. the ad8504 is available in a 14-lead tssop surface-mount package. table 1. low supply current op amps supply current 1 a 10 a 20 a single ad8500 dual ad8502 ada4505-2 ad8506 quad ad8504 ada4505-4 ad8508
ad8502/ad8504 rev. a | page 2 of 16 table of contents features .............................................................................................. 1 applications ....................................................................................... 1 pin configurations ........................................................................... 1 general description ......................................................................... 1 revision history ............................................................................... 2 specifications ..................................................................................... 3 electrical characteristics ............................................................. 3 absolute maximum ratings ............................................................6 thermal resistance .......................................................................6 esd caution...................................................................................6 typical performance characteristics ..............................................7 outline dimensions ....................................................................... 14 ordering guide .......................................................................... 14 revision history 2/09rev. 0 to rev. a changes to general description section ...................................... 1 added table 1; renumbered sequentially .................................... 1 changes to typical performance characteristics section ........... 7 updated outline dimensions ....................................................... 14 1/07revision 0: initial version
ad8502/ad8504 rev. a | page 3 of 16 specifications electrical characteristics @ v s = 5 v, v cm = v s /2, t a = 25c, unless otherwise noted. table 2. parameter symbol conditions min typ max unit input characteristics offset voltage v os 0 v < v cm < 5 v 0.5 3 mv ?40c < t a < +85c 5 mv ?40c < t a < +125c 5.5 mv offset voltage drift v os /t ?40c < t a < +85c 7 v/c ?40c < t a < +125c 5 v/c input bias current i b 0 v < v cm < 5 v 1 10 pa ?40c < t a < +85c 100 pa ?40c < t a < +125c 600 pa input offset current i os 0 v < v cm < 5 v 0.5 5 pa ?40c < t a < +85c 50 pa ?40c < t a < +125c 100 pa input voltage range ivr 0 5.0 v common-mode rejection ratio cmrr 0 v < v cm < 5 v 67 76 db ?40c < t a < +85c 65 db ?40c to +125c 65 db large signal voltage gain a vo 0.1 v < v out < 4.9 v; r load = 1 m 98 120 db 0.1 v < v out < 4.9 v; ?40c < t a < +85c 93 db 0.1 v < v out < 4.9 v; ?40c < t a < +125c 75 db input capacitance c diff 2 pf c cm 4.5 pf output characteristics output voltage high v oh r load = 100 k to gnd 4.970 4.990 v ?40c < t a < +85c 4.960 v ?40c to +125c 4.950 v r load = 10 k to gnd 4.900 4.930 v ?40c < t a < +85c 4.810 v ?40c to +125c 4.650 v output voltage low v ol r load = 100 k to v s 1.6 5 mv ?40c < t a < +85c 7 mv ?40c to +125c 7 mv r load = 10 k to v s 15 20 mv ?40c < t a < +85c 37 mv ?40c to +125c 40 mv short-circuit current i sc v out = gnd 5 ma power supply power supply rejection ratio psrr 1.8 v < v s < 5 v 85 105 db ?40c < t a < +85c 66 db ?40c < t a < +125c 66 db supply current/amplifier i sy v o = v s /2 0.75 1 a ?40c < t a < +85c 1.5 a ?40c < t a < +125c 2 a dynamic performance slew rate sr r load = 1 m 0.004 v/s gain bandwidth product gbp 7 khz phase margin ? o 60 degrees
ad8502/ad8504 rev. a | page 4 of 16 parameter symbol conditions min typ max unit noise performance peak-to-peak noise 0.1 hz to 10 hz 6 v p-p voltage noise density e n f = 1 khz 190 nv/hz current noise density i n f = 1 khz 0.1 pa/hz @ v s = 1.8 v, v cm = v s /2, t a = 25c, unless otherwise noted. table 3. parameter symbol conditions min typ max unit input characteristics offset voltage v os 0 v < v cm < 1.8 v 0.5 3 mv ?40c < t a < +85c 5 mv ?40c < t a < +125c 5.5 mv offset voltage drift ?v os /?t ?40c < t a < +85c 7 v/c ?40c < t a < +125c 5 v/c input bias current i b 0 v < v cm < 1.8 v 1 10 pa ?40c < t a < +85c 100 pa ?40c < t a < +125c 600 pa input offset current i os 0 v < v cm < 1.8 v 0.5 5 pa ?40c < t a < +85c 50 pa ?40c < t a < +125c 100 pa input voltage range ivr 0 1.8 v common-mode rejection ratio cmrr 0 v < v cm < 1.8 v 59 75 db ?40c < t a < +85c 56 db ?40c < t a < +125c 55 db large signal voltage gain a vo 0.1 v < v out < 1.7 v; r load = 1 m 88 110 db 0.1 v < v out < 1.7 v; ?40c < t a < +85c 80 db 0.1 v < v out < 1.7 v; ?40c < t a < +125c 65 db input capacitance c diff 2 pf c cm 4.5 pf output characteristics output voltage high v oh r load = 100 k to gnd 1.79 1.795 v ?40c < t a < +85c 1.78 v ?40c to +125c 1.77 v r load = 10 k to gnd 1.75 1.764 v ?40c < t a < +85c 1.70 v ?40c to +125c 1.65 v output voltage low v ol r load = 100 k to v s 1.0 5 mv ?40c < t a < +85c 6 mv ?40c to +125c 7 mv r load = 10 k to v s 10 20 mv ?40c < t a < +85c 28 mv ?40c to +125c 29 mv short-circuit current i sc 5 ma power supply power supply rejection ratio psrr 1.8 v < v s < 5 v 85 105 db ?40c < t a < +85c 66 db ?40c < t a < +125c 66 db supply current/amplifier i sy v o = v s /2 0.65 1 a ?40c < t a < +85c 1.5 a ?40c < t a < +125c 2 a
ad8502/ad8504 rev. a | page 5 of 16 parameter symbol conditions min typ max unit dynamic performance slew rate sr r load = 1 m 0.004 v/s gain bandwidth product gbp 7 khz phase margin ? o 60 degrees noise performance peak-to-peak noise 0.1 hz to 10 hz 6 v p-p voltage noise density e n f = 1 khz 190 nv/hz current noise density i n f = 1 khz 0.1 pa/hz
ad8502/ad8504 rev. a | page 6 of 16 absolute maximum ratings t a = 25c, unless otherwise noted. table 4. parameter rating supply voltage 6 v input voltage v ss ? 0.3 v to v dd + 0.3 v differential input voltage 6 v output short-circuit duration to gnd indefinite storage temperature range ?65c to +150c operating temperature range ?40c to +125c junction temperature range ?65c to +150c lead temperature (soldering, 60 sec) 300c stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. absolute maximum ratings apply at 25c, unless otherwise noted. thermal resistance ja is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. table 5. thermal characteristics package type ja jc unit 8-lead sot-23 (rj-8) 376 126 c/w 14-lead tssop (ru-14) 180 35 c/w esd caution
ad8502/ad8504 rev. a | page 7 of 16 typical performance characteristics t a = 25c, unless otherwise noted. 06323-002 number of amplifiers v os (v) 0 20 40 60 80 100 120 140 160 ?2400 ?1800 ?1200 ?600 0 600 1200 1800 2400 figure 3. input offset voltage distribution (0 v < v cm < 5.0 v), v s = 5 v number of amplifiers tcv os (v/c) 06323-003 135791113151719212325 200 50 100 150 0 figure 4. input offset voltage temperature drift distribution (?40c < t a < +85c), v s = 5 v 1000 ?1000 800 ?800 400 ?400 600 ?600 200 ?200 0 v os (v) v cm (v) 012345 06323-004 figure 5. input offset voltage vs. common-mode voltage, v s = 5 v ?40 ?20 0 20 40 60 80 100 120 1000 10 100 0.1 1 0.01 0.001 input bias current (pa) temperature (c) 06323-005 figure 6. input bias current vs. temperature (v s = 1.8 v and 5.0 v) 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 1000 10 100 0.1 1 0.01 0.001 input bias current (pa) v cm (v) i b (+85c) i b (+25c) i b (?40c) i b (+125c) 0 6323-006 figure 7. input bias current vs. common-mode voltage, v s = 5 v 0.5 0.6 0.7 0.8 0.9 1.0 70 30 40 50 60 20 10 0 number of amplifiers i sy (a) 06323-007 figure 8. supply current distribution, v s = 5 v
ad8502/ad8504 rev. a | page 8 of 16 0.9 1.0 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0123456 i sy ( a) v s (v) 0 06323-008 figure 9. supply current vs. supply voltage i sy (a) temperature (c) 0 0.2 0.4 0.6 0.8 1.0 1.2 ?40 ?25 ?10 5 20 35 50 65 80 95 110 125 i sy @ 5.0v i sy @ 1.8v 06323-009 figure 10. supply current vs. temperature i sy (na) v cm (v) 600 650 700 750 800 850 900 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 0 6323-010 figure 11. supply current vs. input common-mode voltage, v s = 5 v 1000 100 10 1 0.1 0.01 0.001 0.01 0.1 1 output saturation voltage (mv) load current (ma) source sink 06323-011 figure 12. output saturation voltage vs. load current, v s = 5 v 100 10 1 0.1 ?40 10 ?15 35 60 85 output saturation voltage (mv) temperature (c) v ol @ 100k ? load v oh @ 100k ? load v ol @ 10k? load v oh @ 10k? load 06323-012 figure 13. output saturation voltage vs. temperature, v s = 5 v 80 60 40 20 0 ?20 ?40 ?60 ?80 10 100 1k 10k 100k open-loop gain (db) phase margin (degrees) frequency (hz) ?120 ?90 ?60 ?30 0 30 60 120 90 06323-013 gain phase figure 14. open-loop gain and phase vs. frequency, v s = 5 v
ad8502/ad8504 rev. a | page 9 of 16 0.01 0.1 1 10 cmrr (db) frequency (khz) 10 2 0 30 40 50 60 70 80 90 100 1 1 0 120 0 06323-014 figure 15. cmrr vs. frequency, v s = 5 v psrr (db) frequency (khz) 10 2 0 30 40 50 60 70 80 90 100 0.01 0.1 1 10 0 0 6323-015 figure 16. psrr vs. frequency, v s = 5 v 35 15 20 25 30 10 5 0 10 100 1000 overshoot (%) load capacitance (pf) os+ os? 06323-016 figure 17. small signal overshoot vs. load capacitance, v s = 5 v 0.20 ?0.20 0.15 ?0.15 0.10 ?0.10 0.05 ?0.05 0 ?0.5 0 0.5 1.0 1.5 voltage (v) time (ms) 06323-017 figure 18. small signal transient response (no load), v s = 5 v 0.20 ?0.20 0.15 ?0.15 0.10 ?0.10 0.05 ?0.05 0 voltage (v) 0 6323-018 ?0.5 0 0.5 1.0 1.5 time (ms) figure 19. small signal transient response (100 pf load capacitance, v s = 5 v) 6 5 4 3 1 2 0 ?2 1234567 0 ?1 8 voltage (v) time (ms) 06323-019 figure 20. large signal transient response no load), v s = 5 v
ad8502/ad8504 rev. a | page 10 of 16 voltage (2v/div) time (40s/div) v s v out gain = +1 v in = v s/2 06323-020 figure 21. turn-on transient response, v s = 5 v 4 3 2 1 0 ?1 ?2 ?3 ?4 ?0.005 ?0.003 ?0.001 0.001 0.003 0.005 0.007 0.009 voltage (v) time (s) v out v in 06323-021 figure 22. no phase reversal, v s = 5 v 4 2 0 1 3 ?1 ?2 ?4 ?3 ?5 ?4 ?3 ?2 ?1 0 1 2 3 4 5 peak-to-peak voltage (v) time (s) 06323-022 figure 23. 0.1 hz to 10 hz input voltage noise (v s = 5 v and 1.8 v) 1000 100 10 1 10 100 1k voltage noise density (nv/ hz) frequency (hz) 06323-023 figure 24. input voltage noise (v s = 5 v and 1.8 v) number of amplifiers v os (v) 06323-024 0 20 40 60 80 100 120 140 160 ?2400 ?1800 ?1200 ?600 0 600 1200 1800 2400 figure 25. input offset voltage distribution (0 v < v cm < 1.8 v), v s = 1.8 v 200 50 100 150 0 number of amplifiers tcv os (v/c) 06323-025 1 3 5 7 9 11 13 15 17 19 21 23 25 figure 26. input offset voltage temperature drift distribution (?40c < t a < +85c), v s = 1.8 v
ad8502/ad8504 rev. a | page 11 of 16 1000 ?1000 ?800 ?600 ?400 ?200 0 200 400 600 800 0 0.3 0.6 0.9 1.2 1.5 1.8 v os (v) v cm (v) 06323-026 figure 27. input offset voltage vs. input common-mode voltage, v s = 1.8 v 1000 100 10 1 0.1 0.01 0.001 0 0.3 0.6 0.9 1.2 1.5 1.8 i b (pa) v cm (v) i b (?40c) 06323-027 i b (+25c) i b (+125c) i b (+85c) figure 28. input bias current vs . input common-mode voltage, v s = 1.8 v 70 60 50 40 30 20 10 0 number of amplifiers i sy (a) 0.5 0.4 0.6 0.7 0.8 0.9 06323-028 figure 29. supply current distribution, v s = 1.8 v i sy (na) v cm (v) 600 550 500 650 700 0 0.3 0.6 0.9 1.2 1.5 1.8 06323-029 figure 30. supply current vs. input common-mode voltage, v s = 1.8 v 1000 100 10 1 0.01 0.1 0.001 0.01 0.1 1 output saturation voltage (mv) load current (ma) source sink 06323-030 figure 31. output saturation voltage vs. load current v s = 1.8 v 100 10 1 0.1 ?40 ?15 10 35 85 60 output saturation voltage (mv) temperature (c) v oh @ 10k ? load v ol @ 10k? load v oh @ 100k ? load v ol @ 100k ? load 06323-031 figure 32. output saturation voltage vs. temperature, v s = 1.8 v
ad8502/ad8504 rev. a | page 12 of 16 open-loop gain (db) phase margin (degrees) frequency (hz) ?80 ?60 ?40 ?20 0 20 40 60 80 10 100 1k 10k 100k 06323-032 ?120 ?90 ?60 ?30 30 0 60 120 90 phase gain figure 33. open-loop gain and phase vs. frequency, v s = 1.8 v 100 90 80 70 60 50 40 30 20 10 0 0.01 0.1 1 10 cmrr (db) frequency (khz) 06323-033 figure 34. cmrr vs. frequency, v s = 1.8 v 35 30 25 20 15 10 5 0 10 100 1000 overshoot (%) load capacitance (pf) os? os+ 06323-034 figure 35. small signal overshoot vs. load capacitance, v s = 1.8 v 0.20 0.15 ?0.15 0.10 ?0.10 0.05 ?0.05 0 ?0.20 ?0.5 0 0.5 1.0 1.5 voltage (v) time (ms) 06323-035 figure 36. small signal transient response (no load), v s = 1.8 v
ad8502/ad8504 rev. a | page 13 of 16 0.20 0.15 ?0.15 0.10 ?0.10 0.05 ?0.05 0 ?0.20 0 0.5 1.0 1.5 voltage (v) time (ms) ?0.5 0 6323-036 figure 37. small signal transient response (100 pf load capacitance), v s = 1.8 v 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0 0.2 ?2?1012345678 voltage (v) time (ms) 06323-037 figure 38. large signal transient response (no load), v s = 1.8 v 0 ?120 ?110 ?100 ?90 ?80 ?70 ?60 ?50 ?40 ?30 ?20 ?10 10060 1k 2k 5k 500 200 10k 20k 06323-039 channel separation (db) frequency (hz) ? + v in 10k ? ? + 10k ? 10k ? 1m ? 1v p-p out b out c out d a b, c, and d figure 39. channel separation
ad8502/ad8504 rev. a | page 14 of 16 outline dimensions compliant to jedec standards mo-178-ba 121608-a 8 4 0 seating plane 1.95 bsc 0.65 bsc 0.60 bsc 76 1234 5 3.00 2.90 2.80 3.00 2.80 2.60 1.70 1.60 1.50 1.30 1.15 0.90 0 .15 max 0 .05 min 1.45 max 0.95 min 0.22 max 0.08 min 0.38 max 0.22 min 0.60 0.45 0.30 pin 1 indicator 8 figure 40 . 8-lead small outline transistor package [sot-23] (rj-8) dimensions shown in millimeters compliant to jedec standards mo-153-ab-1 061908-a 8 0 4.50 4.40 4.30 14 8 7 1 6.40 bsc pin 1 5.10 5.00 4.90 0.65 bsc 0.15 0.05 0.30 0.19 1.20 max 1.05 1.00 0.80 0.20 0.09 0.75 0.60 0.45 coplanarity 0.10 seating plane figure 41. 14-lead thin shrink small outline package [tssop] (ru-14) dimensions shown in millimeters ordering guide model temperature range package desc ription package option branding ad8502arjz-r2 1 ?40c to +125c 8-lead sot-23 rj-8 a1d ad8502arjz-reel 1 ?40c to +125c 8-lead sot-23 rj-8 a1d AD8502ARJZ-REEL7 1 ?40c to +125c 8-lead sot-23 rj-8 a1d ad8504aruz 1 ?40c to +125c 14-lead tssop ru-14 ad8504aruz-reel 1 ?40c to +125c 14-lead tssop ru-14 1 z = rohs compliant part.
ad8502/ad8504 rev. a | page 15 of 16 notes
ad8502/ad8504 rev. a | page 16 of 16 notes ?2007C2009 analog devices, inc. all rights reserved. trademarks and registered trademarks are the prop erty of their respective owners. d06323-0-2/09(a)

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