1/4 rev. a structure silicon monolithic integrated circuit product series 7-channel switching regulator controller for digital came ra type ? pin assignment fig.1 block diagram fig.1 package fig.2 functions power supply voltage 2.25.5v(a t start-up), 2.055.5v(after s tart-up) ch1step-down converter, ch2cross converter, ch3 step-down converter, ch4 step- down converter ch5 inverting converter for ccd, ch6 boost converter for ccd, c h7 boost converter for led all internal power mosfets built-in mosfets for synchronous rectifying action mode on ch 14 built-in feedback resistors on ch2 all channels contain internal compensation between inputs out puts of error amps contains sequence control circuit for ch14 operating frequency 1.5mhz(ch1,3,4)?750khzch2,5,6,7 built-in short-circuit protection (scp) ch6 have high side switches with soft start function built-in over voltage protection (ovp) thermally enhanced uqfn036v5050 package5mm5mm, 0.4mm pitch absolute maximum ratingsta25 parameter symbol limit unit power input voltage vcc,hx13,hx2, hx4,hx567,vo2,hs6l 0.37 v stb1234,56 0.37 v pwm7 0.37 v hx5 - lx5 -0.315 v lx6 0.320 v lx7,vo7 -0.321 v output current iomaxlx1 0.8 a iomaxhx2 1.5 a iomaxhx3 0.8 a iomaxhx4,lx4 1.0 a iomaxhx5 1.5 a iomaxhs6l 1.2 a iomaxlx67 1.2 a power dissipation pd 0.88 *1 w o p e r a t i n g t e m p e r a t u r e topr 25+85 s t o r a g e t e m p e r a t u r e tstg 55+150 j u n c t i o n t e m p e r a t u r e tjmax +150 *1 should be derated by 7.04mw/ at ta=25 or more. when mounted on a glass epoxy pcb of 74.2mm 74.2 mm 1.6 mm recommended operating conditions parameter symbol limit unit min typ max power supply voltage (at start-up) vcc1 2.2 - 5.5 v power supply voltage (after start-up) vcc2 2.05 - 5.5 v vref pin connecting catacito r cvref 0.047 0.1 0.47 f vrega pin connecting capacitor cvrega 0.47 1.0 4.7 f pwm7 freqency fpwm 20 - 100 khz oscillator oscillator (ch1,3,4) fosc 0.8 1.5 1.8 mhz osc timing resistor rt 47 62 120 k
2/4 rev. a electrical characteristics ta=25, vcc=3v, rt=62k, stb16=3v,pwm7=2.5v (1) when circuit is operated by 100% duty at ch1,3 and ch4, s cp timer start. so it is possible to use o nly for transition time shorte r than tscp. (2) recommend resistor value ov er 20k between vref to inv5, because vref current is under 100ua. and, please set resistor value considered phase compensa tion for coil and output capacitor. (3) related to led quantity , l ed forward voltage and input v oltage. this product is not designed f or normal operation with in a r adioactive environment.. parameter symbol standard value unit condition min typ max soft start ch1,2,4 soft start time tss1,2,4 1.5 2.5 3.5 msec rt=62k ch3 soft start time tss3 0.5 1.5 2.5 msec rt=62k ch5 soft start time tss5 1.8 2.8 3.8 msec rt=62k ch6 soft start time tss6 2.5 3.5 4.5 msec rt=62k ch7 soft start time t dtc 1.3 2.6 5.2 msec l=6.4h, co=4.7f led 3pcs (3) ch14 delay time for soft start td1 9 15 21 msec rt=62k ch 5,6 delay time for soft start td56 0.23 0.42 0.61 msec rt=62k, stb1234=h output driver ch1 highside sw on resisitance ron1p - 300 450 m hx1=3.6v ch1 lowside sw on resistance ron1n - 230 350 m hx1=3.6v ch2 lx21 highside sw on resistance ron21p - 120 180 m hx2=3.6v ch2 lx21 lowside sw on resisitance ron21n - 120 180 m hx2=3.6v, ch2 lx22 highside sw on resistance ron22p - 150 230 m vo2=3.4v ch2 lx22 lowside sw on resistance ron22n - 120 180 m hx2=3.6v ch3 highside sw on resistance ron3p - 300 450 m hx3=3.6v ch3 lowside sw on resistace ron3n - 230 350 m hx3=3.6v ch4 highside sw on resistace ron4p - 190 290 m hx4=3.6v ch4 lowside sw on resistance ron4n - 110 170 m hx4=5v ch5 pmos sw on resistace ron5p - 600 900 m hx56=3.6v ch6,7 nmos sw on resistance ron6n - 500 800 m hx56=3.6v ch6 load sw on resistace ron67p - 200 300 m hx56=3.6v stb16 stb control voltage active vstbh1 1.5 - 5.5 v non active vstbl1 -0.3 - 0.3 v pull down resistance rstb1 250 400 700 k stb1234, stb56 pwm7 pwm7 control voltage h level vpwmh 2.05 - 4.00 v l level vpwml 0 - 0.40 v pull down resistance rpwm 250 400 700 k ch7 delay time for shutdown toff7 200 300 - sec rt=62k ledsw led pin sw on resistance rled - 2 3 vcc=3.6v ovp ovp threshold vovp7 18 19 20 v vo7 monitor circuit current stand-by current vcc terminal istb1 - - 5 a h terminal istb2 - - 5 a lx terminal istb3 - - 5 a circuit current vcc pin current icc - 5.0 11.0 ma inv1-7=1.2v inv5=-0.2v vcc= 3.0v parameter symbol standard value unit condition min typ max internal regulator vrega output voltage vreg a 2.125 2.2 2.275 v io=5ma under voltage lockout vcc startup voltage threshold vuv1 - 1.95 2.05 v vcc minimum operating voltage after turn-on vuv2 - 2.05 2.15 v vrega startup voltage threshold vuv3 - - 2.025 v vcc=2.2v vrega minimum operating voltage after turn-on vuv4 - - 2.15 v vcc=2.2v short circuit protection timer startup threshold vtcinv 0.42 0.48 0.54 v inv pin monitor ch4 delay time for scp 1 tscp 50 70 90 msec ch17 oscillator frequency ch1,3,4 fosc1 1.3 1.5 1.7 mhz rt=62k rrequency ch2,5,6,7 fosc2 0.65 0.75 0.85 mhz rt=62k max duty 1,3 dmax1 d - - 100 % vscp=0v (1) max duty 4 dmax1 u - - 100 % max duty 5,6,7 dmax2 86 92 96 % max duty ch2 lx21 dmax3 - - 100 % max duty ch2 lx22 dmax4 86 92 96 % error amp input bias current iinv - 0 50 na inv1,36=3.0v inv threshold vinv 0.79 0.80 0.81 v ch1,36 inv7 threshold 1 vinv7 1 598 630 662 mv pwm7 duty=100% inv7 threshold 2 vinv7 2 449 473 497 mv pwm7 duty=75% inv7 threshold 3 vinv7 3 234 252 270 mv pwm7 duty=40% inv7 threshold 4 vinv7 4 17 32 47 mv pwm7 duty=5% ch2 feedback ch2 output voltage vo2 3.332 3.4 3.46 8 v vo2s input current ivo2s 4.7 6.7 8.7 ua vo2s= 3.4v reference voltage vref for ch5 ch5 output voltage vout 5 -6.09 -6.00 -5.91 v inv5 1m//200k, 1m(2) line regulation dvli - 4.0 12.5 mv vcc= 2.25v output current when shorted ios 0.2 1.0 - ma vref5=0v
3/4 rev. a pin assignment ?block diagram 123456789 19 10 11 12 13 14 15 16 17 18 202122 23 2425 26 27 36 35 34 33 32 31 30 29 28 lx6 pgnd567 lx7 pgnd4 lx4 hx4 stb1234 hx13 lx1 pgnd13 lx3 hx2 lx21 pgnd2 lx22 vo2 vcc vo2s scp vrega inv3 inv1 inv4 rt gnd vref5 inv5 inv6 inv7 led vo7 pwm7 hs6l hx567 lx5 stb56 + - + - + - 2.5v reg + - osc + - 1.0v vref + - + - filter ovp pre driver pre driver pre driver b.g ctl pre driver pre driver pre driver pre driver pwm & logic block package pin description C vcc ic power supply input gnd ground pgnd13,2,4,567 ground for internal fet vrega vrega output vref5 ch5 reference output hx13,2,4,567 ch13,5,6 pch fet source terminal , fet driver power supply lx1,3,4,5,6,7 terminal for connecting inductor lx21 terminal for connecting inductor for ch2 input lx22 terminal for connecting inductor for ch2 output vo2 ch2 dc/dc output hs6l output terminal for internal load switch inv1,3,4,5,6,7 error amp inverted input vo2s ch2 output feedback terminal rt terminal for connecting a resister to set the osc frequency scp scp timer flag terminal stb1234,56 ch1ch6 on/off control terminal pwm7 ch7 on/off control, pwm dimming input led terminal for connecting led cathode vo7 ch7 dc/dc output -2 fig .1 bd9354 lot no.
4/4 rev. a operation notes .) absolute maximum ratings this product is produced with strict quality control. howeve r, the ic may be destroyed if operated beyond its absolute maximum ratings. if the device is destroyed by exceeding the recommended maximum ratings, the failure mode will be difficult to determine. (e.g. short mode, open mode) therefore, physical protection counter-measures ( like fuse) should be implemented when operating conditions beyond the abs olute maximum ratings anticipated. .) gnd potential make sure gnd is connected at lowest potential. all pins exc ept non5, must not have voltage below gnd. also, non5 pin must not have voltage below - 0.3v on start up. .) setting of heat make sure that power dissipation does not exceed maximum ratings. .) pin short and mistake fitting avoid placing the ic near hot part of the pcb. this may cause damage to ic. also make sure that the output-to-output and output to gnd condition will not happen because this may damage the ic. .) actions in strong magnetic field exposing the ic within a strong magnet ic field area may cause malfunction. .) mutual impedance use short and wide wiring tracks for the main supply and ground to keep the mutual impedance as sma ll as possible. use inductor and capacitor network to keep the ripple voltage minimum. .) thermal shutdown circuit (tsd circuit) the ic incorporates a built-in thermal shutdown circuit (tsd circuit). the thermal shutdown circuit (tsd circuit) is designed only to shut the ic off to prevent runaway thermal operati on. it is not designed to protect the ic or guarantee its operation. do not continue to use the ic after operating this circuit or use the ic in an environment wh ere the operation of this circuit is assu med. .) rush current at the time of power supply injection. an ic which has plural power supplies, or cmos ic could have momentary rush current at the time of power supply injection. please take care about power supply coupling capacity and width of power supply and gnd pattern wiring. .) ic terminal input this ic is a monolithic ic that has a p- board and p+ isolation for the purpose of k eeping distance between elements. a p- n junction is formed between the p-layer and the n-layer of each el ement, and various types of parasitic elements are then formed. for example, an application where a resistor and a transistor are connected to a te rminal (shown in fig.15): when gnd > (terminal a) at the resistor and gnd > (terminal b) at the transistor (npn), the p-n junction operates as a parasitic diode. when gnd > (terminal b) at the transistor (n pn), a parasitic npn transistor operates as a result of the nhayers of other elements in the proximity of the aforementioned parasitic diode. parasitic elements are structurally inevitable in the ic due to electric potential relati onships. the operation of parasit ic elements induces the interference of circ uit operations, causing malfunc tions and possibly the destructi on of the ic. please be car eful not to use the ic in a way that would cause parasitic element s to operate. for example, by applying a voltage that is lower than the gnd (p-board) to the input terminal. fig - 3 simplified structure of a bipolar ic terminal ? gnd parasitic element parasitic lt terminal b transistor (npn) gnd p-board n p n p p b n e c gnd p-board n p n n p p terminal a parasitic element resistor
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