? semiconductor components industries, llc, 2011 august, 2011 ? rev. 0 1 publication order number: ncv7441/d ncv7441 dual high speed low power can transceiver the ncv7441, dual can transceiver offers two fully independent high ? speed can transceivers which can be individually connected to two can protocol controllers. the can channels can be separately put to normal or to standby mode, in which remote wakeup detection from the bus is possible. due to the shared auxiliary circuitry and common package, this circuit version can replace two standard high ? speed can transceivers while saving board space. features ? compatible with the iso 1 1898 standard (iso 11898 ? 2, iso 11898 ? 5 and sae j2284) ? low quiescent current ? high speed (up to 1 mbps) ? ideally suited for 12 v and 24 v industrial and automotive applications ? extremely low current standby mode with wakeup via the bus ? low eme without common ? mode choke ? no disturbance of the bus lines with an un ? powered node ? predictable behavior under all supply circumstances ? transmit data (txd) dominant time ? out function ? thermal protection ? bus pins protected against transients in an automotive environment ? power down mode in which the transmitter is disabled ? bus and v split pins short circuit proof to supply voltage and ground ? input logic levels compatible with 3.3 v devices ? up to 110 nodes can be connected to the same bus in function of topology ? pb ? free packages are available typical applications ? automotive ? industrial networks marking diagram http://onsemi.com see detailed ordering and shipping information in the package dimensions section on page 9 of this data sheet. ordering information 1 14 soic ? 14 nb case 751a ncv7441 ? 0 awlywwg 1 14 xxxxx = specific device code a = assembly location wl = wafer lot y = year ww = work week g = pb ? free package 14 13 12 11 10 9 8 1 2 3 4 5 6 7 txd1 rxd1 gnd vcc gnd rxd2 txd2 stb1 canh1 canl1 test/gnd canh2 canl2 stb2 pin connections ncv7441 dual can
ncv7441 http://onsemi.com 2 block diagram stb1 txd1 rxd1 gnd canh2 canl2 channel 2 control logic transmitter receiver low ? power receiver ncv7441 dual can canh1 canl1 channel 1 control logic transmitter receiver low ? power receiver stb2 txd2 rxd2 supply monitor thermal monitor pd20100615.01 test/ gnd figure 1. ncv7441 dual can: block diagram v cc v cc v cc v cc v cc table 1. pin function description pin number pin name pin type description 1 txd1 digital input; internal pull ? up transmit data for the 1 st can channel in normal mode; ignored in standby mode 2 rxd1 digital output received data from the 1 st can channel in normal mode; 1 st can channel remote wakeup indication in standby mode 3 gnd ground ground connection 4 v cc supply input 5 v supply connection 5 gnd ground ground connection 6 rxd2 digital output received data from the 2 nd can channel; 2 nd can channel remote wakeup indication in standby mode 7 txd2 digital input; internal pull ? up transmit data for the 2 nd can channel 8 stb2 digital input; internal pull ? up mode control input for the 2 nd can channel; stb2 = high puts the 2 nd can channel into standby mode 9 canl2 high ? voltage analog input/output canl ? wire connection of the 2 nd can channel 10 canh2 high ? voltage analog input/output canh ? wire connection of the 2 nd can channel 11 test / gnd test/ground the pin is used for test purposes during device production. it?s recommended to connect to ground in the end ? application. 12 canl1 high ? voltage analog input/output canl ? wire connection of the 1 st can channel 13 canh1 high ? voltage analog input/output canh ? wire connection of the 1 st can channel 14 stb1 digital input; internal pull ? up mode control input for the 1 st can channel; stb1 = high puts the 1 st can channel into standby mode
ncv7441 http://onsemi.com 3 typical application diagram ncv7441 ? 0 dual can canh1 canl1 canh2 canl2 gnd stb1 txd1 rxd1 stb2 txd2 rxd2 can1 can2 ldo 5v vbat pd20100615.03 mcu + can ctrl. 1 mcu + can ctrl. 2 gnd test/ gnd figure 2. ncv7441 dual can: example application diagram v cc functional description dual can device behaves identically to two independent can transceivers. the representative signal dependencies are shown in figure 4 and further functional description is given in table 2. table 2. functional description v cc stb1/2 txd1/2 rxd1/2 transceiver on canh1/2/canl1/2 comment < v cc_uv x x hz deactivated; unbiased the entire chip in under ? voltage > v cc_uv high x low ? power receiver output transmitter deactivated; bus biased to gnd through the input circuitry; receiver monitoring can1/2 wakeup can1/2 in standby mode low high indicates the signal received on can1/2 recessive signal transmitted on can1/2; bus biased to v cc /2 through the input circuitry can1/2 in normal mode low low dominant signal transmitted on can1/2; bus biased to v cc /2 through the input circuitry
ncv7441 http://onsemi.com 4 if the main power supply v cc (nominal 5 v) is above its under ? voltage (v cc_uv ) level, each can channel can enter either normal mode (when the corresponding stb1/2 digital input is pulled low) or standby mode (when the corresponding stb1/2 signal is left high): ? in the normal mode : ? the bus transceiver is ready to transmit and receive can bus signals with the full can communication speed (up to 1 mbps) and thus interconnect the can bus with the corresponding can controller through digital pins txd1/2 and rxd1/2 ? the bus pins are internally biased to typically v cc /2 through the input circuitry ? txd1/2 input pin is monitored by a timeout in order to prevent a permanent dominant being forced to the bus thus preventing other nodes from communicating. if txd1/2 is low for longer than t cnt(timeout) , the transmitter switches back to recessive. only when txd1/2 returns to high, the timeout counter is reset and the transmitter is ready to transmit dominant symbols again. the txd1/2 timeout protection is implemented individually for both can transceivers. ? a common thermal monitoring circuit compares the circuit junction temperatures with threshold t j(sd) . if the thermal shutdown level is exceeded, dominant transmission is disabled. the circuit remains biased and ready to transmit but the logical path from txd1/2 pin(s) is blocked. the transmission is again enabled when the junction temperature decreases below the shutdown level and the txd1/2 pin returns to the high level, thus avoiding thermal oscillations. ? in the standby mode : ? the respective transmitter is disabled and the current consumption of the channel is fundamentally reduced. only the low ? power receiver on the channel remains active in order to detect potential can bus wakeups. the logical signal on txd1/2 input is ignored. ? the bus pins are biased to gnd through the input circuitry ? digital output rxd1/2 signals the output of the low ? power receiver and can be used as a wakeup signal in the application. a filtering time td bus is applied between the bus activity and the rxd1/2 signal in order to ensure that only sufficiently long dominant signals on the bus will be propagated to the digital output. in addition, dominant bus signals are ignored in case they were present during normal ? to ? standby mode transition; in this way unwanted wakeups are avoided in case of permanent dominant failure on the bus. example waveforms illustrating bus activity detection in standby mode are shown in figure 3. in order to ensure a safe device state, the digital inputs stb1/2 and txd1/2 are connected through internal pull ? up resistors to v cc thus ensuring that both channels remain in standby mode and/or no dominant can be transmitted in case any of the digital inputs gets disconnected. pd20100209.08 stb1 stb2 rxd1 rxd2 canh/l1 canh/l2 ncv7441 http://onsemi.com 5 pd20100209.03 legend: re cei ve d d om ina nt tran smitte d dominant stb1 stb2 txd1 txd2 rxd1 rxd2 canh/l1 canh/l2 re mo te wakeup re mo te wakeup figure 4. ncv7441 dual can: functional graphs
ncv7441 http://onsemi.com 6 table 3. absolute maximum ratings symbol parameter min max unit v max_vcc supply voltage ? 0.3 6 v v max_digin voltage at digital inputs. txd1, txd2, stb1, stb2 ? 0.3 6 v v max_digout voltage at digital outputs. rxd1, rxd2, test/gnd ? 0.3 (v cc + 0.3) v v max_canh1/2 voltage on canh1/2 pin; no time limit ? 50 +50 v v max_canl1/2 voltage on canl1/2 pin ; no time limit ? 50 +50 v v max_diffcan absolute voltage difference between can pins: |v (canh1) ? v (canl1) |; |v (canh2) ? v (canl2) | 0 50 v t j(max) junction temperature ? 40 170 c esd system esd on canh1/2 and canl1/2 as per iec 61000 ? 4 ? 2: 330 / 150 pf ? 8 8 kv human body model on canh1/2 and canl1/2 as per jesd22 ? a114 / aec ? q100 ? 002 ? 8 8 kv human body model on other pins as per jesd22 ? a114 / aec ? q100 ? 002 ? 4 4 kv charge device model on all pins as per jesd22 ? c101 / aec ? q100 ? 011 ? 500 500 v stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. table 4. operating ranges symbol parameter min max unit v op_vcc supply voltage 4.75 5.25 v v op_digin voltage at digital inputs. dual can: txd1, txd2, stb1, stb2 0 v cc v v op_digout voltage at digital outputs. rxd1, rxd2 0 v cc v v op_canh1/2 voltage on canh1/2 pin guaranteed receiver function ? 35 35 v v op_canl1/2 voltage on canl1/2 pin guaranteed receiver function 35 35 v v op_diffcan absolute voltage difference between can pins: |v (canh1) ? v (canl1) |; |v (canh2) ? v (canl2) | guaranteed receiver function 0 35 v t j_op junction temperature ? 40 150 c
ncv7441 http://onsemi.com 7 table 5. electrical characteristics the characteristics defined in this section are guaranteed within the operating ranges listed in figure 4, unless stated otherw ise. positive currents flow into the respective pin. symbol parameter conditions min typ max unit v cc supply electrical characteristics v cc_uv v cc under voltage level 2.5 3.5 4.5 v i vcc_stdby v cc consumption both channels in standby mode; no wakeup detected; both buses recessive txd1 = txd2 = high 20 30 a i vcc_norm1 one channel in normal mode; txd1 = txd2 = high 3 5 11 ma i vcc_norm2 both channels in normal mode; txd1 = txd2 = high 6 10 20 ma digital inputs electrical characteristics ? pins txd1, txd2 v txx_l low level input voltage ? 0.3 0.8 v v txx_h high level input voltage 2 v cc + 0.3 v i txx_l low level input current v cc = 5 v v (txx) = gnd ? 75 ? 200 ? 350 a i txx_h high level input current v cc = 0 ... 5.25 v v (txx) = 5 v ? 0.5 0.5 a digital inputs electrical characteristics ? pins stb1, stb2 v stbx_l low level input voltage ? 0.3 0.8 v v stbx_h high level input voltage 2 v cc + 0.3 v i stbx_l low level input current v cc = 5 v v (stbx) = gnd ? 1 ? 4 ? 10 a i stbx_h high level input current v cc = 0 ... 5.25 v v (stbx) = 5 v ? 0.5 0.5 a digital outputs electrical characteristics ? pins rxd1, rxd2 i digout_l output current at low out- put level v (digout) = 0.4 v 2 6 12 ma i digout_h output current at high out- put level at least one channel enabled v (digout) = v cc ? 0.4 v ? 0.1 ? 0.4 ? 1 ma v digout_stdby output level in standby mode both channels in standby; i (digout) = ? 100 a v cc ? 1.1 v cc ? 0.7 v cc ? 0.4 v i digout_hz output current in high ? im- pedance state during v cc undervoltage; v (digout) = 0 v ... v cc ? 2 0 2 a can transmitter characteristics v o(reces)(canh1/2) recessive bus voltage at pin canh1/2 v txd1/2 = v cc ; no load on the bus, normal mode 2.0 2.5 3.0 v no load on the bus; standby mode ? 0.1 0 0.1 v o(reces)(canl1/2) recessive bus voltage at pin canl1/2 v txd1/2 = v cc ; no load on the bus, normal mode 2.0 2.5 3.0 v no load on the bus; standby mode ? 0.1 0 0.1 i o(reces)(canh1/2) recessive output current at pin canh1/2 ? 35 v < v canh1/2 < 35 v; 0 v < v cc < 5.25 v ? 2.5 ? 2.5 ma i o(reces)(canl1/2) recessive output current at pin canl1/2 ? 35 v < v canl1/2 < 35 v; 0 v < v cc < 5.25 v ? 2.5 ? 2.5 ma
ncv7441 http://onsemi.com 8 table 5. electrical characteristics the characteristics defined in this section are guaranteed within the operating ranges listed in figure 4, unless stated otherw ise. positive currents flow into the respective pin. symbol unit max typ min conditions parameter can transmitter characteristics v o(dom)(canh1/2) dominant output voltage at pin canh1/2 v txd1/2 = 0 v 3.0 3.6 4.25 v v o(dom)(canl1/2) dominant output voltage at pin canl1/2 v txd1/2 = 0 v 0.5 1.4 1.75 v v o(dif)(bus_dom) differential bus output voltage (v canh1/2 ? v canl1/2 ) v txd1/2 = 0 v, dominant; bus differential load: 42.5 < r l < 60 1.5 2.25 3.0 v v o(dif)(bus_rec) differential bus output voltage (v canh1/2 ? v canl1/2 ) v txd1/2 = v cc recessive, no load on the bus ? 120 0 50 mv i o(sc)(canh1/2) short ? circuit output current at pin canh1/2 v canh1/2 = 0 v, v txd1/2 = 0 v ? 100 ? 70 ? 45 ma i o(sc)(canl1/2) short ? circuit output current at pin canl1/2 v canl1/2 = 36 v, v txd1/2 = 0 v 45 70 100 ma can receiver and can pins electrical characteristics v i(dif)(th) differential receiver threshold voltage normal mode ? 12 v < v canh1/2 < 12 v ? 12 v < v canl1/2 < 12 v 0.5 0.7 0.9 v standby mode ? 12 v < v canh1/2 < 12 v ? 12 v < v canl1/2 < 12 v 0.4 0.8 1.15 v ihcm(dif)(th) differential receiver threshold voltage for high common mode normal mode ? 35 v < v canh1/2 < 35 v ? 35 v < v canl1/2 < 35 v 0.4 0.7 1 v v ihcm(dif)(hys) differential receiver input voltage hysteresis for high common mode normal mode ? 35 v < v canh1/2 < 35 v ? 35 v < v canl1/2 < 35 v 20 70 100 mv r i(cm)canh1/2 common mode input res- istance at pin canh1/2 15 26 37 k r i(cm)canl1/2 common mode input res- istance at pin canl1/2 15 26 37 k r i(cm)(m) matching between pin canh1/2 and pin canl1/2 common mode input resistance v canh1/2 = v canl1/2 ? 3 0 3 % r i(dif) differential input resist- ance 25 50 75 k c i(canh1/2) input capacitance at pin canh1/2 v txd1/2 = v cc not tested in production ? 7.5 20 pf c i(canl1/2) input capacitance at pin canl1/2 v txd1/2 = v cc not tested in production ? 7.5 20 pf c i(dif) differential input capacit- ance v txd1/2 = v cc not tested in production ? 3.75 10 pf i licanh1/2 input leakage current to pin canh1/2 v cc = 0 v; v canl1/2 = v canh1/2 = 5 v ? 10 0 10 a i licanl1/2 input leakage current to pin canl1/2 v cc = 0 v; v canl1/2 = v canh1/2 = 5 v ? 10 0 10 a thermal monitoring electrical characteristics t j(sd) thermal shutdown threshold junction temperature rising 150 185 c junction temperature falling 145 c
ncv7441 http://onsemi.com 9 table 5. electrical characteristics the characteristics defined in this section are guaranteed within the operating ranges listed in figure 4, unless stated otherw ise. positive currents flow into the respective pin. symbol unit max typ min conditions parameter dynamic electrical characteristics td (txd1/2 ? buson) delay txd1/2 to can1/2 bus active bus differential load 100 pf/60 20 85 120 ns td (txd1/2 ? busoff) delay txd1/2 to can1/2 bus inactive bus differential load 100 pf/60 30 105 ns td (buson ? rxd1/2) delay can1/2 bus active to rxd1/2 c rxd1/2 = 15 pf 25 55 105 ns td (busoff ? rx0) delay can1/2 bus inactive to rxd1/2 c rxd1/2 = 15 pf 30 100 105 ns td pd(txd1/2 ? rxd1/2)dr propagation delay txd1/2 to rxd1/2; dominant ? to ? recessive bus differential load 100 pf/60 30 245 ns td pd(txd1/2 ? rxd1/2)rd propagation delay txd1/2 to rxd1/2; recessive ? to ? dominant bus differential load 100 pf/60 75 230 ns td bus low ? power receiver filter- ing time standby mode v dif(dom) > 1.4 v 0.5 2.5 5 s standby mode v dif(dom) > 1.2 v 0.5 3 5.8 td wake delay to flag bus wakeup; time from can bus domin- ant start to rxdx falling edge standby mode; dominant longer than td bus 10 s td (nrm ? stb) transition delay from stb1/2 rising edge to can1/2 standby mode 10 s td (stb ? nrm) transition delay from stb1/2 falling edge to can1/2 normal mode 10 s t cnt(timeout) txd1/2 dominant time out v txd1/2 = 0 v 300 650 1000 s i digout_hz output current in high ? im- pedance state pins rxd1,2 during v cc under ? voltage; v (digout) = 0 v ... v cc ? 2 0 2 a ordering information device description temperature range package shipping ? NCV7441D20G dual hs ? can transceiver 40 c to 125 c soic ? 14 (pb ? free) 55 tube / tray ncv7441d20r2g 3000 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
ncv7441 http://onsemi.com 10 package dimensions soic ? 14 nb case 751a ? 03 issue k notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. dimension b does not include dambar protrusion. allowable protrusion shall be 0.13 total in excess of at maximum material condition. 4. dimensions d and e do not include mold protrusions. 5. maximum mold protrusion 0.15 per side. h 14 8 7 1 m 0.25 b m c h x 45 seating plane a1 a m s a m 0.25 b s c b 13x b a e d e detail a l a3 detail a dim min max min max inches millimeters d 8.55 8.75 0.337 0.344 e 3.80 4.00 0.150 0.157 a 1.35 1.75 0.054 0.068 b 0.35 0.49 0.014 0.019 l 0.40 1.25 0.016 0.049 e 1.27 bsc 0.050 bsc a3 0.19 0.25 0.008 0.010 a1 0.10 0.25 0.004 0.010 m 0 7 0 7 h 5.80 6.20 0.228 0.244 h 0.25 0.50 0.010 0.019 6.50 14x 0.58 14x 1.18 1.27 dimensions: millimeters 1 pitch soldering footprint* *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 ncv7441/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative
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