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device operating temperature range package semiconductor technical data multimode color monitor processor ordering information t a = 0 to +70 c plastic sdip b suffix plastic sdip package case 859 56 1 order this document by mc13081x/d MC13081XB 1 motorola analog ic device data

the mc13081x includes all the signal processing functions for a scan frequency agile and multiple sync system analog rgb monitor and includes the following functions: ? automatic horizontal frequency tracking of all commonly used personal computers, continuously adaptable from 30 khz to 64 khz ? syncongreen detection ? vertical timebase operates from 45 to 100 hz ? vertical and horizontal sync polarity detection with outputs for mode switching ? video preamplifiers typical rise/fall time of 5.0 ns at 3.0 vpp output voltage swing ? overall contrast control and independent rgb gain controls pin connections (top view) 1 vertical osc cap vertical hold vertical intergrator cap vertical ttl sync composite video in n/c 5.0 v reg n/c pd1 afc timebase gnd fh switch a fhia fh switch b fhib contrast brightness channel 1 subcontrast n/c n/c channel 1 video in video gnd channel 3 video in channel 3 subcontrast channel 2 video in channel 2 subcontrast 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 timebase v cc2 vertical sync det vertical size vertical ramp cap n/c n/c vertical ramp out video blanking in horizontal ttl sync horizontal freq control horizontal position horizontal sync det horizontal flyback pd2 horizontal drive width horizontal drive horizontal drive gnd xray shutdown channel 1 collector out channel 1 emitter out channel 1 clamp channel 2 collector out n/c n/c channel 2 emitter out channel 2 clamp video v cc1 channel 3 clamp channel 3 emitter out channel 3 collector out this document contains information on a new product. specifications and information herein are subject to change without notice. ? motorola, inc. 1996 rev 0
mc13081x 2 motorola analog ic device data 23 25 27 13 14 vert hold figure 1. block diagram blanking ttl vsync ttl hsync cvs vsync polar det hsync polar det v osc vert ramp cap vert size vert ramp hori position adjust hflyback pd2f hdrive timebase gnd xray shutdown hdrive width adjust video v cc collector out emitter out clamp subcontrast collector out emitter out clamp subcontrast collector out emitter out clamp subcontrast pd1f afc hori freq control timebase v cc +5.0 v output fha switch fha threshold fhb switch fhb threshold channel 1 video in channel 2 video in channel 3 video in contrast brightness video gnd sync source decoder and polarity control vertical oscillator vertical ramp generator v cc 10 k w hsync vsync 5 count latch blanking 1 phase detector 2 ramp 1 1/8 line shift #1 ramp generator phase detector up down x1 digital horizontal lock control 64 divider and clamp pulse decoder 64x oscillator 5 v regulator 64 h #2 ramp generator 3 xray channel 1 channel 2 channel 3 clamp pulse position sog detector brightness and contrast processor 4 5 6 53 54 1 51 52 48 2 47 55 46 45 43 42 horizontal driver 41 29 40 39 38 20 37 34 33 24 32 31 30 26 28 3 10 11 12 56 9 15 16 17 18 19 timebase gnd vert integrator cap ramp 2 this device contains 1074 active transistors. 44
mc13081x 3 motorola analog ic device data maximum ratings (t a = 25 c, unless otherwise noted.) rating pin value unit power supply voltage vdc video section v cc1 29 0.5, +10 timebase section v cc2 56 0.5, +10 brightness, contrast, horizontal flyback input, frequency switch when off 19, 18, 46, 14, 16 0 to v cc vdc xray shutdown 41 0.5, +0.9 vdc subcontrast rgb controls 20, 24, 26 0 to +2.0 vdc horizontal drive width, horizontal position 44, 55 0 to +5.0 vdc voltage on horizontal drive when off, vertical ttl sync input, horizontal ttl sync input, composite video sync input, video amplifier output collectors 43, 4, 5, 6, 32, 37, 40 0.5 to v cc + 0.5 vdc current into horizontal drive when on 43 100 ma current into frequency switch when on 14, 16 30 ma video amplifier inputs 23, 25, 27 0.5, + 5.0 vdc video amplifier output current (total for the three channels) 40, 39, 37, 34, 32, 31 120 ma storage temperature 65 to +150 c junction temperature +150 c note: esd data available upon request. recommended operating conditions characteristic pin min typ max unit power supply voltage vdc video section v cc1 29 7.6 8.0 8.4 timebase section v cc2 56 7.6 8.0 8.4 power supply voltage difference, v cc2 v cc1 0.3 0 0.8 vdc internal 5.0 v regulator output current 9 20 0 ma contrast control 18 0 5.0 vdc brightness control 19 0 5.0 vdc subcontrast control 20, 24, 26 0 2.0 vdc horizontal drive width adjust 44 0 5.0 vdc horizontal position adjust 55 1.0 4.0 vdc horizontal flyback signal amplitude 46 0.7 5.0 8.0 v horizontal flyback signal dc input voltage level 46 0.2 0 vdc voltage on horizontal drive collector when aoffo 43 0 v cc v current into horizontal drive collector when aono 43 0 40 ma voltage on horizontal drive emitter w.r.t. circuit ground 42 0.3 0 2.0 vdc blanking input signal amplitude 47 1.5 4.0 v voltage on fh switches when aoffo 14, 16 0 8.0 vdc current into each fh switch when aono 14, 16 0 20 ma xray shutdown 41 0 0.7 vdc composite video sync input 6 1.0 2.0 vpp vertical sync frequency 45 100 hz horizontal sync frequency 30 64 khz vertical sync pulse width 70 m s horizontal sync pulse width 1.0 m s
mc13081x 4 motorola analog ic device data recommended operating conditions (continued) characteristic unit max typ min pin video signal amplitude (with 75 w termination) 23, 25, 27 0.5 0.7 1.2 vpp voltage on video amplifier collector 32, 37, 40 4.5 v cc vdc current through video collectoremitter 40, 39, 37 0 40 ma 34, 32, 31 vertical hold set resistance, r9 + vr2 (figure 2) 2 10 k w vertical size set resistance, r10 + vr3 (figure 2) 52 220 k w vertical linearity set resistance, r12 + vr4 (figure 2) 51 1000 k w operating ambient temperature 0 25 70 c fh switches set resistance 15, 17 see application section 5 vertical ttl sync input 4 ttl voltage level vdc horizontal ttl sync input 5 ttl voltage level vdc electrical characteristics (t a = 25 c, v cc = 8.0 vdc) characteristic condition pin min typ max unit power supplies supply current 29, 56 70 85 110 ma total consumption 5.0 v regulator 9 output voltage load current (i b ) = 0 ma 76v v 84v i 0 a 4.75 5.0 5.25 vdc line regulation ( b ) 7.6 v < v cc < 8.4 v, i b = 0 ma 10 a i 0 a 25 mv load regulation 10 ma < i b < 0 ma 100 mv temperature coefficient 0.3 mv/ c thermal resistance, junctiontoambient 59 c/w horizontal processing horizontal oscillator frequency range 43 30 64 khz horizontal oscillator free running frequency @ i12 = 240 m a sink 240 m a from pin 12 with resistor r5 opened 43 29 31 33 khz horizontal sync detector output/+v e sync 54 0 vdc horizontal sync detector output/v e sync 54 3.6 vdc horizontal sync input 5 input impedance 22 0 k w input level low 0 0.8 vdc input level high 2.4 5.0 vdc composite video sync input 6 input impedance 1.0 k w internal bias level 1.55 vdc minimum input amplitude 0.1 vpp short term horizontal pullin range time < 5.0 ms 5.0 %fh long term horizontal pullin range time > 500 ms 30 64 khz horizontal frequency control (current transfer constant) current flowing out of pin 12 12 115 122 129 hz/ m a horizontal free running frequency change versus temperature pin 11 is opened 300 ppm/ c fh switch threshold pins 15, 17 output current i12/2 m a threshold 5.0 v hysteresis 0 200 mv fh switch voltage when aono i = 10 ma 14, 16 200 mvdc
mc13081x 5 motorola analog ic device data electrical characteristics (continued) (t a = 25 c, v cc = 8.0 vdc) characteristic unit max typ min pin condition horizontal drive horizontal position adjust 0 < v55 < 5.0 v, 55 range fh = 30 k 56 khz 10 % input impedance see application section 7 31 k w horizontal drive width adjust fh = 35 khz, 0 < v44 < 5.0 v 44 range 2:1 1:2 % input impedance 30 k w horizontal flyback see application section 4 46 threshold input signal should not fall 0.7 v input amplitude below 0.2 v 0 8.0 v input impedance 10 k w horizontal drive 43 output low i sink = 40 ma 0 0.3 vdc output high v43 = v cc 100 m a time delay from flyback to video output blanking see application section 7 250 ns time delay from blanking to video output blanking see application section 7 400 ns xray shutdown see application section 11 41 0.4 0.58 0.7 vdc activate voltage temperature coefficient of xray threshold voltage 41 2.3 mv/ c horizontal jitter 30 khz < fh < 56 khz 43 3.0 ns vertical processing vertical ramp frequency 48 45 100 hz vertical ramp fv = 50 hz, 48 amplitude r12 + vr4 = 820 k w 3.0 vpp minimum peak r10 + vr3 =120 k w , 1.9 v maximum peak c6 = c7 = 1.0 m f 3.4 v output current 2.0 ma nonlinearity 0.45 1.0 % vertical ramp free running temperature drift fv = 50 hz 48 0.01 hz/ c vertical ramp free running drift with v cc fv = 50 hz 48 0.5 hz/v vertical ramp discharge rate (retrace) fv = 50 hz 48 9.5 v/ms vertical sync detector output/+v e sync 53 0 vdc vertical sync detector output/v e sync 53 3.6 vdc vertical sync input 4 input impedance 22 k w input level low 0 0.8 vdc input level high 2.4 5.0 vdc video amplifiers input impedance 23, 25,27 100 k w internal dc bias voltage 2.4 vdc output signal amplitude v in = 0.7 vpp, v18 = 5.0 v 39, 34, 31 3.6 vpp voltage gain v20 = v24 = v26 = 0 v 5.1 v/v contrast control v18 = 0 to 5.0 v; v20, 24, 26 = 0 v 18 20 db subcontrast control v20, 24, 26 = 2.0 to 0 v; v18 = 5.0 v 20, 24, 26 1:2.5 brightness control v19 = 0 to 5.0 v, measure pin 39, 34, 31 dc level 19 0.5 vdc
mc13081x 6 motorola analog ic device data electrical characteristics (continued) (t a = 25 c, v cc = 8.0 vdc) characteristic unit max typ min pin condition video amplifiers emitter dc level 39, 34, 31 vdc minimum brightness v19 = 0 v 1.0 nominal brightness v19 = 2.5 v 1.25 1.5 1.75 maximum brightness v19 = 5.0 v 2.0 crosstalk, amplifier to amplifier frequency = 10 mhz 39, 34, 31 34 db output rise time v in = 0.7 vpp; v out = 3.0 vpp 39, 34, 31 5.0 ns p output fall time in pp; out pp ,, 5.0 pin function description pin name equivalent internal circuit description 1 vertical oscillator capacitor vertical ramp gen v cc switching control 1.0 k 5.0 v i2 2.5 k i2 i2 10.7 this capacitor should be 100 nf film type to give good temperature stability. 2 vertical hold control control 1 2 r2 c1 i2 21.3 the potentiometer at pin 2 adjusts the free running frequency of the oscillator. it should normally be set for about 55 hz with no vertical signal input such that it will lock to 60 hz. 3 vertical integrator capacitor i cis v cc c3 switching control i sid 1.0 k 3 the capacitor on this pin integrates the sync pulses with a long time constant. c3 is typically 0.01 m f. 4 vertical ttl sync to logic 2.0 v 4 5.0 v 22 k 10 k sync input vertical ttl sync input. the input threshold voltage at this pin is 2.0 v. 5 horizontal ttl sync to logic 2.0 v 5 5.0 v 22 k 10 k sync input composite or horizontal ttl sync input. the input threshold voltage at this pin is 2.0 v. 6 composite video input 5.0 v 10 k 68 k to sync separator 1.0 k 1.0 k 0.1 comp input 6 this pin requires a coupling of min 100 nf. the composite sync input should consist of v e sync signal only with amplitude > 500 mvpp. the source impedance of the sync signal should be <1.0 k w . sync information at pin 5 will override this pin, but signals at pin 4 will not. minimum pulse width is 2.0 m s. 7, 8 n/c these two pins are internally connected to each other, and nothing else.
mc13081x 7 motorola analog ic device data pin function description (continued) pin description equivalent internal circuit name 9 5.0 v regulator output v cc band gap regulator 10 m f 9 r 0.8 r 5.0 v 5.0 v ( 5%) regulator. minimum 10 m f capacitor is required for noise filtering and compensation. up to 20 ma can be supplied to external circuitry. it can source but not sink current. output impedance is 10 w . this 5.0 v regulator is recommended for use as a reference only. 10 phase detector 1 filter 400 m a r10 400 m a c10b 5.0 v c10a phase sync horiz osc 10 detector #1 external components at this pin will determine the pll gain and phase characteristics. the capacitors should be nonpolarized. the voltage at this pin nominally ranges from 1.5 v to 5.0 v with corresponding horizontal frequency from 25 khz to 68 khz. 11 automatic frequency control 11 64x oscillator from pin 10 v cc r11a r11b pin 11 is a buffered equivalent of pin 10, and ranges from a minimum of 1.5 v at horizontal high frequency to near 5.0 v at low frequency. pin 11 can sink a maximum of 1.0 ma, but cannot source current. 12 horizontal frequency range o sc ill a t or 5.0 v 12 r11b r11c the current out of pin 12 determines the horizontal frequency by a current transfer constant of 122 hz/ m a. pin 12 is internally maintained at 5.0 v. 13 timebase ground ground for the timebase section. connect to a clean, low impedance ground. 14, 16 fh switch a, b 14 16 pin 14 (switch a), and pin 16 (switch b) are open collector npn switches to ground. each switch is aono when the horizontal frequency is higher than the set points set by resistors at pins 15 and 17, respectively. maximum voltage is 8.0 v, and maximum sink current is 20 ma. 15, 17 fh switch a, b threshold setting 5.0 v to output switches 15,17 v cc r15 (r17) 3.0 k 1.0 k i12 2 pin 15 and pin 17 are current mirror at 1/2 of pin 12 current. external resistors at these pins set the horizontal frequency at which pins 14 and 16 will switch, respectively. the threshold voltage is 5.0 v. 18 contrast control 5.0 v 50 k v cc the input control range is from 0 to 5.0 v. an increase of voltage increases contrast. 19 brightness control 18,19 r18 (r19) the input control range is from 0 to 5.0 v. an increase of voltage increases brightness.
mc13081x 8 motorola analog ic device data pin function description (continued) pin description equivalent internal circuit name 20 subcontrast control ch l 1 v cc 50 k gain subcontrast controls the gain of each video channel. 0 v for maximum gain, and 2.0 v for minimum gain. 20 24 26 channel 1 channel 2 channel 3 50 k gain 20, 24, 26 26 channel 3 7.5 k 20 , 24 , 26 21, 22 n/c these two pins are internally connected to each other, and nothing else. 23 25 video inputs channel 1 channel 2 5.0 v 2.4 v clamp the input coupling capacitor is used for input clamp storage. the maximum source impedance is 100 w . polarit y of the in p ut video si g nal is p ositive. am p litude 25 27 channel 2 channel 3 video input 23, 25, 27 2.2 m f polarity of the input video signal is positive . amplitude should be nominally 0.7 vpp. 75 w 6.2 k 2.7 k input 6 . 2 k 2 . 7 k 28 video ground ground for the video section (video amplifiers, contrast and brightness controls, subcontrast, and video reference voltage). noise from the timebase section, and other digital circuits, should not be allowed to produce ground bounce at this pin. 29 video v cc1 connected to a 8.0, v 5%, dc supply. decoupling is required at this pin. 38 video clamp channel 1 clamp pulse normally a 100 nf capacitor is connected to each of these pins 38 33 30 ch anne l 1 channel 2 channel 3 1.5 v p 38, 33, 30 th ese p i ns. 30 channel 3 1 . 5 v video out video emitter output v cc v pins 39, 34, and 31 are the emitter outputs of the three video amplifier and have an internal 33 w 39 o utput channel 1 c v cc t h ree v id eo amp lifi er , an d h ave an i nterna l 33 w resistor. 34 31 channel 2 channel 3 rc blanking 40, 37, 32 the emitter dc voltage is controlled by the brightness l 31 channel 3 video collector video am p 40 , 37 , 32 gyg control. th t th h h ll t d itt h ld 40 video collector output channel 1 video amp bi ht 39, 34, 31 the current through each collector and emitter should not exceed 40 ma. 40 37 ch anne l 1 channel 2 brightness contrast to r 39, 34, 31 not exceed 40 ma . 32 channel 3 contrast to clamp circuit re 35, 36 n/c these two pins are internally connected to each other, and nothing else.
mc13081x 9 motorola analog ic device data pin function description (continued) pin description equivalent internal circuit name 41 xray shutdown xray shutdown 5.0 v 41 47 k if the voltage at this pin is > 0.58 v, the horizontal driver device (pins 42 and 43) will be aono until power is removed, or the voltage on this pin is taken below 0.4 v. 42 horizontal drive ground v cc r43 v cc 2.7 k 43 42 this emitter pin must be connected externally to a low impedance ground. pin 43 is an open collector pin and normally is pulled up by a resistor to v cc . 43 horizontal drive 42 to horizontal deflection circuit maximum current through pins 42 and 43 must be less than 40 ma. 44 horizontal drive width 5.0 v 24 k ramp 2 22 k 13.5 k 44 5.0 v r44 varying the voltage at this pin will change the horizontal drive duty cycle. as the voltage of this pin is increased, the aono time at pin 43 is decreased. input impedance is 30 k w . 45 secondary phase detector filter phase detector #2 250 m a horiz osc sync 250 m a 45 c45 v cc typically a 10 to 100 nf decoupling capacitor is connected to this pin. 46 horizontal flyback 0.7 v to phase detector #2 10 k 46 flyback signal the flyback signal should be a +v e pulse of peak voltage 8.0 v. the internal switching voltage is 0.7 v and it controls the secondary pll input impedance is 10 k w 47 video blanking input blanking 2.0 k 47 20 k the video blanking signal should be positive pulse in the range of 1.5 to 4.0 v.
mc13081x 10 motorola analog ic device data pin function description (continued) pin description equivalent internal circuit name 48 vertical ramp output v cc 48 10 k to vertical deflection circuit 2.0 v, 5.0 v trip pts vertical oscillator vertical ramp generator this ramp signal drives the external vertical output devices. voltage ramps from 2.0 v to less than 5.0 v, depending on frequency and components at pins 51 and 52. loading on this pin must be > 30 k w to avoid distorting or clipping the ramp. 49, 50 n/c these two pins are internally connected to each other, and nothing else. 51 vertical ramp capacitor i v cc 1.0 k 5.7 200 ramp output buffer switching control vertical i 2 the slope of the output ramp is determined by the components at pins 51 and 52. the resistor at pin 52 sets the charging current of the capacitor, and therfore the vertical height of the picture. the linearit y of the ram p can be modified b y external 52 vertical size control 52 51 c51 vertical oscillator the linearity of the ramp can be modified by external feedback. 53 vertical sync polarity detector 5.0 v 53 54 the output goes low when the vertical sync input polarity is positive. it goes high when the vertical sync input polarity is negative. 54 horizontal sync polarity detector 53, 54 the output goes low when the horizontal sync input polarity is positive. it goes high when the horizontal sync input polarity is negative. 55 horizontal position control 55 5.0 v ramp 1 25 k 15 k 10 k 5.0 v r55 varying the voltage at this pin will change the horizontal position of the picture. input impedance is 31 k w . 56 timebase v cc2 connected to a 8.0 v, 5%, dc supply. decoupling is required at this pin.
mc13081x 11 motorola analog ic device data application information the mc13081x is an integrated multisync color monitor processor. it combines horizontal/vertical deflection processing circuitry and video preamplifiers into a single device. the overall timebase section consists of two parts: horizontal and vertical. the horizontal timebase can be operated from 30 khz to 64 khz, and can be driven from ttl separate sync, composite sync, or a composite video signal. there are two plls which ensure proper timing throughout the whole system. the first pll provides line locking of the horizontal sync signal with the builtin oscillator, while the second one maintains fixed timing with the horizontal flyback signal such that a stable display can be achieved. the vertical timebase section operates from 45 hz to 100 hz, and can receive various sync signals as the horizontal one does. this section consists of an oscillator and a ramp generator. adjustments include linearity, ramp amplitude, and minimum free running frequency in the absence of sync signal. the video section has three 70 mhz bandwidth preamplifiers. the outputs of these amplifiers are uncommitted collector/emitter facilitating cascode configuration with subsequent stages. controls include brightness and contrast. in addition, the voltage gain of each amplifier can be adjusted individually which provides flexibility in adjusting color correctness. blanking and clamping signals are provided to the amplifiers internally from the timebase section. additionally, a blanking signal can also be supplied externally. separate power supply and ground pins are provided to the timebase and video section in order to minimize the cross interference between these two sections. c16 figure 2. application circuit r9 r12 c1 c5 1 3 2 vr2 r10 52 vr3 c6 c7 51 vr4 48 47 55 5.0 v ref vr5 c8 r13 vr6 vd c9 44 46 43 vd r14 va 29 vd 56 39 38 34 33 31 30 40 37 32 c22 c23 c24 r19 r20 r21 va 41 45 42 13 6 19 18 26 24 20 9 10 c10 c11 r15 r16 c12 c13 vr7 vr8 vr9 c14 c15 c18 c17 vr11 vr10 c19 r17 c20 c21 r18 4 5 23 25 27 28 11 12 c2 c3 r1 r2 r3 vd r4 r5 r6 vr1 vd r7 r8 va vd l1 l2 c25 c26 c27 c28 c29 afc video gnd vsync hsync r g b mc13081x c4 c1c3 2.2 m f c4,c6c9,c13c19,c22c24,c29 100 nf c5,c20 10 nf c10 1.0 nf c11 100 nf c12 22 m f c21 10 nf c27 100 m f c26,c28 47 m f c30,c31 1.0 m f r1r3,r17 75 w r4r6 15 k w r7 3.9 m w r8 6.8 m w r9 8.2 k w r10 220 k w r12 220 k w r13 2.2 k w r14 470 w r15 5.6 k w r16 5.1 k w r18 10 k w r19r21 330 w vr1,vr5vr11 10 k w vr2 5.0 k w vr3 200 k w vr4 1.0 m w 8.0 vdc vertical ttl sync horizontal ttl sync channel 1 video in channel 2 video in channel 3 video in horizontal freq control channel 3 collector out channel 2 collector out channel 1 collector out channel 3 clamp channel 3 emitter out channel 2 clamp channel 2 emitter out channel 1 clamp channel 1 emitter out timebase v cc2 video v cc1 5.0 v ref vertical integrator cap vertical hold vertical size vertical ramp cap vertical ramp out video blanking in horizontal position horizontal drive width horizontal flyback pd1 5.0 v reg channel 1 subcontrast channel 2 subcontrast channel 3 subcontrast contrast brightness composite video in horizontal pd2 timebase gnd xray drive gnd shutdown l1 50 m h l2 50 m h 5.0 v ref vertical osc cap horizontal drive
mc13081x 12 motorola analog ic device data the following describes a stepbystep procedure in using the mc13801 for a typical multisync color monitor chassis; component notations refer to figure 2. 1. horizontal frequency range resistor network (pins 11, 12) f hm = minimum horizontal frequency f hx = maximum horizontal frequency oscillator transfer constant = 122 hz/ m a r5 6.35 x 10 8 f hx f hm r6 5 f hx 122 x 10 6 3.5 r5 r4 v cc 6.0 1.5 x r5 and v cc 1.5 r4 1.0 ma for most applications, r4 = r5 provides the required results. note: in order to compensate device/component tolerance, a potentiometer is recommended in series with r6, as vr1 . 2. horizontal frequency range phase detector filter network (pin 10) typical values are: c10 = 1.0 nf c11 = 100 nf r15 = 5.6 k c11 100 x c10 note: c10 and c11 should have less than 1.0 m a leakage. 3. horizontal free running frequency the voltage at pin 10 will be buffered to pin 11, and hence control the internal oscillator. in the absence of horizontal sync signal, the free running horizontal frequency will vary between preset minimum and maximum horizontal frequency values. if an undetermined free running frequency value is not desired, a large impedance resistor can be used to pull pin 10 to v cc or gnd, and the free running frequency will be equal to f hm or f hx , respectively. the free running frequency can also be set to any value within the horizontal frequency range by using a voltage divider, as r7 and r8 indicate. v11 v d x r7 r7 r8 i12 v11 r6 vr1 v11 5 5 free running frequency i12 m ax 122 hz m a the above formula provides the ratio of r7 and r8. the values chosen should be similar to those shown in figure 2. 4. horizontal flyback input (pin 46) the horizontal flyback signal not only provides proper timing reference for the horizontal drive output, but also supplies the necessary blanking for the video outputs. there are two precautions for the flyback input. first, the signal should have a zero volt reference, and second, the peak value should be as near to v cc as possible. the threshold voltage for pin 46 is 0.7 v. the blanking period depends on the amplitude, as shown in figure 3 (x and y, respectively). a larger amplitude provides better consistency and control of the blanking period. figure 3. voltage for flyback x 0.7 v y 5. frequency switch (pin 14 to 17) there are two frequency switches available for screen size compensation for different timing standards. each switch will turn on at the switch frequency set with its external resistor. see figure 4. figure 4. fh switches ra v cc 1.0 k rb 15, 17 i12 2 3.0 k 5.0 v the switch frequency is calculated as follow: sf 5x2x122x10 6 ra rb sf switch frequency in considering the ratio of ra to rb, the following parameters, and their tolerances, need to be clarified: 1. i osc 10% 2. 5.0 v ref 5% 3. v hys 5% 4. ra, rb ?% internally, the lockin horizontal frequency will build up a current reference, and half of this current reference is used for setting up a voltage and then compared with the internal 5.0 v ref . looking at the four parameters above, the first three are ic related, while the last item depends on the external component tolerance. by adding up the first three items, the value of ra and rb should be chosen to compensate for about 20% of system tolerance. therefore, if ra is chosen to be 70% of the calculated value (ra + rb), rb should be 60% of (ra + rb). that
mc13081x 13 motorola analog ic device data means, the overall adjustment is about 70% to 130%, which provides additional 10% margin. during normal operation, the frequency switch will switch aoffo when the pin voltage falls 60 mv below the 5.0 v reference voltage ( 4.94 v), and will switch aono when the pin voltage rises to 40 mv above the 5.0 v reference ( 5.04 v). an example: require trip point @ 35 khz i12 35 x 10 3 122 m a trip point reference current i12 2 35 k 122 x 2 m a ra rb 5.0 v 35 k 122 x 2 m a 34857 w hysteresis @ 35 khz 5.044.94v 34857 w x 122 hz m a 350 hz from above, ra + rb = 34857 w select ra = 24 k, and rb = 20 k trim pot the temperature coefficient of the potentiometer can also be considered. if the value of the potentiometer and ra vary by 1% (for example) over temperature, the error would be: 5x 1 34857 x 0.99 1 34857 x 1.01 x 122 hz m a 350 hz 6. horizontal position compensation for selected scan frequency in using fha switch refering to figure1 (block diagram), there is an output from the fha switch to the horizontal drive output. when the fha switch is switched on, at a specified horizontal frequency, there is a 1/8th horizontal line shift of hramp1. referring to figures 5 and 9, a shift of hramp1 will result in a shift of the hdrive output timing with respect to flyback input. the exact hdrive output shift will be determined by the pd2 voltage (pin 45), which is generated by the flyback input and the internal comp1 output. that is related to the hdrive output transistor storage time. this function is particularly useful for high frequency scan rates. the higher the frequency, the more significant the storage time becomes, compared to the horizontal scan time. figure 5. x to be determined by application hsync hdrive without shift hdrive with fha on 7. proper horizontal phase control the horizontal adjustment range depends on the phase angle between the hsync signal and the horizontal flyback input. in reality, the actual adjustment range is a combination of horizontal frequency, front porch/back porch timing, flyback pulse width, and horizontal output transistor storage time. the following paragraph conveys the concept for normal operation. there are two clamping situations for video signals. in case 1, separate vttl and httl sync are provided, the video signal is clamped at sync tip, and the dc voltage built up is used for black level reference. in this instance, the clamp pulse has the same pulse width as hsync, and nearly the same position. this clamp pulse is blanked out internally. in order to allow the video output to complete the blanking action during horizontal retrace, the horizontal phase should not be overadjusted. see figure 6 for a pictorial perception. accordingly, the total horizontal position adjustment range is calculated as the sum of d t1 and d t2. should the phase of horizontal flyback/hsync move further left or right from the normal adjustment range, the black level reference voltage will be restored, and consequently a slightly brighter than screen dark region will be observed onscreen. see figure 7 for pictorial explanation. | t1| t hb 2 | t2| t hb 2 horizontal blanking time fp time sync width criterion for normal operation: + bp time = t hb in other words, the left/right 0.7 v threshold flyback reference should be within the hsync pulse (shaded area of figure 6).
mc13081x 14 motorola analog ic device data figure 6. horizontal position adjustment at normal operation ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? hsync width a httl sync flyback threshold = 0.7 v 0 v video output video output black level ref flyback pulse width b d t2 d t1 c blanking width
mc13081x 15 motorola analog ic device data figure 7. horizontal position adjustment at overscan operation httl sync flyback threshold = 0.7 v 0 v ref video output video output black level ref blanking width x x note: region x will appear as bright vertical stripe. flyback threshold = 0.7 v
mc13081x 16 motorola analog ic device data figure 8. flyback threshold = 0.7 v video input video output blanking width clamp pulse position black level ref in case 2, composite sync is used instead of vttl and httl sync, the clamp pulse is located at the backporch of the video signal, and the width of the clamp pulse is calculated as follows: clamp pulse width 1 64 x line frequency x3 blanking width = sync width + clamp pulse width + flyback threshold (0.7 v) (see figure 8) from the above diagram, it can be seen that the horizontal position adjustment is basically the same as case 1 except slightly wider with the addition of clamp pulse blanking. 8. horizontal timing relationship for phase detector 2 the following paragraphs explain the pll2 mechanism. figure 9 portrays the timing signals of various parts of the ic. in using the hsync pulse, which is generated from pll1, a horizontal ramp 1 signal is created. hramp1 starts at 1/4th line before hsync and the ramping slope is directly proportional to horizontal frequency. the lower tip of this ramp is at approximately 1.2 v, and the amplitude is about 4.2 v. by adjusting the dc bias to the hphase control, a pulse waveform is derived from this hramp1. a phase detector is used to compare the phase between the pulse generated above, and the incoming flyback pulse. an integrating capacitor is applied to generate a dc voltage. this dc voltage, pd2f output, is used to slice the hramp1 signal in order to generate comp2 output pulse. a second ramp signal, hramp2, is triggered from this comp2 output. by applying a dc voltage (hwidth control) to hramp2, the comp3 output pulses are generated. the hdrive output is formed by the rising edge of comp2 output and the rising edge of comp3 output. it can be seen from figure 9, if the hphase control is over or under driven, it will reach the upper/lower tip of hramp1, and thus pll2 will be disturbed.
mc13081x 17 motorola analog ic device data figure 9. horizontal timing for pll2 internal sections hsync 4.2 v hramp1 hflyback comp1 output comp2 output hramp2 comp3 output hdrive h pulse width pd2 output hphase 1.2 v 1/4 h 1/2 h
mc13081x 18 motorola analog ic device data figure 10. vertical section vert ramp output 1/4 v vert oscillator vert sync pulse free running vramp 3/4 v 9. vertical frequency range (pins 48, 51, 52) the mc13081x vertical oscillator is an injectionlock type. the device can handle vertical frequency from 45 hz to 100 hz. the internal ramp generator will generate a ramp output in the absence of a vsync signal. upon receiving an external vertical sync pulse, the ramp up portion is forced to retrace, and therefore, the vertical ramp output is synchronized with incoming vsync. the slope of the vertical ramp output is directly proportional to the current flowing out of pin 52. half of this current is used to charge up the vertical ramp capacitor. as the charging current is increased, so does the ramp slope. external feedback can be provided from pin 48 to pins 51 and 52 for linearity adjustment. 10. vertical free running frequency (pins 1, 2) the purpose of the vertical oscillator is to maintain a vertical ramp to the deflection circuitry in the event the vertical sync is not present. because of the injectionlock type, the free running frequency must be lower than the system's lowest vertical frequency. while various combinations of c4 and r9 can produce a given frequency, it is recommended c4 be 0.1 m f in order to obtain practical values for r9. the free running frequency should be set at about 10% lower than the minimum operating vertical frequency (54 hz for a 60 hz system). r9 is then calculated from: r9 v cc 1.4 96 x c4 x fv 2.5k connecting a potentiometer, (vr2) provides avertical holdo adjustment. 11. xray shutdown protection (pin 41) the xray input (pin 41) permits shutting off the horizontal drive, usually by external circuitry which monitors faults within the high voltage supply, such as excess anode current. this input is activated by taking it above 0.6 v which causes the drive transistor at pin 43 to be turned on (low) permanently by an internal latch. an external resistor must be connected to pin 41 to limit the input current, and to assist with the latching action (see figure 11). 10 k w is a typical value, but the value can be chosen based on the specifies of the driving circuit. the external resistor reduces the sensitivity of pin 41 to noise and transients which may otherwise result in false latches. to resume normal operation (after correction of the fault), lower pin 41 below 0.4 v. if the external circuit's normal operation does not take it below 0.4 v, but does take it below 0.6 v, then recycle v cc aoffoaono. if the pin is not used, it must be connected to ground. the minimum holding current to keep the latch on is 70 m a, while the minimum turnon current is 0.4 m a. figure 11. xray shutdown circuit 5.0 v 10 k hdrive shutdown 47 k 41 xray shutdown
mc13081x 19 motorola analog ic device data b suffix plastic sdip package case 85901 issue o outline dimensions 51.69 13.72 3.94 0.36 0.81 0.20 2.92 0 0.51 52.45 14.22 5.08 0.56 1.17 0.38 3.43 15 1.02 millimeters 2.035 0.540 0.155 0.014 0.032 0.008 0.115 0 0.020 2.065 0.560 0.200 0.022 0.046 0.015 0.135 15 0.040 -t- seating plane c d 56 pl e f j 56 pl k m g n 128 56 29 notes: 1. dimensions and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension l to center of lead when formed parallel. 4. dimensions a and b do not include mold flash. maximum mold flash 0.25 (0.010). min min max max inches dim a b c d e f g h j k l m n 15.24 bsc 0.600 bsc 1.778 bsc 7.62 bsc 0.070 bsc 0.300 bsc 0.89 bsc 0.035 bsc l h -a- -b- 0.25 (0.010) t a m s 0.25 (0.010) t b m s
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