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  1/6 preliminary data november 2002 STS25NH3LL n-channel 30v - 0.0027 w -25aso-8 stripfet? iii mosfet for dc-dc conversion n typical r ds (on) = 0.0027 w n optimal r ds(on) xq g trade-off @4.5v n conduction losses reduced n switching losses reduced n world industrys lowest on- resistance description the STS25NH3LL utilizes the latest advanced de- sign rules of sts proprietary stripfet ? t echnolo- gy. this novel 0.6 m process coupled to unique metallization techniques realizes the most ad- vanced low voltage mosfet in so-8 ever pro- duced. it is therefore suitable for the most demanding dc-dc converter applications where high efficiency is to be achieved at high output cur- rent. applications n dc-dc converters for telecom and notebook cpu core n synchronous rectifier absolute maximum ratings ( l ) pulse width limited by safe operating area type v dss r ds(on) i d STS25NH3LL 30 v < 0.0035 w 25 a symbol parameter value unit v ds drain-source voltage (v gs =0) 30 v v dgr drain-gate voltage (r gs =20k w ) 30 v v gs gate- source voltage 18 v i d drain current (continuous) at t a = 25c drain current (continuous) at t a = 100c 25 18 a a i dm (  ) drain current (pulsed) 100 a p tot total dissipation at t a = 25c 3.2 w so-8 internal schematic diagram
STS25NH3LL 2/6 thermal data (*) when mounted on 1inch2 fr4 board, 2 oz of cu, t 10 sec. electrical characteristics (t j = 25 c unless otherwise specified) off on (1) dynamic rthj-amb (*) thermal resistance junction-ambient max 47 c/w rthj-lead thermal resistance junction-leads max 16 c/w t j max. operating junction temperature C55 to 175 c t stg storage temperature symbol parameter test conditions min. typ. max. unit v (br)dss drain-source breakdown voltage i d = 250 a, v gs = 0 30 v i dss zero gate voltage drain current (v gs =0) v ds = max rating 1a v ds = max rating, t c = 125 c 10 a i gss gate-body leakage current (v ds =0) v gs = 18v 100 na symbol parameter test conditions min. typ. max. unit v gs(th) gate threshold voltage v ds =v gs ,i d = 250a 1v r ds(on) static drain-source on resistance v gs =10v,i d =12a 0.0027 0.0035 w v gs = 4.5 v, i d =12a 0.0035 0.0050 w symbol parameter test conditions min. typ. max. unit g fs (1) forward transconductance v ds =15v , i d =12a 30 s c iss input capacitance v ds =25v,f=1mhz,v gs =0 4450 pf c oss output capacitance 655 pf c rss reverse transfer capacitance 50 pf
3/6 STS25NH3LL electrical characteristics (continued) switching on switching off source drain diode note: 1. pulsed: pulse duration = 300 s, duty cycle 1.5 %. 2. pulse width limited by safe operating area. symbol parameter test conditions min. typ. max. unit t d(on) turn-on delay time v dd =15v,i d = 12.5 a r g = 4.7 w v gs =10v (see test circuit, figure 1) 18 ns t r rise time 50 ns q g q gs q gd total gate charge gate-source charge gate-drain charge v dd =15v,i d =25a, v gs =5v (see test circuit, figure 2) 32 12.5 10 43 nc nc nc symbol parameter test conditions min. typ. max. unit t d(off) t f turn-off-delay time fall time v dd =15v,i d =12.5a, r g =4.7 w, v gs =10v (see test circuit, figure 1) 75 8 ns ns symbol parameter test conditions min. typ. max. unit i sd source-drain current 25 a i sdm (2) source-drain current (pulsed) 100 a v sd (1) forward on voltage i sd =25a,v gs =0 1.2 v t rr q rr i rrm reverse recovery time reverse recovery chargereverse recovery current i sd = 25 a, di/dt = 100a/s, v dd =25v,t j = 150c (see test circuit, figure 3) 32 34 2.1 ns nc a
STS25NH3LL 4/6 fig. 3: test circuit for diode recovery behaviour fig. 2: gate charge test circuit fig. 1: switching times test circuit for resistive load
5/6 STS25NH3LL dim. mm inch min. typ. max. min. typ. max. a1.750.068 a1 0.1 0.25 0.003 0.009 a2 1.65 0.064 a3 0.65 0.85 0.025 0.033 b 0.35 0.48 0.013 0.018 b1 0.19 0.25 0.007 0.010 c 0.25 0.5 0.010 0.019 c1 45 (typ.) d 4.8 5.0 0.188 0.196 e 5.8 6.2 0.228 0.244 e1.27 0.050 e3 3.81 0.150 f 3.8 4.0 0.14 0.157 l 0.4 1.27 0.015 0.050 m0.60.023 s 8 (max.) 0016023 so-8 mechanical data
STS25NH3LL 6/6 information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no res ponsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result f rom its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specificati ons mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics products are not authorized for use as critical components in life support devi ces or systems without express written approval of stmicroelectronics. ? the st logo is a registered trademark of stmicroelectronics ? 2002 stmicroelectronics - printed in italy - all rights reserved stmicroelectronics group of companies australia - brazil - canada - china - finland - france - germany - hong kong - india - israel - italy - japan - malaysia - malt a - morocco singapore - spain - sweden - switzerland - united kingdom - united states. ? http://www.st.com


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