this document contains detailed information on power considerations, dc/ac electrical characteristics, and ac timing speci?ations for the MC92460 multichannel hdlc controller. the following topics are addressed: topic page section 1.1, ?eatures 2 section 1.2, ?lectrical and thermal characteristics 4 section 1.2.1, ?c electrical characteristics 4 section 1.2.2, ?hermal characteristics 6 section 1.2.3, ?ower considerations 6 section 1.2.4, ?ower dissipation 6 section 1.2.5, ac speci?ations 7 section 1.2.5.1, ?ysclk timing 7 section 1.2.5.2, ?xclk timing 7 section 1.2.5.3, ac timing 8 section 1.3, ?inout 11 a d v ance in f ormation MC92460ec/d r e v . 1.0, 7/2002 MC92460 hdlc controller hard w are specif cations ncsd applications f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
2 MC92460 hdlc controller hardware speci cations motorola features figure 1 shows a block diagram of the MC92460. figure 1. MC92460 block diagram 1.1 features the following is an overview of the MC92460 feature set: channels 40 full-duplex hdlc channels programmable channel assignment (any logical channel to any signal) each channel has a default of 64 buffer descriptors (rx and tx) but the number of buffer descriptors per channel is con?urable controllers maximum throughput of 1919 mbps; individual controllers operate up to 66.7 mbps all communication controllers operate asynchronously programmable frame size (maximum 65,535 bytes) transparent memory access with internal memory controller 60x bus MC92460 directly connects with a 64-bit data and 32-bit address 60x bus supports 66.7 mhz 60x bus speed, with aggregate bandwidth of up to 1919 mbps depending register interrupt bus interface mpc8260 dual-port ram 32 kbyte scu 32-byte x 80 fifo communication buffer (64-bit x 4kw) bist sram dma arbiter 60x bus master interface unit 64-bit 66.7 mhz 3.3v rx fifo tx fifo flag/abort/idle 0-insert/delete 16 / 32 crc plls hdlc rxsd rxck txck txsd jtag 40 channels x 2 64-bit MC92460 two or more MC92460s f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
motorola MC92460 hdlc controller hardware speci cations 3 features on the type of main memory used up to four MC92460 |