1 SED15B1 series overview the SED15B1 series is a single-chip liquid crystal display (=lcd) driver for dot-matrix lcds that can be con- nected directly to a microprocessor (=mpu) bus. it accepts 8-bit parallel or serial display data from a mpu, stores it in an on-chip display data ram (=ddram), and generates a lcd drive signal independent of the mpu clock. the use of the on-chip ddram of 65 132 bits and a one-to-one correspondence between lcd panel pixel dots and on-chip ddram bits offer high flexibility in graphic display. the SED15B1 series does not need external operation clock for ddram read/write operations, and has a on- chip lcd power supply circuit featuring very low current consumption with few external components, and moreover has a on-chip cr oscillator circuit. consequently, the SED15B1 can be realize a high-performance handy display system with a minimum current consumption and the fewest components. features direct display by ddram : bit data of ddram ? .... a dot of display is off ? .... a dot of display is on (at display normal) ddram capacity: 65 132 = 8580 bits high-speed 8-bit serial interface/8-bit mpu interface (the chip can be connected directly to both the 8080- series mpus and the 6800-series mpus) . many command functions: display on/off, display normal/reverse, display all points on/off, page address set, column address set,display start line address set, segment/common driver direction select, display data read/write, read modify write, power control set, electronic contrast control, lcd bias set, power saver, reset on-chip low power supply circuit for lcd driving voltage generation booster circuit (with boost ratios of double/triple/quadruple/quintuple) voltage regulator circuit (with high-accuracy electronic voltage adjustmenut function) voltage follower (with v 1 to v 4 voltage dividing resistors) on-chip cr oscillation circuit (external clock can also be input.) very low power consumption SED15B1 series dot matrix lcd driver pf1100-01 preliminary support up to 65 132 display built-in power supply circuit for lcd few external parts required
2 SED15B1 series series specifications power supply: logic power supply : v dd -v ss = 1.7 to 3.6 v booster reference supply: v dd2 -v ss = 2.6 to 3.6 v lcd driving power supply: v 0 -v ss = (tbd)v wide range of operating temperatures ?0 to 85?c cmos process package: au bump chip and tcp these ics are not designed for strong radio/optical activity proof. product name duty bias seg dr com dr v reg temperature gradient shipping forms SED15B1d 0b 1/65 1/9,1/7 132 65 ?.05%/ c bare chip
3 SED15B1 series block diagram v dd v 0 v 1 v 2 v 3 v 4 v ss cap4+ v dd2 v out v r cap1+ cap1 cap2 cap2+ cap3+ cl oscillator circuit display timing generator circuit line address i/o buffer c86 a0 wr (r/w) p/s d7 (si) d6 (scl) d5 d4 d3 d2 d1 d0 seg0 seg131 com0 com63 coms coms com drivers seg drivers display data latch circuit display data ram 132 x 65 column address status command decoder interface bus holder shift register cs rd (e) res power supply circuit page address mpu
4 SED15B1 series electronic devices marketing division notice: no part of this material may be reproduced or duplicated in any form or by any means without the written permission of seiko ep son. seiko epson reserves the right to make changes to this material without notice. seiko epson does not assume any liability of any kind arisi ng out of any inaccuracies contained in this material or due to its application or use in any product or circuit and, further, there is no re presentation that this material is applicable to products requiring high level reliability, such as, medical products. moreover, no license to any intellectual property rights is granted by implication or otherwise, and there is no representation or warranty that anything made in accordance with this material wil l be free from any patent or copyright infringement of a third party. this material or portions thereof may contain technology or the subject rela ting to strategic products under the control of the foreign exchange and foreign trade law of japan and may require an export license from the ministry of international trade and industry or other approval from another government agency. ? seiko epson corporation 2000 all right reserved. all other product names mentioned herein are trademarks and/or registered trademarks of their respective companies. first issue february, 2000 printed in japan h ic marketing & engineering group ed international marketing department i (europe, u.s.a) 421-8 hino, hino-shi, tokyo 191-8501, japan phone: 042 587 5812 fax: 042 587 5564 ed international marketing department ii (asia) 421-8 hino, hino-shi, tokyo 191-8501, japan phone: 042 587 5814 fax: 042 587 5110 http://www.epson.co.jp/device/ electronic devices information on the epson www server.
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