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  1 precision edge ? sy89875u micrel, inc. m9999-082407 hbwhelp@micrel.com or (408) 955-1690 description ? integrated programmable clock divider and 1:2 fanout buffer ? guaranteed ac performance over temperature and voltage: ? > 2.0ghz f max ? < 200ps t r /t f ? < 15ps within device skew ? low jitter design: ? < 10ps pp total jitter ? < 1ps rms cycle-to-cycle jitter ? unique input termination and v t pin for dc-coupled and ac-coupled inputs; cml, pecl, lvds and hstl ? lvds compatible outputs ? ttl/cmos inputs for select and reset ? parallel programming capability ? programmable divider ratios of 1, 2, 4, 8 and 16 ? low voltage operation 2.5v ? output disable function ? ?40c to 85c temperature range ? available in 16-pin (3mm x 3mm) mlf ? package features 2.5v, 2.0ghz any diff. in-to-lvds programmable clock divider and 1:2 fanout buffer w/ internal termination precision edge ? sy89875u applications ? sonet/sdh line cards ? transponders ? high-end, multiprocessor servers rev.: d amendment: /0 issue date: august 2007 this low-skew, low-jitter device is capable of accepting a high-speed (e.g., 622mhz or higher) cml, lvpecl, lvds or hstl clock input signal and dividing down the frequency using a programmable divider to create a lower speed version of the input clock. available divider ratios are 2, 4, 8 and 16, or straight pass-through. the differential input buffer has a unique internal termination design that allows access to the termination network through a v t pin. this feature allows the device to easily interface to different logic standards. a v ref-ac reference is included for ac-coupled applications. the /reset input asynchronously resets the divider. in the pass-through function (divide by 1) the /reset synchronously enables or disables the outputs on the next falling edge of in (rising edge of /in). functional block diagram typical performance precision edge is a registered trademark of micrel, inc. micro leadframe and mlf are registered trademarks of amkor technology, inc.            

           ! "#$ "#$  ! % divide-by-4 c ml/lvpecl/lvds 622mhz clock in oc-12 to oc-3 translator/divider lvds 155.5mh z clock ou t 622mhz in / q0 q0 /in in 155.5mhz out
2 precision edge ? sy89875u micrel, inc. m9999-082407 hbwhelp@micrel.com or (408) 955-1690 package/ordering information pin number pin name pin function 12, 9 in, /in differential input: internal 50y termination resistors to v t input. flexible input accepts any differential input. see ?input interface applications? section. 1, 2, 3, 4 q0, /q0 differential buffered lvds outputs: divided by 1, 2, 4, 8 or 16. see ?truth table.? q1, /q1 unused output pairs must be terminated with 100y across the different pair. 16, 15, 5 s0, s1, s2 select pins: see ?truth table.? lvttl/cmos logic levels. internal 25ky pull-up resistor. logic high if left unconnected (divided by 16 mode.) input threshold is v cc /2. 6 nc no connect. 8 /reset, lvttl/cmos logic levels: internal 25ky pull-up resistor. logic high if left unconnected. /disable apply low to reset the divider (divided by 2, 4, 8 or 16 mode). also acts as a disable/enable function. the reset and disable function occurs on the next high-to-low clock input transition. input threshold is v cc /2. 10 vref-ac refe rence voltage: equal to v cc ?1.4v (approx.). used for ac-coupled applications only. decouple the v ref?ac pin with a 0.01f capacitor. see ?input interface applications? section. 11 vt termination center-tap: for cml or lvds inputs, leave this pin floating. otherwise, see figures 4a to 4f, ?input interface applications? section. 7, 14 vcc positive power supply: bypass with 0.1f//0.01f low esr capacitor. 13 gnd ground. exposed pad must be connected to the same potential as the gnd pin. exposed pin description 13 14 15 16 12 11 10 9 1 2 3 4 8 7 6 5 q0 / q0 q1 / q1 in vt vref-a c /in s0 s1 vc c gn d s2 nc vcc / reset 16-pin mlf ? (mlf-16) /reset (1) s2 s1 s0 outputs 1 0 x x reference clock (pass through) 1 1 0 0 reference clock 2 1 1 0 1 reference clock 4 1 1 1 0 reference clock 8 1 1 1 1 reference clock 16 0 (1) x x x q = low, /q = high clock disable note 1. reset/disable function is asserted on the next clock input (in, /in) high-to-low transition. truth table ordering information(1) package operating package lead part number type range marking finish SY89875UMI mlf-16 industrial 875u sn-pb SY89875UMItr (2) mlf-16 industrial 875u sn-pb sy89875umg (3) mlf-16 industrial 875u with nipdau pb-free bar line indicator pb-free sy89875umgtr (2, 3) mlf-16 industrial 875u with nipdau pb-free bar line indicator pb-free notes: 1. contact factory for die availability. dice are guaranteed at t a = 25c, dc electricals only. 2. tape and reel. 3. pb-free package is recommended for new designs.
3 precision edge ? sy89875u micrel, inc. m9999-082407 hbwhelp@micrel.com or (408) 955-1690 note 1. permanent device damage may occur if absolute maximum ratings are exceeded. this is a stress rating only and functional operati on is not implied at conditions other than those detailed in the operational sections of this data sheet. exposure to absolute maximu m ratlng conditions for extended periods may affect device reliability. note 2. the data sheet limits are not guaranteed if the device is operated beyond the operating ratings. note 3. due to the limited drive capability use for input of the same package only. note 4. junction-to-board resistance assumes exposed pad is soldered (or equivalent) to the device?s most negative potential on the pcb. absolute maximum ratings (note 1) supply voltage (v cc ) ................................... ?0.5v to +4.0v input voltage (v in ) ................................... ?0.5v to v cc +0.3 ecl output current (i out ) continuous .......................................................... 50ma surge .................................................................100ma input current in, /in (i in ) ......................................... 50ma v t current (i vt ) ...................................................... 100ma v ref-ac sink/source current (i vref-ac ), note 3 ...... 2ma lead temperature (soldering 20 sec.) ...................... 260c storage temperature (t s ) ........................ ?65c to +150c operating ratings (note 2) supply voltage (v cc ) ......................................... +2.5v 5% ambient temperature (t a ) ......................... ?40c to +85c package thermal resistance mlf ? ( ja ) still-air ............................................................. 60c/w 500lfpm ........................................................... 54c/w mlf ? ( jb ), note 4 junction-to-board ............................................ 32c/w t a = ?40c to +85c; unless otherwise stated. symbol parameter condition min typ max units v cc power supply 2.375 2.625 v i cc power supply current no load, max. v cc 70 95 ma r in differential input resistance 90 100 110 y (in-to-/in) v ih input high voltage (in, /in) note 3 0.1 ? v cc +0.3 v v il input low voltage (in, /in) note 3 ?0.3 ? v ih ?0.1 v v in input voltage swing note 4 0.1 ? v cc v v diff_in differential input voltage swing note 5 0.2 ? ? v |i in | input current (in, /in) note 3 ??45ma v ref?ac reference voltage note 6 v cc ?1.525 v cc ?1.425 v cc ?1.325 v note 1. the circuit is designed to meet the dc specifications shown in the above table after thermal equilibrium has been established. note 2. specification for packaged product only. note 3. due to the internal termination (see figure 2a) the input current depends on the applied voltages at in, /in and v t inputs. do not apply a combination of voltages that causes the input current to exceed the maximum limit! note 4. see ?timing diagram? for v in definition. v in (max) is specified when v t is floating. note 5. see ?typical operating characteristics? section for v diff definition. note 6. operating using v in is limited to ac-coupled pecl or cml applications only. connect directly to v t pin. dc electrical characteristics (notes 1, 2)
4 precision edge ? sy89875u micrel, inc. m9999-082407 hbwhelp@micrel.com or (408) 955-1690 v cc = 2.5v 5%; t a = ?40c to +85c; unless otherwise stated. symbol parameter condition min typ max units v ih input high voltage 2.0 v v il input low voltage 0.8 v i ih input high current ?125 20 a i il input low current ?300 a note 1. the circuit is designed to meet the dc specifications shown in the above table after thermal equilibrium has been established. note 2. specification for packaged product only. lvttl/cmos dc electrical characteristics (notes 1, 2) v cc = 2.5v 5%; t a = ?40c to +85c; unless otherwise stated. symbol parameter condition min typ max units v out output voltage swing note 3, 4 250 350 400 mv v oh output high voltage note 3 1.475 v v ol output low voltage note 3 0.925 v v ocm output common mode voltage note 4 1.125 1.375 v ? v ocm change in common mode voltage ?50 50 mv note 1. the circuit is designed to meet the dc specifications shown in the above table after thermal equilibrium has been established. note 2. specification for packaged product only. note 3. measured as per figure 2a, 100y across q and /q outputs. note 4. measured as per figure 2b. lvds dc electrical characteristics (notes 1, 2)
5 precision edge ? sy89875u micrel, inc. m9999-082407 hbwhelp@micrel.com or (408) 955-1690 v cc = 2.5v 5%; t a = ?40c to +85c; unless otherwise stated. symbol parameter condition min typ max units f max maximum input frequency output swing ? 200mv 2.0 2.5 ghz t pd differential propagation delay input swing < 400mv 590 690 870 ps in to q input swing ? 400mv 540 690 820 ps t skew within-device skew (diff.) note 3 515 ps part-to-part skew (diff.) note 3 280 ps t rr reset recovery time note 4 600 ps t jitter cycle-to-cycle jitter note 5 1ps rms total jitter note 6 10 ps pp t r ,t f rise/fall time (20% to 80%) 70 120 200 ps note 1. measured with 400mv input signal, 50% duty cycle, all outputs loaded with 100y across each output pair, unless otherwise stated . note 2. specification for packaged product only. note 3. skew is measured between outputs under identical transitions. note 4. see ? timing diagram.? note 5. cycle-to-cycle jitter definition: the variation in period between adjacent cycles over a random sample of adjacent cycle pairs. t jitter_cc =t n ?t n+1 , where t is the time between rising edges of the output signal. note 6. total jitter definition: with an ideal clock input of frequency - f max , no more than one output edge in 10 12 output edges will deviate by more than the specified peak-to-peak jitter value. ac electrical characteristics (notes 1, 2) timing diagram v id / reset in /in /q q t pd t rr v cc/2 v in swing v out swin g
6 precision edge ? sy89875u micrel, inc. m9999-082407 hbwhelp@micrel.com or (408) 955-1690 typical operating characteristics v cc = 2.5v, t a = 25c, unless otherwise stated. 0 50 100 150 200 250 300 350 0 500 1000 1500 2000 2500 3000 3500 amplitude (mv) frequency (mhz) output amplitude vs. frequency 500 550 600 650 700 750 800 0 200 400 600 800 1000 propagation delay (ps) input swing (mv) in to q propagation delay vs. input swing 500 550 600 650 700 750 800 -60 -40 -20 0 20 40 60 80 100 propagation delay (ps) temperature ( c) in to q propagation delay vs. temperature 40 45 50 55 60 0 500 1000 1500 2000 2500 3000 output duty cycle (mv) frequency (mhz) output duty cycle vs. frequency
7 precision edge ? sy89875u micrel, inc. m9999-082407 hbwhelp@micrel.com or (408) 955-1690 v in, v ou t 350mv (typica l) figure 1a. single-ended swing 700mv (typical) v diff_in , v diff_ou t figure 1b. differential swing typical operating characteristics (continued) v cc = 2.5v, t a = 25c, unless otherwise stated. 622mhz output time (300ps/div.) output swing (50mv/div.) 1.25ghz output time (140ps/div.) output swing (50mv/div.) 2.5ghz output time (80ps/div.) output swing (50mv/div.) definition of single-ended and differential swings
8 precision edge ? sy89875u micrel, inc. m9999-082407 hbwhelp@micrel.com or (408) 955-1690 input interface applications v cc gnd 50 ? 50 ? in v t / in 1.86 k 1.86 k 1.86k 1.86k figure 2a. simplified differential input buffer v cc gnd s0 s1 s2 /reset r 25k ? r figure 2b. simplified ttl/cmos input buffer lvds outputs lvds (low voltage differential swing) specifies a small swing of 350mv typical, on a nominal 1.25v common mode above ground. the common mode voltage has tight limits 100 ? gnd v od v oh , v ol v oh , v ol figure 3a. lvds differential measurement 50 ? gnd v ocm , ? v ocm 50 ? figure 3b. lvds common mode measurement to permit large variations in ground between an lvds driver and receiver. also, change in common mode voltage, as a function of data input, is also kept tight, to keep emi low.
9 precision edge ? sy89875u micrel, inc. m9999-082407 hbwhelp@micrel.com or (408) 955-1690 input interface applications cml in /in v t nc g nd sy89875 u v cc v cc v ref_ac nc figure 4a. dc-coupled cml input interface          
   figure 4b. ac-coupled cml input interface pecl in /in v t gnd sy89875u v cc v cc ?v v cc v ref_ac nc 0.01 f 39 ? v cc figure 4c. dc-coupled pecl input interface      
     
      figure 4d. ac-coupled cml input interface             
  figure 4e. lvds input interface        

 
 
figure 4f. hstl input interface part number function data sheet link sy89872u 2.5v, 2.5ghz any diff. in-to-lvds http://www.micrel.com/product-info/products/sy89872u.shtml programmable clock divider/fanout buffer w/ internal termination mlf ? application note http://www.amkor.com/products/notes_papers/mlf_appnote_0902.pdf hbw solutions new products and applications http://www.micrel.com/product-info/products/solutions.shtml related product and support documentation
10 precision edge ? sy89875u micrel, inc. m9999-082407 hbwhelp@micrel.com or (408) 955-1690 package ep- exposed pa d die compside island heat dissipation heavy copper plane heavy copper plane v ee v ee heat dissipation pcb thermal consideration for 16-pin mlf ? package (always solder, or equivalent, the exposed pad to the pcb) 16-pin micro leadframe ? (mlf-16) package notes: note 1. package meets level 2 moisture sensitivity classification, and are shipped in dry-pack form. note 2. exposed pads must be soldered to a ground for proper thermal management. micrel, inc. 2180 fortune drive san jose, ca 95131 usa tel + 1 (408) 944-0800 fax + 1 (408) 474-1000 web http://www.micrel.com the information furnished by micrel in this datasheet is believed to be accurate and reliable. however, no responsibility is as sumed by micrel for its use. micrel reserves the right to change circuitry and specifications at any time without notification to the customer. micrel products are not designed or authorized for use as components in life support appliances, devices or systems where malfu nction of a product can reasonably be expected to result in personal injury. life support devices or systems are devices or systems that (a) are intend ed for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant inj ury to the user. a purchaser?s use or sale of micrel products for use in life support appliances, devices or systems is at purchaser?s own risk and purchaser agrees to fully indemnify micrel for any damages resulting from such use or sale. ? 2005 micrel, incorporated.


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