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motorola nov 1996 rev 2.4 page 1 this document contains information on a product under development. motorola reserves the right to change or discontinue this product without notice. MC13282E mc13281fx p suffix plastic package case 724 the MC13282E is a three channels wideband amplifiers designed for use as a video pre- amplifier in high resolution rgb color moni- tor with osd feature. mc13281fx is a drop in replacement of MC13282E using for models without osd feature. motorola semiconductor technical data advance information 100mhz video processor with osd interface features : - 4vp-p output with 100mhz bandwidth - 3.5ns rise/fall time - subcontrast control - contrast control - 50mhz osd interface (MC13282E only) - osd contrast control (MC13282E only) - package: ndip 24 mc13281fx pin assignment (top view) 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 r sub_contrast r input g sub_contrast g input b sub_contrast b input ground rosd vcc gosd osd contrast bosd blank clamp r output r clamp cap v5 g output g clamp cap video vcc b clamp cap b output fast commutate contrast MC13282E 100mhz video processor with osd interface silicon monolithic integrated circuit temperature device range package MC13282Ep 0 to +70 o c plastic dip mc13281fxp 0 to +70 o c plastic dip 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 r sub_contrast r input g sub_contrast g input b sub_contrast b input ground nc vcc nc nc nc blank clamp r output r clamp cap v5 g output g clamp cap video vcc b clamp cap b output nc contrast
motorola nov 1996 rev 2.4 page 2 absolute maximum rating recommended operating conditions table 2 table 1 device should not be operated at these limits. refer to "recommended operating conditions" section for actual device operation. MC13282E / mc13281fx parameter pin value unit power supply voltage 9 -0.5,10 vdc 17 -0.5,10 vdc voltage at video amplifier inputs 2,4,6,8,10,12 -0.5,+5.0 vdc voltage at video amplifier output collectors 17 -0.5,10 vdc collector-emitter current (three channels) 17 120 ma storage temperature -65 to +150 ?c junction temperature 150 ?c operatin g temperature 0 to +70 ?c parameter pin min typ max unit power supply voltage 9,17 7.6 8 8.4 vdc power supply current 9,17 70 ma contrast control 13 0 5 vdc sub-contrast control 1,3,5 0 5 vdc blanking input threshold 24 1.25 v clamping input threshold 23 3.75 v video signal amplitude 2,4,6 0.7 vpp osd signal input low voltage 8,10,12 2.7 v osd signal input high voltage 8,10,12 3.3 v collector-emitter current (three channels) 17 0 50 ma operatin g ambient temperature 0 25 70 ?c
motorola nov 1996 rev 2.4 page 3 electrical characteristics ( refer to test circuit figure 1, ta=25?c, vcc=8.0vdc ) table 3 MC13282E / mc13281fx parameter condition pin min typ max unit input impedance 2,4,6 100 k w internal dc bias voltage 2.7 vdc input signal amplitude with 75 w resistor 2,4,6 0.7 1.0 vpp termination at input output signal amplitude v2,v4,v6 = 0.7vpp 15,19,22 3.6 4 vpp v1,v3,v5,v13 = 5v voltage gain v14 = 0v 5.6 v/v contrast control v13 = 5 to 0v 13 -26 db v1,v3,v5 = 5v sub-contrast control v1,v3,v5 = 5 to 0v 1,3,5 -26 db v13=5v emitter dc level 15,19,22 1.0 1.2 1.4 vdc clamping pulse width 500 ns blanking input threshold 24 1.25 v clamping input threshold 23 3.75 v video rise time v2,v4,v6 = 0.7vpp 15,19,22 3.5 ns video fall time vout = 4vpp 3.5 ns rl > 300 w , cl < 5pf video bandwidth v2,v4,v6 = 0.7vpp 15,19,22 100 mhz v1,v3,v5,v13 = 5v v14 = 0v rl > 300 w , cl < 5pf osd signal input low voltage 8,10,12 2.7 v osd signal input high voltage 8,10,12 3.3 v fast commutate input signal 14 ttl v osd rise time v8,v10,v12 = 5v 15,19,22 7 ns osd fall time v11=5v, v14=5v 7 ns osd bandwidth v8,v10,v12 = 5v 15,19,22 50 mhz v11=5v, v14=5v osd propa g ation dela y 17 ns it is recommended to use double sided pcb layout for high frequency measurement. (eg. rise/fall time, bandwidth.)
motorola nov 1996 rev 2.4 page 4 MC13282E / mc13281fx internal block diagram for MC13282E fast commutate 14 2 r video in 8 r osd in 1 r sub-contrast 13 contrast 4 g video in 10 g osd in 3 g sub-contrast 11 osd contrast 6 b video in 12 b osd in 5 b sub-contrast 21 r clamping cap 17 video vcc 22 r emitter out 18 g clamping cap 19 g emitter out 24 blanking pulse 23 clamping pulse 16 b clamping ca p 15 b emitter out 20 vcc 9 v5 7 gnd vref 1 vref 2 contrast & sub-contrast control processor contrast & sub-contrast control processor contrast & sub-contrast control processor r channel g channel b channel clamp blank decoder vref 1 vref 2 vref 1 vref 2
motorola nov 1996 rev 2.4 page 5 MC13282E / mc13281fx internal block diagram for mc13281fx nc 14 2 r video in 8 1 r sub-contrast 13 contrast 4 g video in 10 3 g sub-contrast 11 6 b video in 12 nc 5 b sub-contrast 21 r clamping cap 17 video vcc 22 r emitter out 18 g clamping cap 19 g emitter out 24 blanking pulse 23 clamping pulse 16 b clamping ca p 15 b emitter out 20 vcc 9 v5 7 gnd vref 1 vref 1 vref 1 vref 2 vref 2 vref 2 contrast & sub-contrast control processor contrast & sub-contrast control processor contrast & sub-contrast control processor r channel g channel b channel clamp blank decoder nc nc nc
motorola nov 1996 rev 2.4 page 6 pin name equivalent internal circuit description 1 r subcontrast these pins provides a max. of 26db control attentuation to vary the gain of each video amplifier separately. 3 g subcontrast control input voltage from 0 to 5v. increase the voltage will increase contrast 5 b subcontrast level. control 2 r input the input coupling capacitor is used for input clamping storage. the max- 4 g input imum source impedance is 100 w . 6 b input input polarity of the video signal is positive. norminal 0.7vpp input signal is recommended. (max. 1vpp) 7 video ground ground for the video section (video amplifiers, rgb channels and rgb osd, overall contrast/subcontrast controls and video reference voltage) 8 rosd input osd input for MC13282E and nc pins for mc13281fx. 1 0 gosd input 12 bosd input 9 vcc connect to +8v dc supply. decoupling is required at this pin. pin out description MC13282E / mc13281fx vcc 10k 20k pin 8,10,12 +5.0v 75ohm pin 2,4,6 vref 1k 5k clamp 20k +5v 50k vcc pin 1,3,5
motorola nov 1996 rev 2.4 page 7 pin name equivalent internal circuit description 11 osd contrast on screen display contrast control for MC13282E and nc pin for mc13281fx. input voltage from 0 to 5v. increase the voltage will increase the contrast of the osd signal 13 contrast overall contrast control the input range is from 0v to 5v. an increase of voltage increases contrast. 1 4 fast for MC13282E, commutate this pin is in conjunction with rgb osd inputs. it is a very fast switch used on the r,g,b inputs for over- laying text on picture. nc pin for mc13281fx and it should be connected to ground. 15 b emitter the video outputs are configured as output emitter-followers with driving capability of about 15ma. 1 9 g emitter the dc voltage at these three output emitters is set to 1.2v (black level). 2 2 r emitter the dc current through the output output stage is determined by the emitter resistors (typically 330 w ). pin out description +5v 3.5k vcc pin 11 +5v 80k vcc pin 13 vcc contrast video signal r = 330 e typical pin 15,19,22 MC13282E / mc13281fx vcc 20k 10k pin 14
motorola nov 1996 rev 2.4 page 8 pin out description MC13282E / mc13281fx pin name equivalent internal circuit description 1 6 b clamp normally a 100nf capacitor is capacitor connected to these pins. 1 8 g clamp the capacitor is used for video capacitor outputs dc restoration. 2 1 r clamp capacitor 17 video vcc connect to +8v dc supply. this vcc is for video output stage. it is internally connected to collectors of the ouput transistors. 20 5vref +5 volt regulator. minimum 10 m f capacitor is required for noise filtering and compensation. it can source up to 20ma but not sink current. output impedance is ? 10 w . recommend for voltage reference only. 2 3 clamp this pin is used for video clamping. the threshold clamping level is 3.75v 2 4 blank this pin is used for video blanking. the threshold blanking level is 1.25v pin 24 vcc vref 1 vref 2 10k 30k 1.25v pin 23 vcc vref 1 vref 2 10k 30k 3.75v pin 20 10 m f +5v band gap regulator vcc r 0.8r video out pin 16,18,21 +1.2v vcc
motorola nov 1996 rev 2.4 page 9 functional description the MC13282E/mc13281fx composes of three video amplifiers, clamping & blanking circuitries with contrast & sub-contrast controls and osd interface (MC13282E only). each video amplifier is designed to have a -3db bandwidth of 100mhz with a gain of up to about 5.6v/v or 15db. video input video input stages are high impedance and designed to accept a maximum signal of 1vp-p with 75 w termination (typically ) provided externally. during the clamping period, a current is provided to the input capacitor by the clamping circuit which brings the input to a proper dc level (nominal 2.7 volts). the blanking and clamping signals are to be provided externally with threshold sitting at 1.25v and 3.75v respectively. video output video output stages are configured as emitter-follower with driving capability of about 15ma for each channel. the dc voltage at these three emitters are set to 1.2 volts (black level). the dc current through each output stage is determined by the emitter resistor (typically 330 w ). contrast control the contrast control varies the gain of three video amplifiers from a minimum of 0.3 v/v to a maximum of 5.6v/v when all sub-contrast levels set to 5 volts. sub-contrast control each sub-contrast control provides a maximum of 26db attenuation on each video amplifier separately. MC13282E / mc13281fx
motorola nov 1996 rev 2.4 page 10 functional description osd interface three osd inputs typical bandwidth are 50mhz. a fast commutate pin is provided to select either the video or the osd inputs as a source for the amplification. osd contrast control is also provided for the amount of amplification required when osd inputs are selected. clamp pulse input the clamping pulse should be provided externally and the pulse width should be no less than 500ns. blank pulse input the blanking pulse is used to blank the video signal during the horizontal sync period or used as a control pin for video mute function. power supplies vcc and video vcc supplies are to be 8 volts +/-5% MC13282E / mc13281fx
motorola nov 1996 rev 2.4 page 11 figure 1: test circuit of MC13282E MC13282E / mc13281fx for mc13281fx, the pin 14 nc should be connected to ground and osd input pins 8, 10, 12 are no connection. 2 4 6 8 10 12 7 24 23 14 17 9 22 19 15 21 18 16 13 11 5 3 1 20 r channel g channel b channel contrast sub-contrast control r channel i/p g channel i/p b channel i/p rosd gosd bosd gnd v5 blank clamp fast commutate osd contrast video vcc vcc r channel emitter o/p g channel emitter o/p b channel emitter o/p r channel clamp cap. g channel clamp cap. b channel clamp cap. r1 75 r2 75 r3 75 c4 0.1uf clamp pulse input osd switch input vcc 8v c15 0.1uf r4 330 r5 330 r6 330 r output g output b output clamp cap c11 0.1uf c12 0.1uf c13 0.1uf 5v r input g input b input osd rgb inputs c1 0.1uf c2 0.1uf c3 0.1uf c10 0.1uf c9 0.1uf c8 0.1uf c7 0.1uf c6 0.1uf c14 47uf blank pulse input c4 0.1uf c5 10uf 5v 5v 5v 5v MC13282E video processor with osd interface
motorola nov 1996 rev 2.4 page 12 applica tion informa tion pcb layout care should be taken in the pcb layout to minimize the noise effect. the most sensitive pins are vcc(9), video vcc (17), v5(20), clamp cap (16,18,21). it is prefer to make a ground plane and connect vcc/video vcc & ground trace to power supply directly. separate decoupling capacitors should be used for vcc and video vcc and connected as close as possible to the device. multi-layer ceramic & tantalum capaci- tors are recommended for optimum performance. pin 20 v5 is designed as a +5v voltage reference for contrast, rgb subcontrast and osd contrast controls, so same precaution for vcc should be also applied at this pin. it is necessary to put the ground connection of three clamp capacitors close to ic ground pin. the copper trace of video signal input and output should be as short as possible and separated by ground trace to avoid any rgb cross-interference. a single side pcb layout is shown in figure 11 for reference. a double sided pcb should be used to optimize device's performance. rgb input & output the rgb output stages are designed as emitter-followers to drive the crt driver circuitry directly. the emitter resistor used is 330 w typically and the driving current is 15ma for each channel. the loading impedance connected to output stages should be greater than 330 w & less than 5pf for optimum performance. (rise/fall time, bandwidth) typical value for the loading capacitance is 3-5pf. figure 2 show a typical crt driver interface. each rgb input video signal with is normally terminated by a 75 w resistor for impedance matching and is ac coupled to the video input. for high resolution color monitor application, it is recommended to use coaxial cable or shielded cable for input signal connection. MC13282E / mc13281fx
motorola nov 1996 rev 2.4 page 13 applica tion informa tion clamp & blank input the clamping input is normally (except sync on green ) direct connected to a positive horizontal sync pulse with threshold level of 3.75v. it is used as a timing reference for the dc restoration process, so it should not be open circuit. if sync on green timing mode is used, the clamping pulse should be located at horizontal back porch period instead of horizontal sync tip period. otherwise, the black level will be clamped at a wrong dc level. the blanking input is used as a video mute or horizontal blanking control pin and is connected to a blanking pulse generated from flyback or mcu with threshold level of 1.25v. the blanking pulse width should be equal to the flyback retrace period to make sure that the video signal is blanked properly during retrace period. it is necessary to limit the amplitude and avoid any negative value occur if flyback pulse is used. the blanking input pin cannot accept a negative voltage input. this pin should be grounded if it is not using the blanking function. osd interface figure 3 show a typical osd application, the osd devices like mc141540 series can directly interface with MC13282E and do not require any level shift circuitry. separate power supply & ground is recommended for MC13282E and mc141540. care should be taken in the pcb layout to prevent the digital noise ( clock pulse ) from entering the analog portion of MC13282E. normally the osd switching only be occured at the video content period, it is not recommended to apply fast commutate signal to the device at horizontal sync tip period. MC13282E / mc13281fx
motorola nov 1996 rev 2.4 page 14 r i/p g i/p b i/p r osd g osd b osd fc con osd con v cc v 5 clamp r clamp g clamp b c lamp r con b con g con bl ank r o/p g o/p b o/p gnd r g b clamp input blank input video v cc +5v vcc +8v vr1 50k vr2 50k vr 3 50k input c1 0.1uf c2 0.1uf c3 0.1uf r1 75 r2 75 r3 75 +5v vr 5 50k c4 0.1uf c5 0 .1uf c6 0.1uf sa me as r ed channel c7 4 7uf c8 0.1uf c9 0.1uf c10 0.1uf c11 10uf c12 47uf r5 330 r6 330 r7 330 r4 10 ref. voltage crt driver vcc c l osd interface MC13282E / mc13281fx figure 2: interfacing with video output driver MC13282E video processor with osd interface for mc13281fx, the pin 14 nc should be connected to ground and osd input pins 8, 10, 12 are no connection.
motorola nov 1996 rev 2.4 page 15 MC13282E / mc13281fx figure 3: interfacing with osd device r i/p g i/p b i/p r osd g osd b osd fc con osd con v cc v 5 clamp r clamp g clamp b clamp r con b con g con blank r o/p g o/p b o/p gnd r g b clamp input blank input ss mosi sck v dd fc r osd b osd g osd htone mc141540 on screen display processor v ss v ssa v dda h f/b rp vco v f/b vsyn input hsyn input video v cc +5v vcc +8v vr1 50k vr2 50k vr3 50k input c1 0.1uf c2 0.1uf c3 0.1uf r1 75 r2 75 r3 75 +5v +5v vr4 50k vr5 50k c4 0.1uf c5 0.1uf c6 0.1uf rgb output c7 47uf c8 0.1uf c9 0.1uf c10 0.1uf c11 10uf c12 47uf r5 330 r6 330 r7 330 mcu interface v dda r4 10 r8 470k r9 5k6 r10 2k r11 7k5 c13 10nf c14 100nf c15 0.1uf c16 100uf c17 0.1uf c18 10uf vcc +5v vcc +5v l1 150mh MC13282E video processor with osd interface
motorola nov 1996 rev 2.4 page 16 figure 4: rgb in/out linearity figure 5: contrast control figure 6: sub-contrast control figure 8: crosstalk from green to red & blue channels figure 7: osd contrast control 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 0246 contrast control voltage (v) video output (vp-p) 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 0 0.2 0.4 0.6 0.8 video input (vp-p) video outout (vp-p) 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 0246 sub-contrast voltage (v) video output (vp-p) 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 0246 osd contrast control voltage (v) video output (vp-p) -80 -70 -60 -50 -40 -30 -20 -10 0 frequency (mhz) attenuation (db) red channel blue channel 110 100 MC13282E / mc13281fx
motorola nov 1996 rev 2.4 page 17 recommend to use double sided pcb without any socket for rise/fall time measurement. using a input pulse with 1.5ns rise time and a active probe with 1.7pf capacitance loading. MC13282E / mc13281fx figure 9: rise time figure 10: fall time 100mv/div 5ns/div 10x probe 100mv/div 5ns/div 10x probe
motorola nov 1996 rev 2.4 page 18 motorola reserves the right to make changes without further notice to any products herein to improve reliability, function or design. motorola does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor the rights of others. motorola is registered trademark of motorola, inc. MC13282E / mc13281fx figure 11: single sided pcb layout. (component side, 1:1 scale)

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