picor corporation ? www.picorpower.com qpi-11 data sheet rev. 1.4 page 1 of 5 7 a vi chip emi filter qpi-11 quietpower ? features ? >50 db cm attenuation at 1 mhz ? >70 db dm attenuation at 1 mhz ? 50 vdc (max input) ? 100 vdc surge 100 ms ? 750 vdc hi-pot hold off to shield plane ? 7 a rating ? 12.4 x 25 x 4.5 mm sip (system-in-a-package) ? low profile lga package ? -40 to +100c pcb temperature (see figure 6) ? efficiency >99% applications ? cots military and industrial ?v ? i chip input power filter figure 2 ? qpi-11 typical application schematic figure 1 ? qpi-11 actual size. figure 3 ? qpi-11 network analyzer attenuation curves description the qpi-11 emi filter is specifically designed to attenuate conducted common-mode (cm) and differential-mode (dm) noise of the vicor v ? i chip products to comply with the cispr22 standard requirements for conducted noise measurements. the filter is designed to operate up to 36 vdc and supports 7 a loads up to 60c without derating. designed for the military and industrial bus range, the v ? i chip emi filter supports the picmg? 3.0 specification for filtering system boards to the en55022 class b limits. ?
picor corporation ? www.picorpower.com qpi-11 data sheet rev. 1.4 page 2 of 5 absolute maximum ratings ? exceeding these parameters may result in permanent damage to the product. electrical characteristics ? parameter limits apply over the operating pcb temperature range unless otherwise noted pins parameter notes min max units bus+ to bus? input voltage continuous -50 50 vdc bus+ to bus? input voltage 100 ms transient -100 100 vdc bus+ / bus? to shield plane bus inputs to shield hipot -750 750 vdc qpi+ to qpi? input to output current continuous @ 25c 7 adc package power dissipation @ 25c 1.50 w package operating temperature pcb to filter interface 100 c package thermal resistance free air 75 c/w package thermal resistance pcb layout fig. 5 30 c/w package storage temperature -55 125 c package reflow temperature 20 s exposure (1) 212 c all pins esd hbm -2 +2 kv parameter notes min typ max units bus+ to bus- input range measured at 7 a 5 50 vdc bus+ to out+ voltage drop measured at 7 a (2) 110 mvdc bus- to out- voltage drop measured at 7 a (2) 110 mvdc common mode attenuation vbus = 24 v frequency = 1.0 mhz 50 db differential mode attenuation vbus = 24 v frequency = 1.0 mhz 70 db input bias current at 40 v input current from bus+ to bus- 10 a note 1: rohs compliant product maximum peak temperature is 245c for 20 seconds. pad description sip package outline pin number name description 8, 9 bus + positive bus voltage 1, 10 bus ? negative bus potential 6, 7 out + positive input to the converter 4, 5 out ? negative input to the converter 2, 3 shield the shield connects to system shield and may connect to the converter created shield plane note 2: see figure 6 for current derating curve. ordering information part number description QPI-11L qpi-11 land grid array package QPI-11Lz qpi-11 land grid array package, rohs compliant
picor corporation ? www.picorpower.com qpi-11 data sheet rev. 1.4 page 3 of 5 emi performance figure 4 ? total noise: prm (mp028f036m12al) and vtm (mv036f120m010) with 9.6 a load, no qpi-11. figure 5 ?total noise: prm (mp028f036m12al) and vtm (mv036f120m010) with 9.6 a load and qpi-11. figure 6 ? current vs. pcb temperature derating curve. when laying out the qpi-12l, care must be taken such that the input and output signal polygons do not overlap each other on low er layers.
picor corporation ? www.picorpower.com qpi-11 data sheet rev. 1.4 page 4 of 5 qpi-11 pcb layout recommendations figure 5 ? recommended mounting on a 2 layer board the filtering performance of the qpi-11 and ?12 is sensitive to capacitive coupling between its input and output pins. parasitic plane capacitance must be kept below 1 pico-farad between inputs and outputs using the layout shown above and the recommendations described below to achieve maximum conducted emi performance. to avoid capacitive coupling between input and output pins, there should not be any planes or large traces that run under both input and output pins, such as a ground plane or power plane. for example, if there are two signal planes or large traces where one trace runs under the input pins, and the other under the output pins, and both planes over lap in another area, they will cause capacitive coupling between input and output pins. also, planes that run under both input and outputs pins, but do not cross, can cause capacitive coupling if they are capacitively by-passed together. figure 5 shows the recommended pcb layout on a 2 layer board. here, the top layer planes are duplicated on the bottom layer so that there can be no over- lapping of input and output planes. this method can be used for boards of greater layer count. picor?s z version qp sips are not hermetically sealed and must not be exposed to liquid, including but not limited to cleaning solvents, aqueous washing solutions or pressurized sprays. when soldering, it is recommended that no-clean flux solder be used, as this will insure that potentially corrosive mobile ions will not remain on, around, or under the module following the soldering process. post solder cleaning
picor corporation ? www.picorpower.com ? qpi-11 data sheet rev. 1.4 10/07 vicor?s comprehensive line of power solutions includes high-density ac-dc & dc-dc modules and accessory components, fully configurable ac-dc & dc-dc power supplies, and complete custom power systems. information furnished by vicor is believed to be accurate and reliable. however, no responsibility is assumed by vicor for its use. no license is granted by implication or otherwise under any patent or patent rights of vicor. vicor components are not designed to be used in applications, such as life support systems, wherein a failure or malfunction could result in injury or death. all sales are subject to vicor?s terms and conditions of sale, which are available upon request. specifications are subject to change without notice. vicor corporation 25 frontage road, andover, ma, usa 01810 tel: 800-735-6200 fax: 978-475-6715 email vicor express: vicorexp@vicr.com technical support: apps@vicr.com
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