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rev. c a one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781/329-4700 www.analog.com fax: 781/326-8703 ?2003 analog devices, inc. all rights reserved. AD8051/ad8052/ad8054 low cost, high speed rail-to-rail amplifiers information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective companies. features low cost single (AD8051), dual (ad8052), and quad (ad8054) voltage feedback architecture fully specified at +3 v, +5 v, and 5 v supplies single-supply operation output swings to within 25 mv of either rail input voltage range: ?.2 v to +4 v; v s = +5 v high speed and fast settling on 5 v: 110 mhz ? db bandwidth (g = +1) (AD8051/ad8052) 150 mhz ? db bandwidth (g = +1) (ad8054) 145 v/ s slew rate 50 ns settling time to 0.1% small packaging AD8051 available in sot-23-5 ad8052 available in msop-8 ad8054 available in tssop-14 good video specifications (g = +2) gain flatness of 0.1 db to 20 mhz; r l = 150 0.03% differential gain error; r l = 1 k 0.03 differential phase error; r l = 1 k low distortion ?0 dbc total harmonic @ 1 mhz, r l = 100 outstanding load drive capability drives 45 ma, 0.5 v from supply rails (AD8051/ ad8052) drives 50 pf capacitive load (g = +1) (AD8051/ ad8052) low power of 2.75 ma/amplifier (ad8054) low power of 4.4 ma/amplifier (AD8051/ad8052) applications coax cable driver active filters video switchers a/d driver professional cameras ccd imaging systems cd/dvd rom pin connections ( top views) general description the AD8051 (single), ad8052 (dual), and ad8054 (quad) are low cost, voltage feedback, high speed amplifiers designed to operate on +3 v, +5 v, or 5 v supplies. they have true single- supply capability with an input voltage range extending 200 mv below the negative rail and within 1 v of the positive rail. despite their low cost, the AD8051/ad8052/ad8054 provide excellent overall performance and versatility. the output voltage swing extends to within 25 mv of each rail, providing the maxi- mum output dynamic range with excellent overdrive recovery. rn-8 8 7 6 5 1 2 3 4 nc ?n +in nc +v s v out nc ? s AD8051 nc = no connect sot-23-5 (rt) 1 2 3 5 4 ?n +in +v s v out AD8051 + ? s rn-14, tssop-14 (ru-14) v+ +in b out b out d +in d v +in c out c ad8054 +in a out a in a in b in c in d 1 2 3 4 5 6 7 14 13 12 11 10 9 8 rn-8, msop (rm) 8 7 6 5 1 2 3 4 + + out1 ?n1 +in1 out +v s ?n2 ? s ad8052 +in2
rev. c ? AD8051/ad8052/ad8054 this makes the AD8051/ad8052/ad8054 useful for video electronics, such as cameras, video switchers, or any high speed portable equipment. low distortion and fast settling make them ideal for active filter applications. the AD8051/ad8052/ad8054 offer low power supply current and can operate on a single 3 v power supply. these features are ideally suited for portable and battery-powered applications where size and power are critical. the wide bandwidth and fast slew rate on a single +5 v supply make these amplifiers useful in many general-purpose, high speed applications where dual power supplies of up to 6 v and single supplies from +3 v to +12 v are needed. all of this low cost performance is offered in an 8-lead soic, along with a tiny sot-23-5 package (AD8051), an msop package (ad8052), and a tssop-14 (ad8054). the AD8051 and ad8052 in the soic-8 package are available in the ex tended temperature range of C 40 c to +125 c. frequency ?mhz 4.5 0 50 0.1 1 10 3.0 1.5 1.0 0.5 4.0 3.5 2.0 2.5 5.0 peak-to-peak output voltage swing (thd 0.5%) ?v v s = +5v g = ? r f = 2k r l = 2k figure 1. low distortion rail-to-rail output swing
rev. c ? AD8051/ad8052/ad8054?pecifications AD8051a/ad8052a ad8054a parameter conditions min typ max min typ max unit dynamic performance C 3 db small signal bandwidth g = +1, v o = 0.2 v p-p 70 110 80 150 mhz g = C 1, +2, v o = 0.2 v p-p 50 60 mhz bandwidth for 0.1 db flatness g = +2, v o = 0.2 v p-p, r l = 150 ? to 2.5 v, r f = 806 ? for AD8051a/ ad8052a 20 mhz r f = 200 ? for ad8054a 12 mhz slew rate g = C 1, v o = 2 v step 100 145 140 170 v/ s full power response g = +1, v o = 2 v p-p 35 45 mhz settling time to 0.1% g = C 1, v o = 2 v step 50 40 ns noise/distortion performance total harmonic distortion * f c = 5 mhz, v o = 2 v p-p, g = +2 C 67 C 68 db input voltage noise f = 10 khz 16 16 nv/ hz input current noise f = 10 khz 850 850 fa/ hz differential gain error (ntsc) g = +2, r l = 150 ? to 2.5 v 0.09 0.07 % r l = 1 k ? to 2.5 v 0.03 0.02 % differential phase error (ntsc) g = +2, r l = 150 ? to 2.5 v 0.19 0.26 degrees r l = 1 k ? to 2.5 v 0.03 0.05 degrees crosstalk f = 5 mhz, g = +2 C 60 C 60 db dc performance input offset voltage 1.7 10 1.7 12 mv t min C t max 25 30 mv offset drift 10 15 v/ c input bias current 1.4 2.5 2 4.5 a t min C t max 3.25 4.5 a input offset current 0.1 0.75 0.2 1.2 a open-loop gain r l = 2 k ? to 2.5 v 86 98 82 98 db t min C t max 96 96 db r l = 150 ? to 2.5 v 76 82 74 82 db t min C t max 78 78 db input characteristics input resistance 290 300 k ? input capacitance 1.4 1.5 pf input common-mode voltage range C 0.2 to +4 C 0.2 to +4 v common-mode rejection ratio v cm = 0 v to 3.5 v 72 88 70 86 db * refer to tpc 13. specifications subject to change without notice. (@ t a = 25 c, v s = 5 v, r l = 2 k to 2.5 v, unless otherwise noted.)
rev. c ? AD8051/ad8052/ad8054 AD8051a/ad8052a ad8054a parameter conditions min typ max min typ max unit output characteristics output voltage swing r l = 10 k ? to 2.5 v 0.015 to 4.985 0.03 to 4.975 v r l = 2 k ? to 2.5 v 0.1 to 4.9 0.025 to 4.975 0.125 to 4.875 0.05 to 4.95 v r l = 150 ? to 2.5 v 0.3 to 4.625 0.2 to 4.8 0.55 to 4.4 0.25 to 4.65 v output current v out = 0.5 v to 4.5 v 45 30 ma t min C t max 45 30 ma short circuit current sourcing 80 45 ma sinking 130 85 ma capacitive load drive g = +1 (AD8051/ ad8052) 50 pf g = +2 (ad8054) 40 pf power supply operating range 3 12 3 12 v quiescent current/ amplifier 4.4 5 2.75 3.275 ma power supply rejection ratio v s = 1 v 70 80 68 80 db operating temperature rm, rt, range ru, rn-14 C 40 +85 C 40 +85 c rn-8 C 40 +125 c specifications subject to change without notice. ?pecifications (continued)
rev. c ? AD8051/ad8052/ad8054?pecifications AD8051a/ad8052a ad8054a parameter conditions min typ max min typ max unit dynamic performance C 3 db small signal bandwidth g = +1, v o = 0.2 v p-p 70 110 80 135 mhz g = C 1, +2, v o = 0.2 v p-p 50 65 mhz bandwidth for 0.1 db flatness g = +2, v o = 0.2 v p-p, r l = 150 ? to 2.5 v, r f = 402 ? for AD8051a/ ad8052a 17 mhz r f = 200 ? for ad8054a 10 mhz slew rate g = C 1, v o = 2 v step 90 135 110 150 v/ s full power response g = +1, v o = 1 v p-p 65 85 mhz settling time to 0.1% g = C 1, v o = 2 v step 55 55 ns noise/distortion performance total harmonic distortion * f c = 5 mhz, v o = 2 v p-p, g = C 1, r l = 100 ? to 1.5 v C 47 C 48 db input voltage noise f = 10 khz 16 16 nv/ hz input current noise f = 10 khz 600 600 fa/ hz differential gain error (ntsc) g = +2, v cm = 1 v r l = 150 ? to 1.5 v, 0.11 0.13 % r l = 1 k ? to 1.5 v 0.09 0.09 % differential phase error (ntsc) g = +2, v cm = 1 v r l = 150 ? to 1.5 v 0.24 0.3 degrees r l = 1 k ? to 1.5 v 0.10 0.1 degrees crosstalk f = 5 mhz, g = +2 C 60 C 60 db dc performance input offset voltage 1.6 10 1.6 12 mv t min C t max 25 30 mv offset drift 10 15 v/ c input bias current 1.3 2.6 2 4.5 a t min C t max 3.25 4.5 a input offset current 0.15 0.8 0.2 1.2 a open-loop gain r l = 2 k ? 80 96 80 96 db t min C t max 94 94 db r l = 150 ? 74 82 72 80 db t min C t max 76 76 db * refer to tpc 13. specifications subject to change without notice. (@ t a = 25 c, v s = 3 v, r l = 2 k to 1.5 v, unless otherwise noted.)
rev. c ? AD8051/ad8052/ad8054 AD8051a/ad8052a ad8054a parameter conditions min typ max min typ max unit input characteristics input resistance 290 300 k ? input capacitance 1.4 1.5 pf input common-mode voltage range C 0.2 to +2 C 0.2 to +2 v common-mode rejection ratio v cm = 0 v to 1.5 v 72 88 70 86 db output characteristics output voltage swing r l = 10 k ? to 1.5 v 0.01 to 2.99 0.025 to 2.98 v r l = 2 k ? to 1.5 v 0.075 to 2.9 0.02 to 2.98 0.1 to 2.9 0.35 to 2.965 v r l = 150 ? to 1.5 v 0.2 to 2.75 0.125 to 2.875 0.35 to 2.55 0.15 to 2.75 v output current v out = 0.5 v to 2.5 v 45 25 ma t min C t max 45 25 ma short circuit current sourcing 60 30 ma sinking 90 50 ma capacitive load drive g = +1 (AD8051/ ad8052) 45 pf g = +2 (ad8054) 35 pf power supply operating range 3 12 3 12 v quiescent current/ amplifier 4.2 4.8 2.625 3.125 ma power supply rejection ratio v s = 0.5 v 68 80 68 80 db operating temperature rm, rt, range ru, rn-14 C 40 +85 C 40 +85 c rn-8 C 40 +125 c specifications subject to change without notice. ?pecifications (continued)
rev. c ? AD8051/ad8052/ad8054?pecifications AD8051a/ad8052a ad8054a parameter conditions min typ max min typ max unit dynamic performance C 3 db small signal bandwidth g = +1, v o = 0.2 v p-p 70 110 85 160 mhz g = C 1, +2, v o = 0.2 v p-p 50 65 mhz bandwidth for 0.1 db flatness g = +2, v o = 0.2 v p-p, r l = 150 ? , r f = 1.1 k ? for AD8051a/ad8052a 20 mhz r f = 200 ? for ad8054a 15 mhz slew rate g = C 1, v o = 2 v step 105 170 150 190 v/ s full power response g = +1, v o = 2 v p-p 40 50 mhz settling time to 0.1% g = C 1, v o = 2 v step 50 40 ns noise/distortion performance total harmonic distortion f c = 5 mhz, v o = 2 v p-p, g = +2 C 71 C 72 db input voltage noise f = 10 khz 16 16 nv/ hz input current noise f = 10 khz 900 900 fa/ hz differential gain error (ntsc) g = +2, r l = 150 ? 0.02 0.06 % r l = 1 k ? 0.02 0.02 % differential phase error (ntsc) g = +2, r l = 150 ? 0.11 0.15 degrees r l = 1 k ? 0.02 0.03 degrees crosstalk f = 5 mhz, g = +2 C 60 C 60 db dc performance input offset voltage 1.8 11 1.8 13 mv t min C t max 27 32 mv offset drift 10 15 v/ c input bias current 1.4 2.6 2 4.5 a t min C t max 3.5 4.5 a input offset current 0.1 0.75 0.2 1.2 a open-loop gain r l = 2 k ? 88 96 84 96 db t min C t max 96 96 db r l = 150 ? 78 82 76 82 db t min C t max 80 80 db (@ t a = 25 c, v s = 5 v, r l = 2 k to ground, unless otherwise noted.)
rev. c ? AD8051/ad8052/ad8054 AD8051a/ad8052a ad8054a parameter conditions min typ max min typ max unit input characteristics input resistance 290 300 k ? input capacitance 1.4 1.5 pf input common-mode voltage range C 5.2 to +4 C 5.2 to +4 v common-mode rejection ratio v cm = C 5 v to +3.5 v 72 88 70 86 db output characteristics output voltage swing r l = 10 k ? C 4.98 to +4.98 C 4.97 to +4.97 v r l = 2 k ? C 4.85 to +4.85 C 4.97 to +4.97 C 4.8 to +4.8 C 4.9 to +4.9 v r l = 150 ? C 4.45 to +4.3 C 4.6 to +4.6 C 4.0 to +3.8 C 4.5 to +4.5 v output current v out = C 4.5 v to +4.5 v 45 30 ma t min C t max 45 30 ma short circuit current sourcing 100 60 ma sinking 160 100 ma capacitive load drive g = +1 (AD8051/ ad8052) 50 pf g = +2 (ad8054) 40 pf power supply operating range 3 12 3 12 v quiescent current/ amplifier 4.8 5.5 2.875 3.4 ma power supply rejection ratio v s = 1 v 68 80 68 80 db operating temperature rm, rt, range ru, rn-14 C 40 +85 C 40 +85 c rn-8 C 40 +125 c specifications subject to change without notice. ?pecifications (continued)
rev. c AD8051/ad8052/ad8054 ? caution esd (electrostatic discharge) sensitive device. electrostatic charges as high as 4000 v readily accumulate on the human body and test equipment and can discharge without detection. although the AD8051/ad8052/ad8054 features proprietary esd protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. therefore, proper esd precautions are recommended to avoid performance degradation or loss of functionality. absolute maximum ratings 1 supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.6 v internal power dissipation 2 small outline package (rn) . observe power derating curves sot-23-5 package . . . . . . . . observe power derating curves msop package . . . . . . . . . . . observe power derating curves tssop-14 package . . . . . . . observe power derating curves input voltage (common mode) . . . . . . . . . . . . . . . . . . . . v s differential input voltage . . . . . . . . . . . . . . . . . . . . . . . 2.5 v output short circuit duration observe power derating curves storage temperature range (rn) . . . . . . . . C 65 c to +150 c operating temperature range (a grade) . . C 40 c to +125 c lead temperature range (soldering 10 sec) . . . . . . . . . 300 c notes 1 stresses above those listed under absolute maximum ratings may cause perma- nent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 specification is for device in free air: 8-lead soic: ja = 125 c/w 5-lead sot-23-5: ja = 180 c/w 8-lead msop: ja = 150 c/w 14-lead soic: ja = 90 c/w 14-lead tssop: ja = 120 c/w maximum power dissipation the maximum power that can be safely dissipated by the AD8051/ad8052/ad8054 is limited by the associated rise in junction temperature. the maximum safe junction temperature for plastic encapsulated devices is determined by the glass transition temperature of the plastic, approximately 150 c. temporarily exceeding this limit may cause a shift in parametric performance due to a change in the stresses exerted on the die by the package. exceeding a junction temperature of 175 c for an extended period can result in device failure. while the AD8051/ad8052/ad8054 are internally short circuit protected, this may not be sufficient to guarantee that the maxi- mum junction temperature (150 c) is not exceeded under all conditions. to ensure proper operation, it is necessary to ob serve the maximum power derating curves. ambient temperature ? c ?5 0 2.0 1.5 1.0 0.5 ?5 ?5 5 15 35 55 75 95 115 maximum power dissipation ?w 2.5 msop-8 soic-8 sot-23-5 soic-14 tssop-14 figure 2. plot of maximum power dissipation vs. temperature for AD8051/ad8052/ad8054 ordering guide temperature package package brand model range descriptions options * code AD8051ar C 40 c to +125 c 8-lead soic rn-8 AD8051ar-reel C 40 c to +125 c 13" tape and reel rn-8 AD8051ar-reel7 C 40 c to +125 c 7" tape and reel rn-8 AD8051art-reel C 40 c to +85 c 13" tape and reel rt-5 h2a AD8051art-reel7 C 40 c to +85 c 7" tape and reel rt-5 h2a ad8052ar C 40 c to +125 c 8-lead soic rn-8 ad8052ar-reel C 40 c to +125 c 13" tape and reel rn-8 ad8052ar-reel7 C 40 c to +125 c 7" tape and reel rn-8 ad8052arm C 40 c to +85 c 8-lead msop rm-8 h4a ad8052arm-reel C 40 c to +85 c 13" tape and reel rm-8 h4a ad8052arm-reel7 C 40 c to +85 c 7" tape and reel rm-8 h4a ad8054ar C 40 c to +85 c 14-lead soic rn-14 ad8054ar-reel C 40 c to +85 c 13" tape and reel rn-14 ad8054ar-reel7 C 40 c to +85 c 7" tape and reel rn-14 ad8054aru C 40 c to +85 c 14-lead msop ru-14 ad8054aru-reel C 40 c to +85 c 13" tape and reel ru-14 ad8054aru-reel7 C 40 c to +85 c 7" tape and reel ru-14 * rn = small outline; rm = micro small outline; rt = surface mount; ru = tssop.
rev. c ?0 AD8051/ad8052/ad8054 frequency ?mhz 3 2 ? 0.1 1 10 100 v s = +5v gain as shown r f as shown r l = 2k v o = 0.2v p-p g = +10 r f = 2k g = +5 r f = 2k g = +1 r f = 0 g = +2 r f = 2k ? ? ? ? 1 0 ? ? 500 normalized gain ?db tpc 1. AD8051/ad8052 normalized gain vs. frequency; v s = +5 v frequency ?mhz 3 2 ? 0.1 500 110 100 ? ? ? ? 1 0 ? ? v s = +3v v s = 5v v s = +5v v s as shown g = +1 r l = 2k v o = 0.2v p-p gain ?db tpc 2. AD8051/ad8052 gain vs. frequency vs. supply frequency ?mhz 3 2 ? 0.1 500 110 100 ? ? ? ? 1 0 ? ? ?0 c +25 c +85 c v s = +5v g = +1 r l = 2k v o = 0.2v p-p temperature as shown gain ?db tpc 3. AD8051/ad8052 gain vs. frequency vs. temperature 1m 10m 100m frequency ?hz 3 0 ? ? ? 100k g = +1 r f = 0 v s = +5v gain as shown r f as shown r l = 5k v o = 0.2v p-p g = +5 r f = 2k g = +2 r f = 2k g = +10 r f = 2k ? ? ? ? 5 4 2 1 500m normalized gain ?db tpc 4. ad8054 normalized gain vs. frequency; v s = +5 v g = +1 r l = 2k c l = 5pf v o = 0.2v p-p +3v +5v 5v +3v +5v 5v 6 2 ? 100k 5 4 3 1 0 ? ? ? 1m 10m 100m frequency ?hz 500m gain ?db tpc 5. ad8054 gain vs. frequency vs. supply 4 0 ? 3 2 1 ? ? ? ? 110 100 frequency ?mhz v s = +5v r l = 2k to 2.5v c l = 5pf g = +1 v o = 0.2v p-p ?0 c +25 c +85 c gain ?db 500 tpc 6. ad8054 gain vs. frequency vs. temperature ?ypical performance characteristics
rev. c AD8051/ad8052/ad8054 ?1 frequency ?mhz 6.3 6.2 5.3 0.1 110 100 v s = +5v g = +2 r l = 150 r f = 806 v o = 0.2v p-p 5.9 5.6 5.5 5.4 6.1 6.0 5.7 5.8 gain flatness ?db tpc 7. AD8051/ad8052 0.1 db gain flatness vs. frequency; g = +2 frequency ?mhz 9 8 ? 0.1 500 110 100 5 2 1 0 7 6 3 4 v s as shown g = +2 r l = 2k r f = 2k v o as shown v s = +5v v o = 2v p-p v s = 5v v o = 4v p-p gain ?db tpc 8. AD8051/ad8052 large signal frequency response; g = +2 frequency ?mhz 80 70 ?0 0.01 500 0.1 1 10 100 40 10 0 ?0 60 50 20 30 0 ?5 ?0 ?35 ?80 gain phase 50 phase margin v s = +5v r l = 2k open-loop gain ?db phase ?degrees tpc 9. AD8051/ad8052 open-loop gain and phase vs. frequency 6.3 5.9 5.4 6.2 6.1 6.0 5.8 5.7 5.6 5.5 1 100 10 v s = +5v r f = 200 r l = 150 g = +2 v o = 0.2v p-p frequency ?mhz gain flatness ?db 5.3 tpc 10. ad8054 0.1 db gain flatness vs. frequency; g = +2 frequency ?mhz 0.1 500 110 100 v s = +5v v o = 2v p-p v s = 5v v o = 4v p-p v s as shown g = +2 r l = 2k r f = 2k v o as shown 9 8 7 6 5 4 3 2 1 0 ? gain ?db tpc 11. ad8054 large signal frequency response; g = +2 80 40 ?0 70 60 50 30 20 10 0 ?0 30k 100k 1m 10m 100m gain phase 45 phase margin v s = +5v r l = 2k c l = 5pf frequency ?hz 180 135 90 45 0 500m open-loop gain ?db phase margin ?degrees tpc 12. ad8054 open-loop gain and phase margin vs. frequency
rev. c ?2 AD8051/ad8052/ad8054 fundamental frequency ?mhz 12345 678910 20 30 110 70 80 90 100 50 60 40 v o = 2v p-p v s = +3v, g = 1 r f = 2k , r l = 100 v s = +5v, g = +2 r f = 2k , r l = 100 v s = +5v, g = +1 r l = 100 v s = +5v, g = +2 r f = 2k , r l = 2k v s = +5v, g = +1 r l = 2k total harmonic distortion ?dbc tpc 13. total harmonic distortion output voltage ?v p-p 0 5.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 30 40 120 80 90 100 110 60 70 50 130 140 v s = +5v r l = 2k g = +2 1mhz 5mhz 10mhz worst harmonic ?dbc tpc 14. worst harmonic vs. output voltage 0.05 0.00 0.05 0.10 0.15 0.20 0.25 0.10 0 100 50 10 60 20 70 30 80 40 90 modulating ramp level ?ire 0.10 0.06 0 100 50 0.08 0.06 0.04 0.02 0.00 0.02 0.04 10 60 20 70 30 80 40 90 ntsc subscriber (3.58mhz) v s = +5, g = +2 r f = 2k , r l as shown v s = +5, g = +2 r f = 2k , r l as shown r l = 150 r l = 1k r l = 1k r l = 150 differential gain error ?% differential phase error ?degrees tpc 15. AD8051/ad8052 differential gain and phase errors 1000 100 1 10 10m 100 voltage noise ?na hz 1k 10k 100k 1m 10 v s = +5v frequency ?hz tpc 16. input voltage noise vs. frequency 100 10 0.1 10 10m 100 1k 10k 100k 1m 1 v s = +5v frequency ?hz current noise ?pa hz tpc 17. input current noise vs. frequency 0.10 ?.10 0.05 0.00 ?.05 1st 6th 2nd 7th 3rd 8th 4th 9th 5th 10th 11th 0.2 0.1 0.0 ?.1 ?.2 ?.3 0.3 v s = +5, g = +2 r f = 2k , r l as shown v s = +5, g = +2 r f = 2k , r l as shown r l = 150 r l = 1k r l = 1k r l = 150 ntsc subscriber (3.58mhz) 1st 6th 2nd 7th 3rd 8th 4th 9th 5th 10th 11th differential gain ?% differential phase ?degrees modulating ramp level ?ire tpc 18. ad8054 differential gain and phase errors
rev. c AD8051/ad8052/ad8054 ?3 frequency ?mhz ?0 ?0 0.1 500 110 100 ?0 ?0 ?0 ?00 ?0 ?0 ?0 ?0 v s = +5v r f = 2k r l = 2k v o = 2v p-p crosstalk ?db tpc 19. ad8052 crosstalk (output-to-output) vs. frequency frequency ?mhz 0 ?0 ?00 0.03 500 0.1 1 10 100 ?0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 v s = +5v cmrr ?db tpc 20. cmrr vs. frequency frequency ?mhz 100 0.1 1 10 100 500 3.1 0.1 0.031 0.01 31 10 0.31 1 v s = 5v g = 1 output resistance ? tpc 21. closed-loop output resistance vs. frequency ?0 ?0 ?00 ?0 ?0 ?0 ?0 ?0 ?0 ?0 ?10 0.1 110 100 frequency ?mhz 500 v s = 5v r f = 1k r l = as shown v o = 2v p-p r l = 1k r l = 100 crosstalk ?db tpc 22. ad8054 crosstalk (output-to-output) vs. frequency frequency ?mhz 20 ?0 ?0 ?0 ?0 10 0 ?0 ?0 ?0 ?0 1 500 10 100 0.1 0.01 v s = +5v ?srr +psrr psrr ?db tpc 23. psrr vs. frequency input steps ?v p-p 60 0 40 30 20 10 50 70 0.5 2 1 1.5 settling time to 0.1% ns AD8051/ad8052 ad8054 v s = 5v g = 1 r l = 2k tpc 24. settling time vs. input step
rev. c ?4 AD8051/ad8052/ad8054 load current ?ma 1.00 0.30 0 065 5101 520 253035 4 045505560 0.90 0.40 0.20 0.10 0.70 0.50 0.80 0.60 70 75 80 85 v oh = +85 c v oh = +25 c v oh = ?0 c v ol = +85 c v ol = +25 c v ol = ?0 c v s = +5v output saturation voltage ?v tpc 25. AD8051/ad8052 output saturation voltage vs. load current 100 90 60 05 0.5 1 1.5 2 2.5 3 3.5 4 4.5 80 70 r l = 2k r l = 150 v s = +5v open-loop gain ?db output voltage ?v tpc 26. open-loop gain vs. output voltage load current ?ma 1.00 0.500 0.00 0.875 0.750 0.250 0.125 0.625 0.375 030 36912 15 18 21 24 27 v s = +5v +5v ? oh (+25 c) +5v ? oh (?5 c) +5v ? oh (+125 c) v ol (+125 c) v ol (+25 c) v ol (?5 c) output saturation voltage ?v tpc 27. ad8054 output saturation voltage vs. load current
rev. c AD8051/ad8052/ad8054 ?5 1.50 volts figure 3. 100 mv step response, g = +1 20ns 2.50 2.60 2.40 volts figure 4. AD8051/ad8052 200 mv step response; v s = +5 v, g = +1 20ns volts 3.5 2.5 1.5 0.5 4.5 500mv figure 5. large signal step response; v s = +5 v, g = +2 5 2.5 volts figure 6. output swing; g = ?, r l = +2 k ? 2.55 2.50 2.45 volts figure 7. ad8054 100 mv step response; v s = +5 v, g = +1 4 3 2 1 1 2 3 4 volts figure 8. large signal step response; v s = 5 v, g = +1
rev. c ?6 AD8051/ad8052/ad8054 overdrive recovery overdrive of an amplifier occurs when the output and/or input range is exceeded. the amplifier must recover from this over drive condition. as shown in figure 9, the AD8051/ad8052/ad8054 recovers within 60 ns from negative overdrive and within 45 ns from positive overdrive. volts figure 9. overdrive recovery driving capacitive loads consider the AD8051/ad8052 in a closed-loop gain of +1 with +v s = 5 v and a load of 2 k ? in parallel with 50 pf. figures 10 and 11 show its frequency and time domain responses, respec- tively, to a small-signal excitation. the capacitive load drive of the AD8051/ad8052/ad8054 can be increased by adding a low valued resistor in series with the load. figures 12 and 13 show the effect of a series resistor on the capacitive drive for varying voltage gains. as the closed-loop gain is increased, the larger phase margin allows for larger capacitive loads with less peaking. adding a series resistor with lower closed-loop gains accomplishes the same effect. for large capacitive loads, the frequency response of the amplifier will be dominated by the roll-off of the series resistor and the load capacitance. frequency ?mhz 500 0.1 1 10 100 v s = +5v g = +1 r l = 2k c l = 50pf v o = 200mv p-p 8 6 4 2 0 2 4 6 8 10 gain ?db figure 10. AD8051/ad8052 closed-loop frequency response: cl = 50 pf 2.60 2.55 2.50 2.45 2.40 volts figure 11. AD8051/ad8052 200 mv step response: c l = 50 pf v s = +5v 30% overshoot 10000 1000 1 16 2 capacitive load pf 345 100 10 a cl ?v/v r s = 3 r s = 0 r g r f c l r s v out v in 100mv step 50 figure 12. AD8051/ad8052 capacitive load drive vs. closed-loop gain v s = +5v 30% overshoot r g r f c l r s v out v in 100mv step 50 r s = 10 r s = 0 a cl ?v/v 1000 100 10 16 2 345 capacitive load ?pf figure 13. ad8054 capacitive load drive vs. closed-loop gain circuit description the AD8051/ad8052/ad8054 is fabricated on the analog de vices proprietary extra-fast complementary bipolar (xfcb) pro cess, which enables the construction of pnp and npn transistors with similar f t s in the 2 ghz C 4 ghz region. the process is dielectrically isolated to eliminate the parasitic and latch-up
rev. c AD8051/ad8052/ad8054 ?7 problems caused by junction isolation. these features allow the construction of high frequency, low distortion amplifiers with low supply currents. this design uses a differential output input stage to maximize bandwidth and headroom (see figure 14). the smaller signal swings required on the first stage outputs (nodes sip, sin) reduce the effect of nonlinear currents due to junction capacitances and improve the distortion performance. with this design harmonic, distortion of C 80 dbc @ 1 mhz into 100 ? with v out = 2 v p-p (gain = +1) on a single 5 v sup ply is achieved. the inputs of the device can handle voltages from C 0.2 v below the negative rail to within 1 v of the positive rail. exceeding these values will not cause phase reversal; however, the input esd devices will begin to conduct if the input voltages exceed the rails by greater than 0.5 v. during this overdrive condition, the output stays at the rail. the rail-to-rail output range of the AD8051/ad8052/ad8054 is provided by a complementary common-emitter output stage. high output drive capability is provided by injecting all output stage predriver currents directly into the bases of the output devices q8 and q36. biasing of q8 and q36 is accomplished by i8 and i5, along with a common-mode feedback loop (not shown). this circuit topology allows the AD8051/ad8052 to drive 45 ma of output current and allows the ad8054 to drive 30 ma of output current with the outputs within 0.5 v of the supply rails. i10 r39 v ee i2 i3 q25 q51 r23 r27 i9 q36 i5 v ee c3 v out c9 i8 v cc i11 i7 r3 r21 r5 q3 sip sin c7 v ee v in n v in p q4 r15 r2 v cc r26 q50 q22 q21 q27 q7 q8 q23 q31 q39 q13 q1 q24 q47 q11 q2 q5 q40 figure 14. AD8051/ad8052 simplified schematic applications layout considerations the specified high speed performance of the AD8051/ad8052/ ad8054 requires careful attention to board layout and compo- nent selection. proper rf design techniques and low parasitic component selection are necessary. the pcb should have a ground plane covering all unused por tions of the component side of the board to provide a low impedance path. the ground plane should be removed from the area near the input pins to reduce the parasitic capacitance. chip capacitors should be used for the supply bypassing. one end should be connected to the ground plane and the other within 3 mm of each power pin. an additional large (4.7 f to 10 f) tantalum electrolytic capacitor should be connected in parallel, but not necessarily so close to supply current for fast, large signal changes at the output. the feedback resistor should be located close to the inverting input pin to keep the parasitic capacitance at this node to a minimum. parasitic capacitance of less than 1 pf at the in- verting input can significantly affect high speed performance. stripline design techniques should be used for long signal traces (greater than about 25 mm). these should be designed with a characteristic impedance of 50 ? or 75 ? and be properly termi nated at each end. active filters active filters at higher frequencies require wider bandwidth op amps to work effectively. excessive phase shift produced by lower frequency op amps can significantly impact active filter performance. figure 15 shows an example of a 2 mhz biquad bandwidth filter that uses three op amps of an ad8054. such circuits are sometimes used in medical ultrasound systems to lower the noise bandwidth of the analog signal before a/d conversion. please note that the unused amplifiers inputs should be tied to ground. 12 13 14 2 1 r1 3k v in r2 2k c1 50pf r3 2k 6 5 7 r6 1k r5 2k 9 10 8 ad8054 ad8054 c2 50pf v out r4 2k 3 ad8054 figure 15. 2 mhz biquad band-pass filter using ad8054 the frequency response of the circuit is shown in figure 16. frequency ?hz 10k 100m 100k 1m 10m 0 10 20 30 40 gain ?db figure 16. frequency response of 2 mhz band- pass biquad filter a/d and d/a applications figure 17 is a schematic showing the AD8051 used as a driver for an ad9201, a 10-bit 20 msps dual a/d converter. this converter is designed to convert i and q signals in communica tion systems. in th is application, only the i channel is bei ng driven. the i channel is enabled by applying a logic high to select, pin 13. the AD8051 is running from a dual supply and is configured for a gain of +2. the input signal is terminated in 50 ? and
rev. c ?8 AD8051/ad8052/ad8054 AD8051 +5v 0.1 f 10 f 10 f 0.1 f vref avdd select ina-i v dd 10pf clk sleep d9 d1 d2 d3 d4 d5 d6 d7 d0 dvdd avss refsense ad9201 dvss chip?elect inb-i reft-i refb-i refb-q reft-q inb-q ina-q d8 5v data out 0.1 f 22 10pf 22 10 f 0.1 f 5v 0.1 f 10 f 0.1 f 22 22 5v 22 1k 50 1k 10pf 10pf 0.1 f 10 f 0.1 f 0.1 f 10 f 0.1 f 1k 0.1 f 10 f 0.01 f 0.33 f figure 17. AD8051 driving an ad9201, a 10-bit 20 msps a/d converter output is 2 v p-p, which is the maximum input range of the ad9201. the 22 ? series resistor limits the maximum current that flows and helps to lower the distortion of the a/d. the ad9201 has differential inputs for each channel. these are designated the a and b inputs. the b inputs of each channel are connected to vref (pin 22), which supplies a positive refer ence of 2.5 v. each of the b inputs has a small low-pass filter that also helps to reduce distortion. the output of the op amp is ac-coupled into ina-i (pin 16) via two parallel capacitors to provide good high frequency and low frequency coupling. the 1 k ? resistor references the signal to vref that is applied to inb-i. thus, ina-i swings both positive and negative with respect to the bias voltage applied to inb-i. part# 0 fclk fund vin thd snr sinad enob sfdr 2nd 3rd 4th 5th 6th 7th 8th 9th fftsize 8192 20.0e 6 998.5e 3 0.51db 68.13 54.97 54.76 8.80 71.66 74.53 76.06 76.35 79.05 80.36 75.08 88.12 77.87 10.0 5.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 35.0 40.0 45.0 50.0 55.0 60.0 65.0 70.0 75.0 80.0 85.0 90.0 95.0 100.0 105.0 110.0 115.0 120.0 0.0e 0 1.0e 6 2.0e 6 3.0e 6 4.0e 6 5.0e 6 6.0e 6 7.0e 6 8.0e 6 9.0e 6 10.0e 6 2nd 3rd 4th 5th 6th 7th 8th 9th fund figure 18. fft plot for AD8051 driving the ad9201 at 1 mhz with the sampling clock running at 20 msps, the a/d output was analyzed with a digital analyzer. two input frequencies were used, 1 mhz and 9.5 mhz, which is just short of the nyquist frequency. these signals were well filtered to minimize any harmonics. figure 18 shows the fft response of the a/d for the case of 1 mhz analog input. the sfdr is C 71.66 db and the a/d is producing 8.8 enob (effective number of bits). when the analog frequency was raised to 9.5 mhz, the sfdr was reduced to C 60.18 db and the a/d operated with 8.46 enobs as shown in figure 19. the inclusion of the AD8051 in the circuit did not worsen the distortion performance of the ad9201. 10.0 5.0 0.0 5.0 10.0 15.0 20.0 25.0 30.0 35.0 40.0 45.0 50.0 55.0 60.0 65.0 70.0 75.0 80.0 85.0 90.0 95.0 100.0 105.0 110.0 115.0 120.0 0.0e 0 1.0e 6 2.0e 6 3.0e 6 4.0e 6 5.0e 6 6.0e 6 7.0e 6 8.0e 6 9.0e 6 10.0e 6 part# 0 fclk fund vin thd snr sinad enob sfdr 2nd 3rd 4th 5th 6th 7th 8th 9th fftsize 8192 20.0e 6 9.5e 6 0.44db 57.08 54.65 52.69 8.46 60.18 60.18 60.23 82.01 78.83 81.28 77.28 84.54 92.78 fund 3rd 4th 6th 7th 8th 2nd figure 19. fft plot for AD8051 driving the ad9201 at 9.5 mhz
rev. c AD8051/ad8052/ad8054 ?9 sync stripper synchronizing pulses are sometimes carried on video signals so as not to require a separate channel to carry the synchronizing information. however, for some functions, such as a/d conver sion, it is not desirable to have the sync pulses on the video signal. these pulses reduce the dynamic range of the video signal and do not provide any useful information for such a func tion. a sync stripper removes the synchronizing pulses from a video signal while passing all the useful video information. figure 20 shows a practical single-supply circuit that uses only a single AD8051. it is capable of directly driving a reverse terminated video line. AD8051 0.1 f 10 f + r1 1k r2 1k 100 to a/d +0.8v (or 2 v blank ) v in +3v or +5v v blank ground +0.4v video with sync ground video without sync figure 20. sync stripper the video signal plus sync is applied to the noninverting input with the proper termination. the amplifier gain is set equal to 2 via the two 1 k ? resistors in the feedback circuit. a bias voltage must be applied to r1 so that the input signal has the sync pulses stripped at the proper level. the blanking level of the input video pulse is the desired place to remove the sync information. this level is multiplied by two by the amplifier. this level must be at ground at the output for the sync stripping action to take place. since the gain of the amplifier from the input of r1 to the output is C 1, a voltage equal to 2 v blank must be applied to make the blanking level come out at ground. single-supply composite video line driver many composite video signals have their blanking level at ground and have video information that is both positive and negative. such signals require dual-supply amplifiers to pass them. how ever by ac level shifting, a single-supply amplifier can be used to pass these signals. the following complications may arise from such techniques. signals of bounded peak-to-peak amplitude that vary in duty cycle require larger dynamic swing capacity than their (bounded) peak-to-peak amplitude after they are ac-coupled. as a worst case, the dynamic signal swing will approach twice the peak-to- peak value. the two conditions that define the maximum dynamic swing requirements are a signal that is mostly low but goes high with a duty cycle that is a small fraction of a percent. the opposite condition defines the other extreme. the worst case of composite video is not quite this demanding. one bounding condition is a signal that is mostly black for an entire frame but has a white (full amplitude) minimum width spike at least once in a frame. the other extreme is for a full white video signal. the blanking intervals and sync tips of such a signal have negative-going excursions in compliance with the composite video specifica tions. the combination of horizontal and vertical blanking intervals limit such a signal to being at the highest (white) level for a maximum of about 75% of the time. as a result of the duty cycles between the two extremes pre sented above, a 1 v p-p composite video signal that is multiplied by a gain of +2 requires about 3.2 v p-p of dynamic voltage swing at the output for an op amp to pass a composite video signal of arbitrary varying duty cycle without distortion. some circuits use a sync tip clamp to hold the sync tips at a rela tively constant level to lower the amount of dynamic signal swing required. however, these circuits can have artifacts such as sync tip compression unless they are driven by a source with a very low output impedance. the AD8051/ad8052/ ad8054 have adequate signal swing when running on a single 5 v supply to handle an ac-coupled composite video signal. the input to the circuit in figure 21 is a standard composite (1 v p-p) video signal that has the blanking level at ground. the input network level shifts the video signal by means of ac-cou pling. the noninverting input of the op amp is biased to half of the supply voltage. the feedback circuit provides unity gain for the dc-biasing of the input and provides a gain of 2 for any signals that are in the video bandwidth. the output is ac-coupled and terminated to drive the line. the capacitor values were selected for providing minimum tilt or field time distortion of the video signal. these values would be required for video that is considered to be studio or broad cast quality. however, if a lower consumer grade of video, sometimes referred to as consumer video , is all that is desired, the values and the cost of the capacitors can be reduced by as much as a factor of five with minimum visible degradation in the picture. AD8051 r g 1k r f 1k +5v in + 10 f 4.99k 220 f + 1000 f 0.1 f r bt 75 10k + 47 f 4.99k r t 75 r l 75 v out composite video 0.1 f 10 f + figure 21. single-supply composite video line driver
rev. c ?0 AD8051/ad8052/ad8054 8-lead standard small outline package [soic] narrow body (rn-8) dimensions shown in millimeters and (inches) 0.25 (0.0098) 0.19 (0.0075) 1.27 (0.0500) 0.41 (0.0160) 0.50 (0.0196) 0.25 (0.0099) 45 8 0 1.75 (0.0688) 1.35 (0.0532) seating plane 0.25 (0.0098) 0.10 (0.0040) 85 4 1 5.00 (0.1968) 4.80 (0.1890) 4.00 (0.1574) 3.80 (0.1497) 1.27 (0.0500) bsc 6.20 (0.2440) 5.80 (0.2284) 0.51 (0.0201) 0.33 (0.0130) coplanarity 0.10 controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design compliant to jedec standards ms-012aa outline dimensions 8-lead msop package [msop] (rm-8) dimensions shown in millimeters 0.23 0.08 0.80 0.40 8 0 85 4 1 4.90 bsc pin 1 0.65 bsc 3.00 bsc seating plane 0.15 0.00 0.38 0.22 1.10 max 3.00 bsc compliant to jedec standards mo-187aa coplanarity 0.10 5-lead plastic surface-mount package [sot-23] (rt-5) dimensions shown in millimeters pin 1 1.60 bsc 2.80 bsc 1.90 bsc 0.95 bsc 1 3 4 5 2 0.22 0.08 0.60 0.45 0.30 10 0 0.50 0.30 0.15 max seating plane 1.45 max 1.30 1.15 0.90 compliant to jedec standards mo-178aa 2.90 bsc 14-lead standard small outline package [soic] narrow body (rn-14) dimensions shown in millimeters and (inches) controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design coplanarity 0.10 14 8 7 1 6.20 (0.2441) 5.80 (0.2283) 4.00 (0.1575) 3.80 (0.1496) 8.75 (0.3445) 8.55 (0.3366) 1.27 (0.0500) bsc seating plane 0.25 (0.0098) 0.10 (0.0039) 0.51 (0.0201) 0.33 (0.0130) 1.75 (0.0689) 1.35 (0.0531) 8 0 0.50 (0.0197) 0.25 (0.0098) 45 1.27 (0.0500) 0.40 (0.0157) 0.25 (0.0098) 0.19 (0.0075) compliant to jedec standards ms-012ab
rev. c AD8051/ad8052/ad8054 ?1 14-lead thin shrink small outline package [tssop] (ru-14) dimensions shown in millimeters 4.50 4.40 4.30 14 8 7 1 6.40 bsc pin 1 5.10 5.00 4.90 0.65 bsc seating plane 0.15 0.05 0.30 0.19 1.20 max 1.05 1.00 0.80 0.20 0.09 8 0 0.75 0.60 0.45 compliant to jedec standards mo-153ab-1 coplanarity 0.10 outline dimensions
rev. c ?2 AD8051/ad8052/ad8054 revision history location page 1/03?ata sheet changed from rev. b to rev. c. update to general description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 update to pin connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 update to specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 update to absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 update to figure 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 update to ordering guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 update to outline dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
?3
c01062??/03(c) printed in u.s.a. ?4

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