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| s-8261 series www.sii-ic.com battery protection ic for 1-cell pack ? seiko instruments inc., 2001-2010 rev.5.0 _00 seiko instruments inc. 1 the s-8261 series are lithium-ion / lithium polymer rechargeable battery protection ics incorporating high-accuracy voltage detection circuit and delay circuit. the s-8261 series are suitable for protection of single-cell lithium ion/lithium polymer battery packs from overcharge, overdischarge and overcurrent. ? features (1) internal high accuracy voltage detection circuit ? overcharge detection voltage 3.9 v to 4.4 v (applicable in 5 mv step) accuracy: 25 mv (+ 25 c) and 30 mv ( ? 5 c to + 55 c) ? overcharge hysteresis voltage 0.1 v to 0.4 v *1 accuracy: 25 mv the overcharge hysteresis volt age can be selected from the range 0. 1 v to 0.4 v in 50 mv step. ? overdischarge detection voltage 2.0 v to 3.0 v (applicable in 10 mv step) accuracy: 50 mv ? overdischarge hysteresis voltage 0.0 v to 0.7 v *2 accuracy: 50 mv the overdischarge hysteresis voltage can be selected from the range 0.0 v to 0.7 v in 100 mv step. ? overcurrent 1 detection voltage 0.05 v to 0.3 v (applicable in 10 mv step) accuracy: 15 mv ? overcurrent 2 detection voltage 0.5 v (fixed) accuracy: 100 mv (2) high voltage device is used for charger connection pins (vm and co pins: absolute maximum rating = 28 v). (3) delay times (overcharge: t cu , overdischarge: t dl , overcurrent 1: t lov1 , overcurrent 2: t lov2 ) are generated by an internal circuit. no external capacitor is necessary. accuracy: 20% (4) three-step overcurrent detection circuit is included (ove rcurrent 1, overcurrent 2 and load short-circuiting). (5) 0 v battery charge function ?available? / ?unavailable? are selectable. (6) power-down function ?yes? / ?no? are selectable. (7) charger detection function and abnorma l charge current detection function ? the overdischarge hysteresis is released by detecting negative voltage at the vm pin ( ? 0.7 v typ.) (charger detection function). ? when the output voltage of the do pin is high and the voltage at the vm pin is equal to or lower than the charger detection voltage ( ? 0.7 v typ.), the output voltage of the co pin goes lo w (abnormal charge current detection function). (8) low current consumption ? operation mode 3.5 a typ., 7.0 a max. ? power-down mode 0.1 a max. (9) wide operating temperature range ? 40 c to + 85 c (10) lead-free, sn 100%, halogen-free *3 *1. overcharge release voltage = overcharge detection voltage ? overcharge hysteresis voltage (where overcharge release voltage < 3.8 v is prohibited.) *2. overdischarge release voltage = overdischarge detection voltage + overdischarge hysteresis voltage (where overdischarge release voltage > 3.4 v is prohibited.) *3. refer to ? ? product name structure ? for details. ? applications ? lithium-ion rechargeable battery packs ? lithium polymer rechargeable battery packs ? package ? sot-23-6
low dropout cmos voltage regulator s-8261 series rev.5.0 _00 seiko instruments inc. 2 ? block diagram ? + ? + vm vss vdd co do ? + ? + ? + r vmd r vms load short-circuiting detection comparator overcurrent 2 detection comparator overcurrent 1 detection comparator charger detection circuit 0 v battery charge circuit or 0 v battery charge inhibition circuit divider control circuit output control circuit oscillator control circuit overdischarge detection comparator overcharge detection comparator dp remark all the diodes shown in the figure are parasitic diodes. figure 1 low dropout cmos voltage regulator rev.5.0 _00 s-8261 series seiko instruments inc. 3 ? product name structure 1. product name s-8261a xx md - xxx t2 x environmental code u : lead-free (sn 100%), halogen-free g : lead-free (for details, please contact our sales office) ic direction in tape specifications *1 t2: sot-23-6 product name (abbreviation) *2 package name (abbreviation) md: sot-23-6 serial code assigned from aa to zz in alphabetical order *1. refer to the tape specifications. *2. refer to the ? 3. product name list ?. 2. package drawing code package name package tape reel sot-23-6 mp006-a-p-sd mp006-a-c-sd mp006-a-r-sd low dropout cmos voltage regulator s-8261 series rev.5.0 _00 seiko instruments inc. 4 3. product name list table 1 model no. overcharge detection voltage [v cu ] overcharge hysteresis voltage [v hc ] overdischarge detection voltage [v dl ] overdischarge hysteresis voltage [v hd ] overcurrent 1 detection voltage [v iov1 ] 0 v battery charge function delay time combi- nation *1 power down function s-8261aagmd-g2gt2x 4.280 v 0.20 v 2.30 v 0 v 0.16 v available (1) yes s-8261aahmd-g2ht2x 4.280 v 0.20 v 2.30 v 0 v 0.08 v available (1) yes s-8261aajmd-g2jt2x 4.325 v 0.25 v 2.50 v 0.4 v 0.15 v unavailable (1) yes s-8261aalmd-g2lt2x 4.300 v 0.10 v 2.30 v 0 v 0.08 v unavailable (1) yes s-8261aammd-g2mt2x 4.300 v 0.10 v 2.30 v 0 v 0.20 v unavailable (1) yes s-8261aanmd-g2nt2x 4.275 v 0.10 v 2. 30 v 0.1 v 0.10 v available (1) yes s-8261aaomd-g2ot2x 4.280 v 0.20 v 2.30 v 0 v 0.13 v unavailable (1) yes s-8261aapmd-g2pt2x 4.325 v 0.25 v 2.50 v 0.4 v 0.10 v unavailable (1) yes s-8261aarmd-g2rt2x 4.280 v 0.20 v 2.30 v 0 v 0.10 v available (1) yes s-8261aasmd-g2st2x 4.280 v 0.20 v 2.30 v 0 v 0.15 v unavailable (2) yes s-8261aatmd-g2tt2x 4.300 v 0.10 v 2.30 v 0 v 0.08 v available (3) yes s-8261aaumd-g2ut2x 4.275 v 0.10 v 2. 30 v 0.1 v 0.10 v available (4) yes s-8261aaxmd-g2xt2x 4.350 v 0.10 v 2. 30 v 0.1 v 0.10 v available (4) yes s-8261aazmd-g2zt2x 4.280 v 0.25 v 2.50 v 0.4 v 0.10 v unavailable (1) yes s-8261abamd-g3at2x 4.350 v 0.20 v 2.50 v 0 v 0.20 v available (4) yes s-8261abbmd-g3bt2x 4.275 v 0.20 v 2.30 v 0 v 0.13 v available (1) yes s-8261abcmd-g3ct2x 4.300 v 0.20 v 2.30 v 0 v 0.13 v available (1) yes s-8261abimd-g3it2x 4.275 v 0.20 v 2.30 v 0 v 0.20 v unavailable (5) yes s-8261abjmd-g3jt2x 4.280 v 0.20 v 3.00 v 0 v 0.08 v available (1) yes s-8261abkmd-g3kt2x 4.100 v 0.25 v 2.50 v 0.4 v 0.15 v unavailable (1) yes s-8261ablmd-g3lt2x 4.275 v 0.20 v 2.30 v 0 v 0.05 v unavailable (5) yes s-8261abmmd-g3mt2x 4.280 v 0.20 v 2.80 v 0 v 0.10 v available (1) yes s-8261abnmd-g3nt2x 4.300 v 0.20 v 2.30 v 0 v 0.06 v available (1) yes s-8261abpmd-g3pt2x 4.200 v 0.10 v 2. 80 v 0.1 v 0.15 v unavailable (1) yes s-8261abrmd-g3rt2x 4.275 v 0.20 v 2.50 v 0.4 v 0.15 v unavailable (1) yes s-8261absmd-g3st2x 4.280 v 0.10 v 2.50 v 0.5 v 0.18 v unavailable (1) yes s-8261abtmd-g3tt2x 4.280 v 0.20 v 3.00 v 0.4 v 0.08 v available (5) yes s-8261abymd-g3yt2x 4.275 v 0.10 v 2.30 v 0.1 v 0.10 v available (6) yes s-8261abzmd-g3zt2x 4.325 v 0.25 v 2.50 v 0.4 v 0.15 v unavailable (6) yes s-8261acamd-g4at2x 4.280 v 0.20 v 2.30 v 0 v 0.13 v unavailable (6) yes s-8261acbmd-g4bt2x 4.250 v 0.20 v 2.60 v 0.3 v 0.12 v unavailable (1) no s-8261acdmd-g4dt2x 4.350 v 0.25 v 2.30 v 0.7 v 0.25 v available (7) yes s-8261acemd-g4et2x 3.900 v 0.10 v 2.00 v 0.3 v 0.10 v available (1) yes s-8261acfmd-g4ft2x 4.280 v 0.20 v 2.30 v 0 v 0.10 v available (8) yes s-8261achmd-g4ht2x 4.465 v 0.30 v 2.10 v 0 v 0.15 v available (9) yes s-8261acimd-g4it2x 4.250 v 0.20 v 2.40 v 0.5 v 0.10 v available (1) no s-8261acjmd-g4jt2x 4.275 v 0.10 v 2.30 v 0.1 v 0.15 v available (1) yes s-8261ackmd-g4kt2x 4.280 v 0.20 v 2. 80 v 0 v 0.13 v available (1) yes s-8261acmmd-g4mt2x 4.325 v 0.20 v 3.00 v 0.4 v 0.06 v unavailable (1) yes s-8261acnmd-g4nt2x 4.215 v 0.10 v 2.30 v 0.1 v 0.13 v unavailable (1) yes *1. refer to the table 2 about the details of the delay ti me combinations (1) to (9). remark 1. please contact our sales office for the products with de tection voltage value other th an those specified above. 2. x: g or u 3. please select products of environmental code = u for sn 100%, halogen-free products. low dropout cmos voltage regulator rev.5.0 _00 s-8261 series seiko instruments inc. 5 table 2 delay time combination overcharge detection delay time [t cu ] overdischarge detection delay time [t dl ] overcurrent 1 detection delay time [t lov1 ] overcurrent 2 detection delay time [t lov2 ] load short-circuiting detection delay time [t short ] (1) 1.2 s 144 ms 9 ms 2.24 ms 320 s (2) 1.2 s 144 ms 4.5 ms 2.24 ms 320 s (3) 4.6 s 36 ms 18 ms 9 ms 320 s (4) 4.6 s 144 ms 9 ms 2.24 ms 320 s (5) 1.2 s 36 ms 9 ms 2.24 ms 320 s (6) 1.2 s 144 ms 9 ms 1.12 ms 320 s (7) 1.2 s 290 ms 18 ms 2.24 ms 320 s (8) 1.2 s 144 ms 18 ms 2.24 ms 320 s (9) 0.3 s 36 ms 9 ms 1.12 ms 320 s remark the delay times can be changed within the range listed table 3 . for details, please c ontact our sales office. table 3 delay time symbol selection range remarks overcharge detection delay time t cu 0.15 s 1.2 s 4.6 s choose from the left. overdischarge detection delay time t dl 36 ms 144 ms 290 ms choose from the left. overcurrent 1 detection delay time t lov1 4.5 ms 9 ms 18 ms choose from the left. overcurrent 2 detection delay time t lov1 1.12 ms 2.24 ms ? choose from the left. load short-circuiting detection delay time t short ? 320 s 600 s choose from the left. remark the value surrounded by bold lines is the delay time of the standard products. low dropout cmos voltage regulator s-8261 series rev.5.0 _00 seiko instruments inc. 6 ? pin configuration table 4 pin no. symbol description 1 do fet gate control pin for discharge (cmos output) 2 vm voltage detection pin between vm and vss (overcurrent detection pin) 3 co fet gate control pin for charge (cmos output) 4 dp test pin for delay time measurement 5 vdd positive power input pin 6 vss negative power input pin sot-23-6 top view 6 4 5 1 2 3 figure 2 low dropout cmos voltage regulator rev.5.0 _00 s-8261 series seiko instruments inc. 7 ? absolute maximum ratings table 5 (ta = 25 c unless otherwise specified) item symbol applied pin absolute maximum ratings unit input voltage between vdd and vss v ds vdd v ss ? 0.3 to v ss + 12 v input pin voltage for vm v vm vm v dd ? 28 to v dd + 0.3 v output pin voltage for co v co co v vm ? 0.3 to v dd + 0.3 v output pin voltage for do v do do v ss ? 0.3 to v dd + 0.3 v 250 (when not mounted on board) mw power dissipation p d ? 650 *1 mw operating ambient temperature t opr ? ? 40 to + 85 c storage temperature t stg ? ? 55 to + 125 c *1. when mounted on board [mounted board] (1) board size : 114.3 mm 76.2 mm t1.6 mm (2) board name : jedec standard51-7 caution the absolute maximum ratings are rated values exceeding which the product could suffer physical damage. these values must therefore not be exceeded under any conditions. (1) when mounted on board (2) when not mounted on board 600 400 0 200 0 50 100 150 500 300 100 700 power dissipation (p d ) [mw] ambient temperature (ta) [ c] 600 400 0 power dissipation (p d ) [mw] 200 0 50 100 150 ambient temperature (ta) [ c] 500 300 100 figure 3 power dissipation of package low dropout cmos voltage regulator s-8261 series rev.5.0 _00 seiko instruments inc. 8 ? electrical characteristics 1. except detection delay time (25 c) table 6 (ta = 25 c unless otherwise specified) item symbol condition min. typ. max. unit test condition test circuit detection voltage ? v cu ? 0.025 v cu v cu + 0.025 v 1 1 overcharge detection voltage v cu = 3.9 v to 4.4 v, 5 mv step v cu ta = ? 5 c to 55 c *1 v cu ? 0.030 v cu v cu + 0.030 v 1 1 overcharge hysteresis voltage v hc = 0.1 v to 0.4 v, 50 mv step v hc ? v hc ? 0.025 v hc v hc + 0.025 v 1 1 overdischarge detection voltage v dl = 2.0 v to 3.0 v, 10 mv step v dl ? v dl ? 0.050 v dl v dl + 0.050 v 2 2 overdischarge hysteresis voltage v hd = 0.0 v to 0.7 v, 100 mv step v hd ? v hd ? 0.050 v hd v hd + 0.050 v 2 2 overcurrent 1 detection voltage v iov1 = 0.05 v to 0.3 v, 10 mv step v iov1 ? v iov1 ? 0.015 v iov1 v iov1 + 0.015 v 3 2 overcurrent 2 detection voltage v iov2 ? 0.4 0.5 0.6 v 3 2 load short-circuiting detection voltage v short ? 0.9 1.2 1.5 v 3 2 charger detection voltage v cha ? ? 1.0 ? 0.7 ? 0.4 v 4 2 input voltage, operation voltage operation voltage between vdd and vss v dsop1 internal circuit operating voltage 1.5 ? 8 v ? ? operation voltage between vdd and vm v dsop2 internal circuit operating voltage 1.5 ? 28 v ? ? current consumption (with power-down function) current consumption in normal operation i ope v dd = 3.5 v, v vm = 0 v 1.0 3.5 7.0 a 5 2 current consumption at power down i pdn v dd = v vm = 1.5 v ? ? 0.1 a 5 2 current consumption (without power-down function) current consumption in normal operation i ope v dd = 3.5 v, v vm = 0 v 1.0 3.5 7.0 a 5 2 overdischarge current consumption i oped v dd = v vm = 1.5 v 1.0 3.0 5.5 a 5 2 output resistance co pin resistance ?h? r coh v co = 3.0 v, v dd = 3.5 v, v vm = 0 v 2.5 5 10 k 7 4 co pin resistance ?l? r col v co = 0.5 v, v dd = 4.5 v, v vm = 0 v 2.5 5 10 k 7 4 do pin resistance ?h? r doh v do = 3.0 v, v dd = 3.5 v, v vm = 0 v 2.5 5 10 k 8 4 do pin resistance ?l? r dol v do = 0.5 v, v dd = v vm = 1.8 v 2.5 5 10 k 8 4 vm internal resistance internal resistance between vm and vdd r vmd v dd = 1.8 v, v vm = 0 v 100 300 900 k 6 3 internal resistance between vm and vss r vms v dd = 3.5 v, v vm = 1.0 v 10 20 40 k 6 3 0 v battery charging function 0 v battery charge starting charger voltage v 0cha 0 v battery charging available 1.2 ? ? v 11 2 0 v battery charge inhibition battery voltage v 0inh 0 v battery charging unavailable ? ? 0.5 v 12 2 *1. since products are not screened at high and low temperat ures, the specification for this temperature range is guaranteed by design, not tested in production. low dropout cmos voltage regulator rev.5.0 _00 s-8261 series seiko instruments inc. 9 2. except detection delay time ( ? 40 c to + 85 c *1 ) table 7 (ta = ? 40 c to + 85 c *1 unless otherwise specified) item symbol condition min. typ. max. unit test condition test circuit detection voltage overcharge detection voltage v cu = 3.9 v to 4.4 v, 5 mv step v cu ? v cu ? 0.055 v cu v cu + 0.040 v 1 1 overcharge hysteresis voltage v hc = 0.1 v to 0.4 v, 50 mv step v hc ? v hc ? 0.025 v hc v hc + 0.025 v 1 1 overdischarge detection voltage v dl = 2.0 v to 3.0 v, 10 mv step v dl ? v dl ? 0.080 v dl v dl + 0.080 v 2 2 overdischarge hysteresis voltage v hd = 0.0 v to 0.7 v, 100 mv step v hd ? v hd ? 0.050 v hd v hd + 0.050 v 2 2 overcurrent 1 detection voltage v iov1 = 0.05 v to 0.3 v, 10 mv step v iov1 ? v iov1 ? 0.021 v iov1 v iov1 + 0.021 v 3 2 overcurrent 2 detection voltage v iov2 ? 0.37 0.5 0.63 v 3 2 load short-circuiting detection voltage v short ? 0.7 1.2 1.7 v 3 2 charger detection voltage v cha ? ? 1.2 ? 0.7 ? 0.2 v 4 2 input voltage, operation voltage operation voltage between vdd and vss v dsop1 internal circuit operating voltage 1.5 ? 8 v ? ? operation voltage between vdd and vm v dsop2 internal circuit operating voltage 1.5 ? 28 v ? ? current consumption (with power-down function) current consumption in normal operation i ope v dd = 3.5 v, v vm = 0 v 0.7 3.5 8.0 a 5 2 current consumption at power down i pdn v dd = v vm = 1.5 v ? ? 0.1 a 5 2 current consumption (without power-down function) current consumption in normal operation i ope v dd = 3.5 v, v vm = 0 v 0.7 3.5 8.0 a 5 2 overdischarge current consumption i oped v dd = v vm = 1.5 v 0.7 3.0 6.0 a 5 2 output resistance co pin resistance ?h? r coh v co = 3.0 v, v dd = 3.5 v, v vm = 0 v 1.2 5 15 k 7 4 co pin resistance ?l? r col v co = 0.5 v, v dd = 4.5 v, v vm = 0 v 1.2 5 15 k 7 4 do pin resistance ?h? r doh v do = 3.0 v, v dd = 3.5 v, v vm = 0 v 1.2 5 15 k 8 4 do pin resistance ?l? r dol v do = 0.5 v, v dd = v vm = 1.8 v 1.2 5 15 k 8 4 vm internal resistance internal resistance between vm and vdd r vmd v dd = 1.8 v, v vm = 0 v 78 300 1310 k 6 3 internal resistance between vm and vss r vms v dd = 3.5 v, v vm = 1.0 v 7.2 20 44 k 6 3 0 v battery charging function 0 v battery charge starting charger voltage v 0cha 0 v battery charging available 1.7 ? ? v 11 2 0 v battery charge inhibition battery voltage v 0inh 0 v battery charging unavailable ? ? 0.3 v 12 2 *1. since products are not screened at high and low temperat ures, the specification for this temperature range is guaranteed by design, not tested in production. low dropout cmos voltage regulator s-8261 series rev.5.0 _00 seiko instruments inc. 10 3. detection delay time (1) s-8261aag, s-8261aah, s-8261aaj, s-8261aal, s-8261aam, s-8261aan, s-8261aao, s-8261aap, s-8261aar, s-8261aaz, s-8261abb, s-8261abc, s-8261abj, s-8261abk, s-8261abm, s-8261abn, s-8261abp, s-8261abr, s-8261abs, s-8261acb, s-8261ace, s-8261aci, s-8261ack, s-8261acm, s-8261acj, s-8261acn table 8 item symbol condition min. typ. max. unit test condition test circuit delay time (ta = 25c) overcharge detection delay time t cu ? 0.96 1.2 1.4 s 9 5 overdischarge detection delay time t dl ? 115 144 173 ms 9 5 overcurrent 1 detection delay time t lov1 ? 7.2 9 11 ms 10 5 overcurrent 2 detection delay time t lov2 ? 1.8 2.24 2.7 ms 10 5 load short-circuiting detection delay time t short ? 220 320 380 s 10 5 delay time (ta = ? 40c to + 85c) *1 overcharge detection delay time t cu ? 0.7 1.2 2.0 s 9 5 overdischarge detection delay time t dl ? 80 144 245 ms 9 5 overcurrent 1 detection delay time t lov1 ? 5 9 15 ms 10 5 overcurrent 2 detection delay time t lov2 ? 1.2 2.24 3.8 ms 10 5 load short-circuiting detection delay time t short ? 150 320 540 s 10 5 *1. since products are not screened at high and low temperatures, the specification for this temperature range is guaranteed by de sign, not tested in production. (2) s-8261aas table 9 item symbol condition min. typ. max. unit test condition test circuit delay time (ta = 25c) overcharge detection delay time t cu ? 0.96 1.2 1.4 s 9 5 overdischarge detection delay time t dl ? 115 144 173 ms 9 5 overcurrent 1 detection delay time t lov1 ? 3.6 4.5 5.4 ms 10 5 overcurrent 2 detection delay time t lov2 ? 1.8 2.24 2.7 ms 10 5 load short-circuiting detection delay time t short ? 220 320 380 s 10 5 delay time (ta = ? 40c to + 85c) *1 overcharge detection delay time t cu ? 0.7 1.2 2.0 s 9 5 overdischarge detection delay time t dl ? 80 144 245 ms 9 5 overcurrent 1 detection delay time t lov1 ? 2.5 4.5 7.7 ms 10 5 overcurrent 2 detection delay time t lov2 ? 1.2 2.24 3.8 ms 10 5 load short-circuiting detection delay time t short ? 150 320 540 s 10 5 *1. since products are not screened at high and low temperatures, the specification for this temperature range is guaranteed by de sign, not tested in production. low dropout cmos voltage regulator rev.5.0 _00 s-8261 series seiko instruments inc. 11 (3) s-8261aat table 10 item symbol condition min. typ. max. unit test condition test circuit delay time (ta = 25c) overcharge detection delay time t cu ? 3.7 4.6 5.5 s 9 5 overdischarge detection delay time t dl ? 29 36 43 ms 9 5 overcurrent 1 detection delay time t lov1 ? 14 18 22 ms 10 5 overcurrent 2 detection delay time t lov2 ? 7.2 9 11 ms 10 5 load short-circuiting detection delay time t short ? 220 320 380 s 10 5 delay time (ta = ? 40c to + 85c) *1 overcharge detection delay time t cu ? 2.5 4.6 7.8 s 9 5 overdischarge detection delay time t dl ? 20 36 61 ms 9 5 overcurrent 1 detection delay time t lov1 ? 10 18 31 ms 10 5 overcurrent 2 detection delay time t lov2 ? 5 9 15 ms 10 5 load short-circuiting detection delay time t short ? 150 320 540 s 10 5 *1. since products are not screened at high and low temperatures, the specification for this temperature range is guaranteed by de sign, not tested in production. (4) s-8261aau, s-8261aax, s-8261aba table 11 item symbol condition min. typ. max. unit test condition test circuit delay time (ta = 25c) overcharge detection delay time t cu ? 3.7 4.6 5.5 s 9 5 overdischarge detection delay time t dl ? 115 144 173 ms 9 5 overcurrent 1 detection delay time t lov1 ? 7.2 9 11 ms 10 5 overcurrent 2 detection delay time t lov2 ? 1.8 2.24 2.7 ms 10 5 load short-circuiting detection delay time t short ? 220 320 380 s 10 5 delay time (ta = ? 40c to + 85c) *1 overcharge detection delay time t cu ? 2.5 4.6 7.8 s 9 5 overdischarge detection delay time t dl ? 80 144 245 ms 9 5 overcurrent 1 detection delay time t lov1 ? 5 9 15 ms 10 5 overcurrent 2 detection delay time t lov2 ? 1.2 2.24 3.8 ms 10 5 load short-circuiting detection delay time t short ? 150 320 540 s 10 5 *1. since products are not screened at high and low temperatures, the specification for this temperature range is guaranteed by de sign, not tested in production. low dropout cmos voltage regulator s-8261 series rev.5.0 _00 seiko instruments inc. 12 (5) s-8261abi, s-8261abl, s-8261abt table 12 item symbol condition min. typ. max. unit test condition test circuit delay time (ta = 25c) overcharge detection delay time t cu ? 0.96 1.2 1.4 s 9 5 overdischarge detection delay time t dl ? 29 36 43 ms 9 5 overcurrent 1 detection delay time t lov1 ? 7.2 9 11 ms 10 5 overcurrent 2 detection delay time t lov2 ? 1.8 2.24 2.7 ms 10 5 load short-circuiting detection delay time t short ? 220 320 380 s 10 5 delay time (ta = ? 40c to + 85c) *1 overcharge detection delay time t cu ? 0.7 1.2 2.0 s 9 5 overdischarge detection delay time t dl ? 20 36 61 ms 9 5 overcurrent 1 detection delay time t lov1 ? 5 9 15 ms 10 5 overcurrent 2 detection delay time t lov2 ? 1.2 2.24 3.8 ms 10 5 load short-circuiting detection delay time t short ? 150 320 540 s 10 5 *1. since products are not screened at high and low temperatures, the specification for this temperature range is guaranteed by de sign, not tested in production. (6) s-8261aby, s-8261abz, s-8261aca table 13 item symbol condition min. typ. max. unit test condition test circuit delay time (ta = 25c) overcharge detection delay time t cu ? 0.96 1.2 1.4 s 9 5 overdischarge detection delay time t dl ? 115 144 173 ms 9 5 overcurrent 1 detection delay time t lov1 ? 7.2 9 11 ms 10 5 overcurrent 2 detection delay time t lov2 ? 0.89 1.12 1.35 ms 10 5 load short-circuiting detection delay time t short ? 220 320 380 s 10 5 delay time (ta = ? 40c to + 85c) *1 overcharge detection delay time t cu ? 0.7 1.2 2.0 s 9 5 overdischarge detection delay time t dl ? 80 144 245 ms 9 5 overcurrent 1 detection delay time t lov1 ? 5 9 15 ms 10 5 overcurrent 2 detection delay time t lov2 ? 0.61 1.12 1.91 ms 10 5 load short-circuiting detection delay time t short ? 150 320 540 s 10 5 *1. since products are not screened at high and low temperatures, the specification for this temperature range is guaranteed by de sign, not tested in production. low dropout cmos voltage regulator rev.5.0 _00 s-8261 series seiko instruments inc. 13 (7) s-8261acd table 14 item symbol condition min. typ. max. unit test condition test circuit delay time (ta = 25c) overcharge detection delay time t cu ? 0.96 1.2 1.4 s 9 5 overdischarge detection delay time t dl ? 232 290 348 ms 9 5 overcurrent 1 detection delay time t lov1 ? 14 18 22 ms 10 5 overcurrent 2 detection delay time t lov2 ? 1.8 2.24 2.7 ms 10 5 load short-circuiting detection delay time t short ? 220 320 380 s 10 5 delay time (ta = ? 40c to + 85c) *1 overcharge detection delay time t cu ? 0.7 1.2 2.0 s 9 5 overdischarge detection delay time t dl ? 160 290 493 ms 9 5 overcurrent 1 detection delay time t lov1 ? 10 18 31 ms 10 5 overcurrent 2 detection delay time t lov2 ? 1.2 2.24 3.8 ms 10 5 load short-circuiting detection delay time t short ? 150 320 540 s 10 5 *1. since products are not screened at high and low temperatures, the specification for this temperature range is guaranteed by de sign, not tested in production. (8) s-8261acf table 15 item symbol condition min. typ. max. unit test condition test circuit delay time (ta = 25c) overcharge detection delay time t cu ? 0.96 1.2 1.4 s 9 5 overdischarge detection delay time t dl ? 115 144 173 ms 9 5 overcurrent 1 detection delay time t lov1 ? 14 18 22 ms 10 5 overcurrent 2 detection delay time t lov2 ? 1.8 2.24 2.7 ms 10 5 load short-circuiting detection delay time t short ? 220 320 380 s 10 5 delay time (ta = ? 40c to + 85c) *1 overcharge detection delay time t cu ? 0.7 1.2 2.0 s 9 5 overdischarge detection delay time t dl ? 80 144 245 ms 9 5 overcurrent 1 detection delay time t lov1 ? 10 18 31 ms 10 5 overcurrent 2 detection delay time t lov2 ? 1.2 2.24 3.8 ms 10 5 load short-circuiting detection delay time t short ? 150 320 540 s 10 5 *1. since products are not screened at high and low temperatures, the specification for this temperature range is guaranteed by de sign, not tested in production. low dropout cmos voltage regulator s-8261 series rev.5.0 _00 seiko instruments inc. 14 (9) s-8261ach table 16 item symbol condition min. typ. max. unit test condition test circuit delay time (ta = 25c) overcharge detection delay time t cu ? 0.24 0.3 0.36 s 9 5 overdischarge detection delay time t dl ? 29 36 43 ms 9 5 overcurrent 1 detection delay time t lov1 ? 7.2 9 11 ms 10 5 overcurrent 2 detection delay time t lov2 ? 0.89 1.12 1.35 ms 10 5 load short-circuiting detection delay time t short ? 220 320 380 s 10 5 delay time (ta = ? 40c to + 85c) *1 overcharge detection delay time t cu ? 0.17 0.3 0.51 s 9 5 overdischarge detection delay time t dl ? 20 36 61 ms 9 5 overcurrent 1 detection delay time t lov1 ? 5 9 15 ms 10 5 overcurrent 2 detection delay time t lov2 ? 0.61 1.12 1.91 ms 10 5 load short-circuiting detection delay time t short ? 150 320 540 s 10 5 *1. since products are not screened at high and low temperatures, the specification for this temperature range is guaranteed by de sign, not tested in production. low dropout cmos voltage regulator rev.5.0 _00 s-8261 series seiko instruments inc. 15 ? test circuits caution unless otherwise specified, the output voltage levels ?h? and ?l? at co pin (v co ) and do pin (v do ) are judged by the threshold voltage (1.0 v) of the n-channel fet. judge the co pin level with respect to v vm and the do pin level with respect to v ss . (1) test condition 1, test circuit 1 (overcharge detection voltage, overcharge hysteresis voltage) the overcharge detection voltage (v cu ) is defined as the voltage between vdd and vss at which v co goes from ?h? to ?l? when the voltage v1 is gradually in creased from the starting condition of v1 = 3.5 v. the overcharge hysteresis voltage (v hc ) is then defined as the difference bet ween the overcharge detection voltage (v cu ) and the voltage between vdd and vss at which v co goes from ?l? to ?h? when the voltage v1 is gradually decreased. (2) test condition 2, test circuit 2 (overdischarge detection voltage, overdischarge hysteresis voltage) the overdischarge detection voltage (v dl ) is defined as the voltage between vdd and vss at which v do goes from ?h? to ?l? when the voltage v1 is gradually decreased from the star ting condition of v1 = 3.5 v and v2 = 0 v. the overdischarge hysteresis voltage (v hd ) is then defined as the difference between the overdischarge detection voltage (v dl ) and the voltage between vdd and vss at which v do goes from ?l? to ?h? when the voltage v1 is gradually increased. (3) test condition 3, test circuit 2 (overcurrent 1 detection voltage, overcurrent 2 detection voltage, load short-circuiting detection voltage) the overcurrent 1 detection voltage (v iov1 ) is defined as the voltage between vm and vss whose delay time for changing v do from ?h? to ?l? lies between the minimum and the maximum value of the overcurrent 1 detection delay time when the voltage v2 is increased rapidly (within 10 s) from the starting condition v1 = 3.5 v and v2 = 0 v. the overcurrent 2 detection voltage (v iov2 ) is defined as the voltage between vm and vss whose delay time for changing v do from ?h? to ?l? lies between the minimum and the maximum value of the overcurrent 2 detection delay time when the voltage v2 is increased rapidly (within 10 s) from the starting condition v1 = 3.5 v and v2 = 0 v. the load short-circuiting detection voltage (v short ) is defined as the voltage between vm and vss whose delay time for changing v do from ?h? to ?l? lies between the minimum and the maximum value of the load short-circuiting detection delay time when the voltage v2 is increased rapidly (within 10 s) from the starting condition v1 = 3.5 v and v2 = 0 v. (4) test condition 4, test circuit 2 (charger detection voltage, abnormal charge current detection voltage) the charger detection voltage (v cha ) is defined as the voltage between vm and vss at which v do goes from ?l? to ?h? when the voltage v2 is gradually decreased from 0 v afte r the voltage v1 is graduall y increased from the starting condition of v1 = 1.8 v and v2 = 0 v until the voltage v1 becomes v1 = v dl + (v hd / 2). the charger detection voltage can be measured only in the product whose overdischarge hysteresis v hd 0. set v1 = 3.5 v and v2 = 0 v. decrease v2 from 0 v gradually. the voltage between vm and vss when v co goes from ?h? to ?l? is the abnormal charge current detection voltage. the abnormal charge current detection voltage has the same value as the charger detection voltage (v cha ). (5) test condition 5, test circuit 2 (normal operation current consumption, power-down current consumption, overdischarge current consumption) for products with power-down function the operating current consumption (i ope ) is the current that flows through the vdd pin (i dd ) under the set conditions of v1 = 3.5 v and v2 = 0 v (normal status). the power-down current consumption (i pdn ) is the current that flows through the vdd pin (i dd ) under the set conditions of v1 = v2 = 1.5 v (overdischarge status). for products without power-down function the operating current consumption (i ope ) is the current that flows through the vdd pin (i dd ) under the set conditions of v1 = 3.5 v and v2 = 0 v (normal status). the overdischarge current consumption (i oped ) is the current that flows through the vdd pin (i dd ) under the set conditions of v1 = v2 = 1.5 v (overdischarge status). low dropout cmos voltage regulator s-8261 series rev.5.0 _00 seiko instruments inc. 16 (6) test condition 6, test circuit 3 (internal resistance between vm and vdd, internal resistance between vm and vss) the resistance between vm and vdd (r vmd ) is the internal resistance between vm and vdd under the set conditions of v1 = 1.8 v and v2 = 0 v. the resistance between vm and vss (r vms ) is the internal resistance between vm and vss under the set conditions of v1 = 3.5 v and v2 = 1.0 v. (7) test condition 7, test circuit 4 (co pin resistance ?h?, co pin resistance ?l?) the co pin resistance ?h? (r coh ) is the resistance the co pin under the set condition of v1 = 3.5 v, v2 = 0 v and v3 = 3.0 v. the co pin resistance ?l? (r col ) is the resistance the co pin under the set condition of v1 = 4.5 v, v2 = 0 v and v3 = 0.5 v. (8) test condition 8, test circuit 4 (do pin resistance ?h?, do pin resistance ?l?) the do pin resistance ?h? (r doh ) is the resistance the do pin under the set condition of v1 = 3.5 v, v2 = 0 v and v4 = 3.0 v. the do pin resistance ?l? (r dol ) is the resistance the do pin under the set condition of v1 = 1.8 v, v2 = 0 v and v4 = 0.5 v. (9) test condition 9, test circuit 5 (overcharge detection delay time, ov erdischarge detection delay time) the overcharge detection delay time (t cu ) is the time needed for v co to change from ?h? to ?l? just after the voltage v1 momentarily increases (within 10 s) from the overcharge detection voltage (v cu ) ? 0.2 v to the overcharge detection voltage (v cu ) + 0.2 v under the set condition of v2 = 0 v. the overdischarge detection delay time (t dl ) is the time needed for v do to change from ?h? to ?l? just after the voltage v1 momentarily decreases (within 10 s) from the overdischarge detection voltage (v dl ) + 0.2 v to the overdischarge detection voltage (v dl ) ? 0.2 v under the set condition of v2 = 0 v. (10) test condition 10, test circuit 5 (overcurrent 1 detection delay time, overcurrent 2 detection delay time, load short-circuiting detection delay time, abnormal charge current detection delay time) the overcurrent 1 detection delay time (t iov1 ) is the time needed for v do to go ?l? after the voltage v2 momentarily increases (within 10 s) from 0 v to 0.35 v under the set condition of v1 = 3.5 v and v2 = 0 v. the overcurrent 2 detection delay time (t iov2 ) is the time needed for v do to go ?l? after the voltage v2 momentarily increases (within 10 s) from 0 v to 0.7 v under the set condition of v1 = 3.5 v and v2 = 0 v. the load short-circuiting detection delay time (t short ) is the time needed for v do to go ?l? after the voltage v2 momentarily increases (within 10 s) from 0 v to 1.6 v under the set condition of v1 = 3.5 v and v2 = 0 v. the abnormal charge current detection delay time is the time needed for v co to go from ?h? to ?l? after the voltage v2 momentarily decreases (within 10 s) from 0 v to ? 1.1 v under the set condition of v1 = 3.5 v and v2 = 0 v. the abnormal charge current detection delay time has the same value as the overcharge detection delay time. (11) test condition 11, test circuit 2 (product with 0 v battery charge function) (0 v battery charge starting charger voltage) the 0 v battery charge starting charger voltage (v 0cha ) is defined as the voltage between vdd and vm at which v co goes ?h? (v vm + 0.1 v or higher) when the voltage v2 is gradual ly decreased from the starting condition of v1 = v2 = 0 v. (12) test condition 12, test circuit 2 (product with 0 v battery charge inhibition function) (0 v battery charge inhibition battery voltage) the 0 v battery charge inhibition battery voltage (v 0inh ) is defined as the voltage between vdd and vss at which v co goes ?h? (v vm + 0.1 v or higher) when the voltage v1 is gradually increased from the starting condition of v1 = 0 v and v2 = ? 4 v. low dropout cmos voltage regulator rev.5.0 _00 s-8261 series seiko instruments inc. 17 vss do co vdd s-8261 series r1 = 470 v1 vm v v do com v v co dp vss do co s-8261 series v1 i dd vm v2 a v v do com v v co vdd dp test circuit 1 test circuit 2 vdd do co s-8261 series v1 i dd vm v2 i vm a a com vss dp vss do co s-8261 series v1 vm v 2 com a i do a i co v4 v3 vdd dp test circuit 3 test circuit 4 vss do co s-8261 series v1 vm v2 oscilloscope com oscilloscope vdd dp test circuit 5 figure 4 low dropout cmos voltage regulator s-8261 series rev.5.0 _00 seiko instruments inc. 18 ? operation remark refer to ? ? battery protection ic connection example ?. 1. normal status the s-8261 series monitors the voltage of the battery connected between vdd pin and vss pin and the voltage difference between vm pin and vss pin to control charging and discharging. when the battery voltage is in the range from the overdischarge detection voltage (v dl ) to the overcharge detection voltage (v cu ), and the vm pin voltage is in the range from the charger detection voltage (v cha ) to the overcurrent 1 detection voltage (v iov1 ), the ic turns both the charging and discharging control fets on. this status is called the normal status, and in this status charging and discharging can be carried out freely. caution when a battery is connected to the ic for the first time, discharging may not be enabled. in this case, short the vm pin and vss pin or connect the charger to restore the normal condition. 2. overcurrent status (detection of overcurrent 1, overcurrent 2 and load short-circuiting) when a battery in the normal status is in the status where the voltage of the vm pin is equal to or higher than the overcurrent detection voltage because the discharge current is higher than the specified value and the status lasts for the overcurrent detection delay time, the discharge control fet is turned off and discharging is stopped. this status is called the overcurrent status. in the overcurrent status, the vm and vss pins are shorted by the resistor between vm and vss (r vms ) in the ic. however, the voltage of the vm pin is at the v dd potential due to the load as long as the load is connected. when the load is disconnected, the vm pin returns to the v ss potential. this ic detects the status w hen the impedance between the eb + pin and eb ? pin (refer to figure 10 ) increases and is equal to the impedance that enables aut omatic restoration and the voltage at the vm pin returns to overcurrent 1 detection voltage (v iov1 ) or lower and the overcurrent status is restored to the normal status. caution the impedance that enables automatic restoration varies depending on the battery voltage and the set value of overcurrent 1 detection voltage. 3. overcharge status when the battery voltage becomes higher than the overcharge detection voltage (v cu ) during charging under the normal status and the detection continues fo r the overcharge detection delay time (t cu ) or longer, the s-8261 series turns the charging control fet off to stop charging. this status is called the overcharge status. the overcharge status is released by the following two cases ((1) and (2)): (1) when the battery voltage falls below the overcharge release voltage (v cu ) ? overcharge detection hysteresis voltage (v hc ), the s-8261 series turns the charging c ontrol fet on and turns to the normal status. (2) when a load is connected and discharging starts, t he s-8261 series turns the charging control fet on and returns to the normal status. just after the load is conn ected and discharging starts, the discharging current flows through the parasitic diode in the c harging control fet. at this mome nt the vm pin potential becomes v f , the voltage for the parasitic diode, higher than v ss level. when the battery voltage goes under the overcharge detection voltage (v cu ) and provided that the vm pin voltage is higher than the over current 1 detection voltage, the s-8261 series releases the overcharge status. caution 1. if the battery is charged to a voltage higher than the overcharge detection voltage (v cu ) and the battery voltage does not fall below the overcharge detection voltage (v cu ) even when a heavy load is connected, the detection of overcurrent 1, overcurrent 2 and load short-circuiting do not function until the battery voltage falls below overcharge detection voltage (v cu ). since an actual battery has an internal impedance of several dozens of m , the battery voltage drops immediately after a heavy load that causes ov ercurrent is connected, and the detection of overcurrent 1, overcurrent 2 and load short-circuiting function. 2. when a charger is connected after the overcharge detection, the overcharge status is not released even if the battery voltage is below the overcharge release voltage (v cl ). the overcharge status is released when the vm pin voltage goes over the charger detection voltage (v cha ) by removing the charger. low dropout cmos voltage regulator rev.5.0 _00 s-8261 series seiko instruments inc. 19 4. overdischarge status for products with power-down function when the battery voltage falls below the overdischarge detection voltage (v dl ) during discharging under the normal status and the detection continues for th e overdischarge detection delay time (t dl ) or longer, the s-8261 series turns the discharging control fet off to stop discharging. this status is called the over discharge status. when the discharging control fet is tur ned off, the vm pin voltage is pulled up by t he resistor between vm and vdd in the ic (r vmd ). when the voltage difference between the vm and vdd then is 1.3 v (typ.) or lower, the current consumption is reduced to the power-down current consumption (i pdn ). this status is called the power-down status. the power-down status is released when a charger is co nnected and the voltage difference between the vm and vdd becomes 1.3 v (typ.) or higher. moreover when the battery voltage becomes the overdischarge detection voltage (v dl ) or higher, the s-8261 series turns the disch arging fet on and returns to the normal status. for products without power-down function when the battery voltage falls below the overdischarge detection voltage (v dl ) during discharging under the normal status and the detection continues for th e overdischarge detection delay time (t dl ) or longer, the s-8261 series turns the discharging control fet off to stop discharging. this status is called the over discharge status. when the discharging control fet is tur ned off, the vm pin voltage is pulled up by t he resistor between vm and vdd in the ic (r vmd ). when the battery voltage becomes the overdischarge detection voltage (v dl ) or higher, the s-8261 series turns the discharging fet on and returns to the normal status. 5. charger detection when a battery in the overdischarge stat us is connected to a charger and prov ided that the vm pin voltage is lower than the charger detection voltage (v cha ), the s-8261 series releases the overdischarge status and turns the discharging control fet on when the battery voltage becomes equal to or higher than the overdischarge detection voltage (v dl ) since the charger detection function works. this action is called charger detection. when a battery in the overdischarge status is connected to a charger and provided that the vm pin voltage is not lower than the charger detection voltage (v cha ), the s-8261 series releases the overdischarge status when the battery voltage reaches the overdischarge detection voltage (v dl ) + overdischarge hysteresis (v hd ) or higher. 6. abnormal charge current detection if the vm pin voltage falls below the charger detection voltage (v cha ) during charging under normal status and it continues for the overcharge detection delay time (t cu ) or longer, the charging control fet turns off and charging stops. this action is called the abn ormal charge current detection. abnormal charge current detection works when the do pin vo ltage is ?h? and the vm pin voltage falls below the charger detection voltage (v cha ). consequently, if an abnormal charge current flows to an over-discharged battery, the s-8261 series turns the charging c ontrol fet off and stops charging afte r the battery voltage becomes higher than the overdischarge detecti on voltage which make the do pin voltage ?h?, and still after the overcharge detection delay time (t cu ) elapses. abnormal charge current detection is released when the vo ltage difference between vm pin and vss pin becomes less than charger detection voltage (v cha ). low dropout cmos voltage regulator s-8261 series rev.5.0 _00 seiko instruments inc. 20 7. delay circuits the detection delay times are determined by dividing a clock of the approximately 3.5 khz with the counter. remark 1. the detection delay time for overcurrent 2 (t iov2 ) and load short-circuiting (t short ) start when the overcurrent 1 (v iov1 ) is detected. when the overcurrent 2 (v iov2 ) or load short-circuiting (v short ) is detected over the detection delay time for each of them (= t iov2 or t short ) after the detection of overcurrent 1 (v iov1 ), the s-8261 series turns the fet off within t iov2 or t short of each detection. do pin vm pin v dd v dd time v iov1 v ss v ss v iov2 overcurrent 2 detection delay time (t iov2 ) time t d 0 t d t iov2 figure 5 2. for products with power-down function when the overcurrent is detected and continues for lo nger than the overdischarge detection delay time (t dl ) without releasing the load, the status changes to the power-down status when the battery voltage falls below the overdischarge detection voltage (v dl ). when the battery voltage falls below the overdischarge detection voltage (v dl ) due to the overcurrent, the s-8261 series turns the discharging control fet off by the overcu rrent detection. in this case if the re covery of the battery voltage is so slow that the battery voltage after the overdischarge detection delay time (t dl ) is still lower than the overdischarge detection voltage (v dl ), the s-8261 series shifts to the power-down status. for products without power-down function when the overcurrent is detected and continues for longer than the ov erdischarge detection delay time (t dl ) without released the load, the status changes to the overdischarge status when the battery voltage falls below overdischarge detection voltage (v dl ).when the battery voltage falls below overdischarge detection voltage (v dl ) due to the overcurrent, the s-8261 series turns the discharging control fet off by the overcurrent detection. in this case, if the recovery of the battery voltage is so slow that the battery voltage after the overdischarge detection delay time (t dl ) is still lower than the overdischarge detection voltage (v dl ), s-8261 series shifts to the overdischarge status. low dropout cmos voltage regulator rev.5.0 _00 s-8261 series seiko instruments inc. 21 8. dp pin the dp pin is a test pin for delay time measurement and it should be open in the actual application. if a capacitor whose capacitance is larger than 1000 pf or a resistor whose resistance is less than 1 m is connected to this pin, error may occur in the delay times or in the detection voltages. 9. 0 v battery charging function ?available? this function is used to recharge the connected battery whos e voltage is 0 v due to the se lf-discharge. when the 0 v battery charge starting charger voltage (v 0cha ) or higher is applied between eb + pin and eb ? pin by connecting a charger, the charging control fet gate is fixed to vdd pin voltage. when the voltage between the gate and source of the charging control fet becomes e qual to or higher than the turn-on volt age due to the charger voltage, the charging control fet is turned on to start charging. at this time, the discharging control fet is off and the charging current flows through the internal parasitic diode in t he discharging control fet. when the battery voltage becomes equal to or higher than the overdischarge detection voltage (v dl ) and the overdischarge hysteresis voltage (v hd ), the s-8261 series enters the normal status. caution some battery providers do not recommend charging for completely self-discharged battery. please ask battery providers before determine whether to enable or inhibit the 0 v battery charging function. remark the 0 v battery charge function has higher priority th an the abnormal charge current detection function. consequently, a product with the 0 v battery charging function is enabled charges a battery forcibly and abnormal charge current cannot be detected when the battery voltage is low. 10. 0 v battery charging function ?unavailable? this function inhibits the recharging when a battery that is s hort-circuited (0 v battery) internally is connected. when the battery voltage is the 0 v battery charge inhibition battery voltage (v 0inh ) or lower, the charging control fet gate is fixed to eb ? pin voltage to inhibit charging. when the battery voltage is the 0 v battery charge inhibition battery voltage (v 0inh ) or higher, charging can be performed. caution some battery providers do not recommend charging for completely self-discharged battery. please ask battery providers before determining the 0 v battery charging function. low dropout cmos voltage regulator s-8261 series rev.5.0 _00 seiko instruments inc. 22 ? timing chart (1) overcharge and overdischarge detection v dl + v hd v dl v dd v ss (2) (1) (1) (1) (3) battery voltage do pin co pin vm pin charger connection load connection status overdischarge detection delay time (t dl ) remark (1) normal status, (2) overcharge status, (3) overdischarge status, (4) overcurrent status the charger is supposed to charge with constant current. overcharge detection delay time (t cu ) v dd v dd v iov1 v ss v cha v ss v cu v cu ? v hc figure 6 (2) overcurrent detection v cu v cu ? v hc v dl + v hd v dl v dd v ss v dd v ss (1) (4) (1) (4) (1) (4) (1) v dd v short v iov2 v iov1 v ss overcurrent 1 detection delay time (t iov1 ) overcurrent 2 detection delay time (t iov2 ) load short-circuiting detection delay time (t short ) battery voltage do pin co pin vm pin charger connection load connection status remark (1) normal status, (2) overcharge status, (3) overdischarge status, (4) overcurrent status the charger is supposed to charge with constant current. figure 7 low dropout cmos voltage regulator rev.5.0 _00 s-8261 series seiko instruments inc. 23 (3) charger detection v cu v cu ? v hc v dl + v hd v dl v dd v ss v dd v ss v dd v ss v cha overdischarge detection delay time (t dl ) in case vm pin voltage < v cha overdischarge is released at the overdischarge detection voltage (v dl ) (1) (3) (1) battery voltage do pin co pin vm pin charger connection load connection status remark (1) normal status, (2) overcharge status, (3) overdischarge status, (4) overcurrent status the charger is supposed to charge with constant current. figure 8 (4) abnormal charge current detection abnormal charging current detection delay time ( = overcharge detection delay time (t cu )) overdischarge detection delay time (t dl ) (3) (1) (2) (1) (1) battery voltage do pin co pin vm pin charger connection load connection status remark (1) normal status, (2) overcharge status, (3) overdischarge status, (4) overcurrent status the charger is supposed to charge with constant current. v cu v cu ? v hc v dl + v hd v dl v dd v ss v dd v ss v dd v ss v cha figure 9 low dropout cmos voltage regulator s-8261 series rev.5.0 _00 seiko instruments inc. 24 ? battery protection ic connection example r1 : 470 battery c1 : 0.1 f vss do vdd co vm s-8261 series fet1 fet2 eb ? eb + r2 : 2 k dp figure 10 table 17 constant for external components symbol part purpose typ. min. max. remarks fet1 n-channel mos fet discharge control ? ? ? threshold voltage overdischarge detection voltage *1 gate to source withstanding voltage charger voltage *2 fet2 n-channel mos fet charge control ? ? ? threshold voltage overdischarge detection voltage *1 gate to source withstanding voltage charger voltage *2 r1 resistor esd protection, for power fluctuation 470 300 1 k resistance should be as small as possible to avoid lowering of the overcharge detection accuracy caused by vdd pin current. *3 c1 capacitor for power fluctuation 0.1 f 0.022 f 1.0 f install a capacitor of 0.022 f or higher between vdd and vss. *4 r2 resistor protection for reverse connection of a charger 2 k 300 4 k select a resistance as large as possible to prevent large current when a charger is connected in reverse. *5 *1. if the threshold voltage of an fet is low, the fet may not cut the charging current. if an fet with a threshold voltage equal to or higher th an the overdischarge detection voltage is used, discharging may be stopped before overdischarge is detected. * *2. if the withstanding voltage between the gate and source is lo wer than the charger voltage, the fet may be destroyed. *3. if r1 has a high resistance, the voltage between vdd and vss may exceed the absolute maximum rating when a charger is connected in reverse since the current flows fr om the charger to the ic. insert a resistor of 300 or higher to r1 for esd protection. *4. if a capacitor of less than 0.022 f is connected to c1, do may oscillate when load short-circuiting is detected. be sure to connect a capacitor of 0.022 f or higher to c1. *5. if r2 has a resistance higher than 4 k , the charging current may not be cut when a high-voltage charger is connected. caution 1. the above constants may be changed without notice. 2. the dp pin should be open. 3. it has not been confirmed whether the operation is normal or not in circuits other than the above example of connection. in additi on, the example of connection show n above and the constant do not guarantee proper operation. perform through evaluation using the actual application to set the constant. low dropout cmos voltage regulator rev.5.0 _00 s-8261 series seiko instruments inc. 25 ? precautions ? the application conditions for the input voltage, output voltage, and load cu rrent should not exceed the package power dissipation. ? do not apply an electrostatic discharge to this ic that exceeds the performance ratings of the built-in electrostatic protection circuit. ? sii claims no responsibility for any and all disputes arising out of or in connection with any infringement by products including this ic of patents owned by a third party. low dropout cmos voltage regulator s-8261 series rev.5.0 _00 seiko instruments inc. 26 ? characteristics (typical data) 1. detection / release voltage temperature characteristics overcharge detection voltage vs. temperature overcharge release voltage vs. temperature 4.34 4.36 4.38 4.40 4.42 4.44 ? 25 0 25 50 75 ta [c] v cu [v] ? 50 100 3.92 3.94 3.96 3.98 4.00 4.02 ? 25 0 25 50 75 ta [ c ] v cl [v] ? 50 100 overdischarge detection voltage vs. temperature overdischarge release voltage vs. temperature 2.94 2.96 2.98 3.00 3.02 3.04 ? 25 0 25 50 75 ta [c] v dl [v] ? 50 100 3.34 3.36 3.38 3.40 3.42 3.44 ? 25 0 25 50 75 ta [c] v du [v] ? 50 100 overcurrent 1 detection voltage vs. temperature overcurrent 2 detection voltage vs. temperature 0.15 0.20 0.25 0.30 0.35 0.40 0.45 ? 25 0 25 50 75 ta [c] v iov1 [v] ? 50 100 0.40 0.45 0.50 0.55 0.60 0.65 ? 25 0 25 50 75 ta [c] v iov2 [v] ? 50 100 load short-circuiting detection voltage vs. temperature 1.0 1.1 1.2 1.3 1.4 1.5 ? 25 0 25 50 75 ta [c] v short [v] ? 50 100 low dropout cmos voltage regulator rev.5.0 _00 s-8261 series seiko instruments inc. 27 2. current consumption temperature characteristics current consumption vs. temperature in normal mode current consumption vs. temperature in power-down mode 0 1 2 3 4 5 ? 25 0 25 50 75 ta [ c ] i ope [ a] ? 50 100 0 0.02 0.04 0.06 0.08 0.10 ? 25 0 25 50 75 ta [c] i pdn [ a] ? 50 100 3. current consumption power voltage characteristics (ta = 25c) current consumption power supply voltage dependency 0 1 2 3 4 5 6 0 2 4 6 8 10 12 v dd [v] i ope [ a] 4. detection / release delay time temperature characteristics overcharge detection delay time vs. temperature overcharge release delay time vs. temperature 0.50 0.75 1.00 1.25 1.50 ? 25 0 25 50 75 ta [c] t cu [s] ? 50 100 10 20 30 40 50 60 ? 25 0 25 50 75 ta [c] t cl [ms] ? 50 100 overdischarge detection delay time vs. temperature 100 120 140 160 180 200 ? 25 0 25 50 75 ta [c] t dl [ms] ? 50 100 low dropout cmos voltage regulator s-8261 series rev.5.0 _00 seiko instruments inc. 28 overcurrent 1 detection delay time vs. temperature overcurrent 2 detection delay time vs. temperature 5 7 9 11 13 15 ? 25 0 25 50 75 ta [c] t iov1 [ms] ? 50 100 1.4 1.8 2.2 2.6 3.0 3.4 ? 25 0 25 50 75 ta [c] t iov2 [ms] ? 50 100 load short-circuiting delay time vs. temperature 0.16 0.20 0.24 0.28 0.32 0.36 0.40 ? 25 0 25 50 75 ta [c] t short [ms] ? 50 100 5. delay time power-voltage characteristics (ta = 25c) overcurrent 1 detection delay time vs. power supply voltage dependency overcurrent 2 detection delay time vs. power supply volt age dependency 5 7 9 11 13 15 2 2.5 3 3.5 4 4.5 v dd [v] t iov1 [v] 1.4 1.8 2.2 2.6 3.0 3.4 2 2.5 3 3.5 4 4.5 v dd [v] t iov2 [ms] load short-circuiting delay time vs. power supply voltage dependency 0.16 0.2 0.24 0.28 0.32 2.5 3 3.5 4 4.5 v dd [v] t short [ms] low dropout cmos voltage regulator rev.5.0 _00 s-8261 series seiko instruments inc. 29 6. co pin / do pin output current characteristics (ta = 25c) co pin source current characteristics v dd = 3.5 v, v m = v ss = 0 v co pin sink current characteristics v dd = 4.5 v, v m = v ss = 0 v ? 0.5 ? 0.4 ? 0.3 ? 0.2 ? 0.1 0 0 1 2 3 4 v co [v] i co [ma] 0.5 0.4 0.3 0.2 0.1 0 0123 5 v co [v] i co [ma] 4 do pin source current characteristics v dd = 3.5 v, v m = v ss = 0 v do pin sink current characteristics v dd = 1.8 v, v m = v ss = 0 v ? 0.5 ? 0.4 ? 0.3 ? 0.2 ? 0.1 0 0 1 2 3 4 v do [v] i do [ma] 0.5 0.4 0.3 0.2 0.1 0 00.51 2 v do [v] i do [ma] 1.5 ! "# # $ "# # $ % #&' $ ( ( ! "# $ "# $ % ) )* +, , ! - * !. / 0 )1 ( - 20 - 20 34 5 ! 6) 7, , )8 7 . ! )6 *) "# 9 $ "# 9 $ % 96 www.sii-ic.com ? the information described herein is subject to change without notice. ? seiko instruments inc. is not responsible for any pr oblems caused by circuits or diagrams described herein whose related industrial properties, patents, or ot her rights belong to third parties. the application circuit examples explain typical applications of the products, and do not guarant ee the success of any specific mass-production design. ? when the products described herein are regulated produ cts subject to the wassenaar arrangement or other agreements, they may not be exported without authoriz ation from the appropriate governmental authority. ? use of the information described he rein for other purposes and/or repr oduction or copying without the express permission of seiko instrum ents inc. is strictly prohibited. ? the products described herein cannot be used as par t of any device or equipment affecting the human body, such as exercise equipment, medical equipment, security systems, gas equipment, or any apparatus installed in airplanes and other vehicles, without prior written permission of seiko instruments inc. ? although seiko instruments inc. exerts the greatest possible effort to ensure high quality and reliability, the failure or malfunction of semiconductor products may oc cur. the user of these products should therefore give thorough consideration to safety design, including redundancy, fire-prevention measures, and malfunction prevention, to prevent any accidents, fires, or community damage that may ensue. |
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