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  vishay siliconix SIP42104 document number: 74633 s-80224-rev. c, 04-feb-08 www.vishay.com 1 rohs compliant h-bridge driver and pulse width controller for digital camera micro modules features ? low supply range: 2.3 to 4.2 v ? low r h : 0.85 at 2.8 v and 150 ma ? output current up to 250 ma ? output voltage direction depends on input rising or falling edges ? break before make cross-over protection ? 300 ns de-glitch circuit ? programmable rc timer to set output pulse width ? sub micro-amp quiescent current ? sc89-6l package (1.6 x 1.6 x 0.6 mm) applications ? digital camera ? cell phones ? small dc motor control ? dual-stage latchable relay driver description the SIP42104 is a 250 ma integrated h-bridge driver and programmable output-pulse-width controller. it offers a complete and cost-effective solution for micro camera focus module applications such as shutter, iris, lens cover and infrared filter drivers. the out put voltage direction of the h-bridge is set by the presence of the rising or falling edge at the digital interface pin in and the corresponding on-duration is set by the rc pin time constant. during time-out, the input deglitc her-latch is transparent to input noise durations of less than 300 ns. internal breakbefore-make prevents output shoot-through. when the h-bridge turns off after time-out, the lower n-channel mosfets are turned on for a short interval to prevent turning on their body diodes. the low in threshold logic and the sub micro-amp stead y state quiescent current is ideal for low battery applications. the SIP42104 is offered in the ultra-small lead (pb)-free sc-89 package (sot666) and it is rated over the industrial ambient range of - 40 c to + 85 c. typical application circuit figure 1. v dd in 1.75 a sw1 rc c r gnd sw2 m1 m2 m3 m4 r load l load out2 out1 input buffer and deglitcher h-bridge driver and bbm timer and pulse width controller
www.vishay.com 2 document number: 74633 s-80224-rev. c, 04-feb-08 vishay siliconix SIP42104 notes: a. soldered down to pcb 1 inch 2 1 oz copper. b. derate - 2.15 mw/c above 70 c. c. soldering 5 s. stresses beyond those listed under "absol ute maximum ratings" may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other condi tions beyond those indicated in the operational sections of t he specifications is not implied. exposure to absolute maximum rating/condi tions for extended periods may affect device reliability. absolute maximum ratings parameter limit unit supply input voltage (v dd ) - 0.3 to 4.5 v input voltage (v in ) - 0.3 to 4.5 output dc voltage (v out1 , v out2 ) - 0.3 to 4.5 maximum pulsed current (i out1 , i out1 ) 250 ma esd rating (hbm) 5.5 kv thermal resistance a ( ja ) 465 c/w power dissipation b (p d ) 172 mw maximum junction temperature (t jm ) 150 c lead temperature c (t l ) 260 storage temperature (t s ) - 65 to 150 recommended operating range parameter limit unit v dd 2.3 to 4.2 v i out 150 ma timing resistor 10 k to 500 k timing capacitor 10 to 220 nf output inductive load l 10 to 550 h dcr of output inductive load 15 to 30
document number: 74633 s-80224-rev. c, 04-feb-08 www.vishay.com 3 vishay siliconix SIP42104 notes: a. the algebraic convention whereby the most negative value is a minimum and most positive is a maximum. b. typical values are for design aid only, not guaranteed nor subject to production testing. c. r h is the r ds (on) of m1 + m4 or m2 + m3. pin configuration specifications parameter symbol test conditions v dd = 2.8 v, t a = - 40 to 85 c unless otherwise noted. typical values are at t a = 25 c temp. min. a typ. b max. a unit h-bridge section supply voltage range v dd full 2.3 4.2 v operating current i ddq in = rc = 0 v full 5 a h-bridge resistance c r h i out = 150 ma full 0.85 1.6 rc time-out voltage v1 falling edge set by rc room 670 756 840 mv fast discharge voltage v2 falling edge set by r 1 c room 480 644 730 rc pulse width t rc r = 500 k, c = 100 nf room 65 ms in logic high v thi rising, m1/m4 on full 1.6 v in logic low v tlo falling, m1/m4 off full 0.82 0.5 hysteresis v hys v thi - v tlo full 0.28 in pull- down current i pd v in = v dd room 1.75 a break-before-make t bbm room 50 ns trigger edges t edge input rise and fall room < 0.1 s trigger pulse duration t in input minimum pulse width room 2 trigger response time t rt delay from in to output room 0.6 figure 2. out1 v dd in out2 gnd rc top view out2 gnd rc out1 v dd in bottom view sc89 package 6 5 4 1 2 3 pin description pin number name function 1 out1 h-bridge output 1 2 v dd supply voltage 3in input edge trigger direction control. positive edge sets out1 high and out2 low. negative edge sets out2 high and out1 low. 4 rc pulse width timing setting 5 gnd ground connection 6 out2 h-bridge output 2
www.vishay.com 4 document number: 74633 s-80224-rev. c, 04-feb-08 vishay siliconix SIP42104 notes: a. ?h? is part identifier and ?l? is lot and date code identifier. b. t1 tape and reel orientation with pin1 bottom left hand corner of cavity. functional block diagram ordering information part number marking temperature range package SIP42104dx-t1-e3 b hl a - 40 c to 85 c sc89-6l (sot666) figure 3. in v dd 1.75 a sw1 rc gnd sw2 h-bridge driver + bbm m1 m2 m3 m4 out1 out2 input buffer and deglitcher timer and pulse width controller
document number: 74633 s-80224-rev. c, 04-feb-08 www.vishay.com 5 vishay siliconix SIP42104 timing diagram detailed operational description SIP42104 is an easy to use integrated h-bridge driver and programmable output pulse width controller ic intended for digital camera micro module focus mode applications. the ic is designed to drive a solenoid of several hundred micro-henrys and operates over the supply range of 2.3 to 4.2 v. both h-bridge outpu t can source and sink up to 250 ma. the break-before-make delays prevents shoot-through via m1 to m2 or m3 to m4 in the h-bridge and is guaranteed by design. in the absence of any edge transi tions at the input pin, the ic is in the power-down mode with the h-bridge outputs at high impedance drawing only sub micro-amp of leakage current from the supply. the input pin is cmos logic level and has typical 1.75 a pull-down current, the input pin is buffered by a schmitt trigger with the threshold level of 1.1 v and typical hysteresis of 280 mv. a logic transition closes sw2 and initiates the h-bridge output turn-on for duration set by the external rc time constant. the logic level transition is latched in the device and this logic level transition determines which of the h-bridge output mosfets turns on. if the logic transition is rising from ground to v dd , with the high condition being present for at least 2 s, then m1 and m4 will turn on, m2 and m3 will turn off. this means that out1 will go high and out2 will go low. conversely, a falling logic transition is from v dd to ground, with the low level being present for 2 s, will turn on m2 and m3, m1 and m4 will turn off. once the input transition is latched, SIP42104 will ignore any input spurious transition until the rc pin time out is completed. an internal deglitch filter following the input buffer prevents SIP42104 from being accidentally triggered by the input pulse less than 300 ns duration. a positive edge transition on the input pin also initiates SIP42104 to charge the rc pin to v dd via sw1. this pre-charge period lasts for approximately 30 s. when the pre-charge period is completed, sw1 will turn off and the external capacitor begins to discharge via the external resistor. the timer and pulse width controller sense the voltage on rc pin. when the voltage on the rc pin falls to v1 (0.27 x v dd ). the timer and pulse width controller terminate the timeout and turn off the relevant h-bridge outputs. this yields and ou tput pulse width given by: t output = 1.3 x rc SIP42104 h-bridge output typically drives an inductive load. when output are turned off afte r the rc timeout, the current will still be flowing in the inductive load. to prevent the load current from forward biasing the body diodes of the output mosfets, both h-bridge lo w-side mosfets m2 and m4 will turn on briefly to allow the inductive load current to discharge to zero. when the voltage on the rc pin has fallen to v2 (0.23 x v dd ). this yields a discharge time: t discharge = 0.13 x c x r1 where r1 is the built-in resistor of 1.1 k . following this discharge time period, sw2 and all h-bridge output mosfets are turned off. SIP42104 powers down to its low quiescent current stat e. SIP42104 will remain in this state until the next input transiti on logic applied to the input pin to wake up. figure 4. s s t edge < 100 ns t edge < 100 ns t > 2 s inp u t control logic inp u t control logic o u tp u t c u rrent v out1 t rc = 1.3 x rc v out2 t rc = 1.3 x rc
www.vishay.com 6 document number: 74633 s-80224-rev. c, 04-feb-08 vishay siliconix SIP42104 typical characteristics normalized r h vs. v dd in threshold voltage vs. v dd i pd current vs. v dd 0.80 0.85 0.90 0.95 1.00 1.05 1.10 1.15 2.3 2.8 3.3 3.8 4.3 t a = 25 c v dd (v) r h (%) v v dd (v) 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 2.3 2.8 3.3 3.8 4.3 rising t a = 25 c falling v thi v tlo i pd (a) v dd (v) 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 2.3 2.8 3.3 3.8 4.3 t a = 25 c normalized r h vs. temperature in threshold voltage vs. temperature i pd current vs. temperature r h (%) temperature (c) 0.8 0.9 1.0 1.1 1.2 1.3 - 40 - 15 10 35 60 85 110 135 v dd = 2.8 v i o = 150 ma temperature (c) v 0.7 0.8 0.9 1.0 1.1 1.2 - 40 - 15 10 35 60 85 110 135 rising v dd = 2.8 v falling v thi v tlo i pd (a) temperature (c) 0 1 2 3 4 5 6 - 40 - 15 10 35 60 85 110 135 v dd = 4.2 v v dd = 2.8 v v dd = 2.3 v
vishay siliconix SIP42104 document number: 74633 s-80224-rev. c, 04-feb-08 www.vishay.com 7 typical characteristics normalized r h vs. i h r h vs. v dd i h (ma) r h (%) 0.995 1.000 1.005 1.010 1.015 1.020 1.025 1.030 1.035 1.040 100 125 150 175 200 225 250 t a = 25 c v dd = 2.8 v 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 2.0 2.5 3.0 3.5 4.0 4.5 v dd (v) r h ( ) normalized r h vs. i h r h vs. temperature i h (ma) r h (%) 1.00 1.01 1.02 1.03 1.04 1.05 1.06 1.07 100 125 150 175 200 225 250 t a = 25 c v dd = 2.3 v 0.4 0.6 0.8 1.0 1.2 1.4 - 40 - 15 10 35 60 85 110 135 temperature (c) r h ( )
www.vishay.com 8 document number: 74633 s-80224-rev. c, 04-feb-08 vishay siliconix SIP42104 typical waveforms 10 ms/div v in = 2.8 v, r load = 18 , l load = 80 h steady state operation 200 ns/div v in = 2.8 v, r load = 18 , l load = 80 h input rising edge trigger response time 2 s/div v in = 2.8 v, r load = 18 , l load = 80 h input rising edge triggering operation v out (1 v/div) v rc (500 mv/div) v in (1 v/div) i out (50 ma/div) v out (1 v/div) v in (500 mv/div) v out (1 v/div) v in (500 mv/div) v rc (500 mv/div) i out (50 ma/div) 5 ms/div v in = 2.8 v, r load = 18 , l load = 80 h rc threshold voltage 200 ns/div v in = 2.8 v, r load = 18 , l load = 80 h input falling edge trigger response time 2 s/div v in = 2.8 v, r load = 18 , l load = 80 h input falling edge triggering operation v out (1 v/div) v rc (500 mv/div) v dd 0.23 x v dd 0.27 x v out (1 v/div) v in (500 mv/div) v out (1 v/div) v in (500 mv/div) v rc (500 mv/div) i out (50 ma/div)
vishay siliconix SIP42104 document number: 74633 s-80224-rev. c, 04-feb-08 www.vishay.com 9 typical waveforms vishay siliconix maintains worldwide manufacturing capability. pr oducts may be manufactured at one of several qualified locatio ns. reliability data for silicon technology and package reliability represent a composite of all qualified locations. for related documents such as package/tape drawings, part marking, and reliability data, see http://www.vishay.com/ppg?74633 . 5 s/div v in = 2.8 v, r load = 18 , l load = 80 h inductive discharge out1 to out2 50 ns/div v in = 2.8 v, r load = 18 , l load = 80 h rising edge t bbm v out (1 v/div) v in (500 mv/div) v rc (500 mv/div) i out (50 ma/div) v out (1 v/div) 5 s/div v in = 2.8 v, r load = 18 , l load = 80 h inductive discharge out2 to out1 50 ns/div v in = 2.8 v, r load = 18 , l load = 80 h falling edge t bbm v out (1 v/div) v in (500 mv/div) v rc (500 mv/div) i out (50 ma/div) v out (1 v/div)
e d notes: 1. all dimensions are in millimeters. 2. package outline exclusive of mold flash and metal burr. 3. package outline inclusive of plating. 4. maximum webbing flash remain 0.075 mm. c m 0.10 a b b1 a b e1 l2 e pin 1 a a3 c e1 l1 l3 b  (4  ) package information vishay siliconix document number: 72067 28-nov-05 www.vishay.com 1  
  
     dim min nom max min nom max a 0.56 ? 0.60 0.022 ? 0.024 a3 0.13 0.17 0.18 0.005 0.006 0.007 b 0.17 ? 0.25 0.006 ? 0.010 b1 ? 0.27 0.34 ? 0.011 0.013 d 1.50 1.66 1.70 0.059 0.065 0.067 e 1.50 1.65 1.70 0.059 0.065 0.067 e1 1.10 1.20 1.30 0.043 0.047 0.051 e 0.50 bsc 0.020 bsc e 1 0.20 ? ? 0.008 ? ? l1 0.11 0.19 0.26 0.004 0.007 0.010 l2 0.10 0.23 0.30 0.004 0.009 0.012 l3 0.05 0.10 ? 0.002 0.004 ?  8  10  12  8  10  12  ecn: s-52444?rev. d, 28-nov-05 dwg: 5891 *use millimeters as the primary measurement
document number: 91 000 www.vishay.com revision: 11-mar-11 1 disclaimer legal disclaimer notice vishay all product, product specifications and data ar e subject to change without notice to improve reliability, function or design or otherwise. vishay intertechnology, inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectivel y, vishay), disclaim any and all liability fo r any errors, inaccuracies or incompleteness contained in any datasheet or in any o ther disclosure relating to any product. vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or the continuing production of any product. to the maximum extent permitted by applicab le law, vishay disc laims (i) any and all liability arising out of the application or use of any product, (ii) any and all liability, incl uding without limitation specia l, consequential or incidental dama ges, and (iii) any and all impl ied warranties, including warran ties of fitness for particular purpose, non-infringement and merchantability. statements regarding the suitability of pro ducts for certain types of applications are based on vishays knowledge of typical requirements that are often placed on vishay products in gene ric applications. such statements are not binding statements about the suitability of products for a partic ular application. it is the customers responsibility to validate that a particu lar product with the properties described in th e product specification is su itable for use in a particul ar application. parameters provided in datasheets an d/or specifications may vary in different applications and perfo rmance may vary over time. all operating parameters, including typical pa rameters, must be validated for each customer application by the customers technical experts. product specifications do not expand or otherwise modify vishays term s and conditions of purchase, including but not limited to the warranty expressed therein. except as expressly indicated in writing, vishay products are not designed for use in medical, life-saving, or life-sustaining applications or for any other application in which the failure of the vishay product co uld result in person al injury or death. customers using or selling vishay products not expressly indicated for use in such applications do so at their own risk and agr ee to fully indemnify and hold vishay and it s distributors harmless from and against an y and all claims, liabilities, expenses and damages arising or resulting in connection with such use or sale, including attorneys fees, even if such claim alleges that vis hay or its distributor was negligent regarding the design or manufact ure of the part. please contact authorized vishay personnel t o obtain written terms and conditions regarding products designed fo r such applications. no license, express or implied, by estoppel or otherwise, to any intelle ctual property rights is gran ted by this document or by any conduct of vishay. product names and markings noted herein may be trademarks of their respective owners.


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