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at1731a preliminary product information dc-dc power ic for tft panel 7f, no.9,park avenue. ii, science-based indu strial park, hsinchu 300,taiwan, r.o.c. tel: 886-3-563-0878 fax: 886-3-563-0879 www: http://www.aimtron.com.tw 2/8/2006 rev:1.1 email: service@aimtron.com.tw 1 feature ? 2.6v to 5.5v supply voltage operating range. ? 1.2mhz fixed switching frequency. ? current-mode pwm step-up regulator main high-power output up to 15v typical 1% accuracy built-in n-mos, r ds(on) P 0.25 (typ.) current-limit comparator ? negative charge-pump output voltage down to ?30 v. ? positive charge-pump output voltage up to 30 v. ? internal power-on sequencing , soft-start. ? thermal protection , short circuit protection. ? 1ua shutdown current. ? 1.5ma quiescent current. ? 16-pin tssop package. application ? tft-lcd notebook display ? tft-lcd desktop monitor panels. ? car navigation systems. description the at1731a dc-dc converter supply a compact and small power supply solution to provide the regulated voltages required by thin film transistor (tft) lcd display. a built-in power sequence control. the main step-up dc-dc converter is a high-frequency 1.2 mhz current-mode pwm regulator with a built-in 0.25 n-mos that allows the use of ultra-small inductors and ceramic capacitor to generate an externally set output voltage up to 15v. it p rovides fast transient response to pulsed loads while operating with efficiencies over 85%. the two built-in charge- p ump regulators are used to generate the tft gate-on and gate-off supplies and can adjust gate-on and gate-off output voltage with external resistive divider between gate-off/on output voltage and ground. at1731a is available in tssop- 16 package. block diagram logic control block negative charge-pump block positive charge-pump block main step-up converter block under-voltage lockout soft- start thermal protection short-circuit protection vin gnd scp lx pgnd reference voltage ref fb /shdn v ddn fbn swn v ddp fbp swp comp ss aimtron reserves the right without notice to change this circuitry and specifications.
at1731a preliminary product information dc-dc power ic for tft panel 7f, no.9,park avenue. ii, science-based indu strial park, hsinchu 300,taiwan, r.o.c. tel: 886-3-563-0878 fax: 886-3-563-0879 www: http://www.aimtron.com.tw 2/8/2006 rev:1.1 email: service@aimtron.com.tw 2 pin configurations 1 2 3 413 14 15 16 shdn vin fb comp vddn 9 10 11 12 lx fbn swp pgnd 5 6 7 8 vddp ref scp gnd swn ss fbp ordering information part number package marking at1731ap tssop-16 date code at1731ap_gre tssop-16 , green , date code with one bottom line : date code * for more marking information, contact our sales representative directly pin description pin n0. symbol i / o description 1 vddp p positive charge-pump driver supply voltage. bypass to power ground with 0.1uf capacitor. 2 vddn p negative charge-pump driver supply voltage. bypass to power ground with 0.1uf capacitor. 3 lx i main step-up regulator n-mos drain. place output diode and inductor. 4 vin p input voltage pin of the device .vin may range from 2.6v to 5.5v 5 comp o compensation pin for the main step-up converter. a series rc is connected to this pin. 6 fb i main step-up regulator feedback input. connect a resistive divider from main output to fb to analog ground. 7 /shdn i active-low shutdown control input. pull shdn low to force the controller into shutdown. if unused, connect shdn to vin for normal operation. 8 ref o internal reference output. external load capability up to 50ua. 9 gnd p analog ground. 10 ss i soft-start input. the capacitor connected to this pin to sets the current-limited start time. 11 fbp i positive charge-pump regulator f eedback input. connect a resistive divider from the positive charge-pump output to fbp to analog ground. 12 scp i short circuit protection. 13 fbn i negative charge-pump regulator f eedback input. connect a resistive divider from the negative charge-pum p output to fbn to the reference. 14 swn o negative charge-pump driver output. output high level is vddn and low level is pgnd. 15 swp o positive charge-pump driver output. output high level is vddp and low level is pgnd. 16 pgnd p power ground.
at1731a preliminary product information dc-dc power ic for tft panel 7f, no.9,park avenue. ii, science-based indu strial park, hsinchu 300,taiwan, r.o.c. tel: 886-3-563-0878 fax: 886-3-563-0879 www: http://www.aimtron.com.tw 2/8/2006 rev:1.1 email: service@aimtron.com.tw 3 absolute maximum ratings * 1 parameter rated value unit vin , shdn , ss voltage +6 v lx , swp , swn voltage +18 v comp, ref, fb, fbn, fbp voltage vin + 0.3 v quiescent current 2.5 ma continuous power dissipation (tssop-16,ta=+70 o c) 650 mw junction temperature 150 lead temperature (soldering 10 sec) 260 storage temperature -40~150 hbm 2 kv esd susceptibility * 2 mm 200 v 1. stresses beyond those listed under ?absolute maximum ra tings? may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specification s is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability . 2. device are esd sensitive. handling precaution reco mmended. the human body model is a 100pf capacitor discharged through a 1.5k ? resistor into each pin. recommended operation conditions values parameter symbol min. typ. max. unit power supply voltage vcc 2.6 D 5.5 v operating temperature top -30 +25 +85
at1731a preliminary product information dc-dc power ic for tft panel 7f, no.9,park avenue. ii, science-based indu strial park, hsinchu 300,taiwan, r.o.c. tel: 886-3-563-0878 fax: 886-3-563-0879 www: http://www.aimtron.com.tw 2/8/2006 rev:1.1 email: service@aimtron.com.tw 4 electrical characteristics (vin=3.0v, shdn=vin, vddp=vddn=10v, ta=+25 , unless otherwise noted) parameter symbol test condition min. typ. max units input operating voltage vin 2.6 D 5.5 v input under-voltage threshold v uvlo vin rising 2.45 2.5 2.55 v vin uvlo hysteresis D 120 D mv vin quiescent current iin v fb =v fbp =1.23v, v fbn = - 0.2v 1 1.5 ma vin shutdown current i shdn shdn=gnd 1 10 ua vddp quiescent current i vddp v fbp =1.5v 0.5 0.8 ma vddp shutdown current shdn=gnd, vddp=15v 1 10 ua vddn quiescent current i vddn v fbn = - 0.2v 0.5 0.8 ma vddn shutdown current shdn=gnd, vddn=15v 1 10 ua main step-up converter main output voltage range v main vin 15 v feedback regulation voltage v fb ta = + 2 5 1.21 1.23 1.24 v fb input bias current i fb v fb =1.23v -50 D 50 na operating frequency f osc ta = + 2 5 1.1 1.2 1.3 mhz oscillator maximum duty cycle 80 85 90 % load regulation 0 ma at1731a preliminary product information dc-dc power ic for tft panel 7f, no.9,park avenue. ii, science-based indu strial park, hsinchu 300,taiwan, r.o.c. tel: 886-3-563-0878 fax: 886-3-563-0879 www: http://www.aimtron.com.tw 2/8/2006 rev:1.1 email: service@aimtron.com.tw 5 on) v fbp =1.2v 2 4 n-ch on-resistance r nch-ds( on) v fbp =1.24v 20 k maximum rms swp current 30 ma reference reference voltage v ref -2ua at1731a preliminary product information dc-dc power ic for tft panel 7f, no.9,park avenue. ii, science-based indu strial park, hsinchu 300,taiwan, r.o.c. tel: 886-3-563-0878 fax: 886-3-563-0879 www: http://www.aimtron.com.tw 2/8/2006 rev:1.1 email: service@aimtron.com.tw 6 typical operating characteristics load-transient response vin=3.3v, vmain=10v main boost step-up waveform with load ch1:v main , ch3:i lx , ch4:i main ch1:shdn, ch2:v main , ch3:i lx , ch4:i main i main =200ma to 2ma i main =300ma power-up sequence power-up sequence ch1: v main , ch2: v pos , ch3: shdn, ch4:v neg ch1:v main , ch2: soft-start, ch3: v pos, ch4: v neg i main =300ma,i neg =20ma,i pos =20ma i main =300ma,i neg =20ma,i pos =20ma
at1731a preliminary product information dc-dc power ic for tft panel 7f, no.9,park avenue. ii, science-based indu strial park, hsinchu 300,taiwan, r.o.c. tel: 886-3-563-0878 fax: 886-3-563-0879 www: http://www.aimtron.com.tw 2/8/2006 rev:1.1 email: service@aimtron.com.tw 7 ripple waveform ch1:v main , ch2:v pos , ch3:v neg, i main =300ma, i neg =20ma,i pos =20ma efficiency vs. load current (boost converter and charge pumps) 0 10 20 30 40 50 60 70 80 90 100 1 3 7 20 40 60 80 100 300 imain (ma) efficiency (%) vin=5.0v vin=3.3v vin=2.7v
at1731a preliminary product information dc-dc power ic for tft panel 7f, no.9,park avenue. ii, science-based indu strial park, hsinchu 300,taiwan, r.o.c. tel: 886-3-563-0878 fax: 886-3-563-0879 www: http://www.aimtron.com.tw 2/8/2006 rev:1.1 email: service@aimtron.com.tw 8 main step-up converter efficiency vs. load current (boost only) 50 55 60 65 70 75 80 85 90 95 1 3 7 20406080100300 i main (ma) efficiency (% ) vin=5.0v vin=3.3v vin=2.7v switching frequency vs. input voltage 1.18 1.19 1.2 1.21 1.22 1.23 1.24 1.25 2.5 2.8 3 3.5 4 4.5 5 5.5 input voltage (v) switching frequency (mhz)
at1731a preliminary product information dc-dc power ic for tft panel 7f, no.9,park avenue. ii, science-based indu strial park, hsinchu 300,taiwan, r.o.c. tel: 886-3-563-0878 fax: 886-3-563-0879 www: http://www.aimtron.com.tw 2/8/2006 rev:1.1 email: service@aimtron.com.tw 9 reference voltage vs. reference load current 1.222 1.223 1.224 1.225 1.226 1.227 1.228 1.229 1.23 0 5 10 15 20 25 30 35 40 45 50 i ref (ua) v ref (v) reference voltage vs. temperature 1.223 1.224 1.225 1.226 1.227 1.228 1.229 1.23 1.231 1.232 1.233 -20-10 0 255085 temperature ( o c) v ref (v)
at1731a preliminary product information dc-dc power ic for tft panel 7f, no.9,park avenue. ii, science-based indu strial park, hsinchu 300,taiwan, r.o.c. tel: 886-3-563-0878 fax: 886-3-563-0879 www: http://www.aimtron.com.tw 2/8/2006 rev:1.1 email: service@aimtron.com.tw 10 switching frequency vs. temperature 1.05 1.1 1.15 1.2 1.25 1.3 -20 -10 0 25 50 85 temperature ( o c) switching frequency (mhz
at1731a preliminary product information dc-dc power ic for tft panel 7f, no.9,park avenue. ii, science-based indu strial park, hsinchu 300,taiwan, r.o.c. tel: 886-3-563-0878 fax: 886-3-563-0879 www: http://www.aimtron.com.tw 2/8/2006 rev:1.1 email: service@aimtron.com.tw 11 typical application circuit vin 22uf 270k 47k 0.1uf vneg=-7v/20ma 1uf 0.1uf vddp pgnd swp ref comp gnd shdn fbn at1731a aimtron vin fbp vddn lx swn 0.22uf 18pf 0.22uf 47uf vmain=13v/300ma 454k 47k 0.1uf 4.7uh d 0.1uf 0.1uf vpos 47k 800k 0 10uf vmain vpos=22v/20ma 50k fb scp 470pf ss 33nf 100pf 0.47uf option jp1 figure 1. standard application circuit
at1731a preliminary product information dc-dc power ic for tft panel 7f, no.9,park avenue. ii, science-based indu strial park, hsinchu 300,taiwan, r.o.c. tel: 886-3-563-0878 fax: 886-3-563-0879 www: http://www.aimtron.com.tw 2/8/2006 rev:1.1 email: service@aimtron.com.tw 12 function description the at1731a is a multiple-output dc-dc converte r ic which is designed primarily for use in thin-film transistor (tft) liquid crystal di splay (lcd) applications. it features a pwm step-up converter operating with a fixed switching frequency of 1.2 mhz and uses internal n-mos to provide maximum efficiency . the out put voltage of the main step-up converter can be set from vin to 15v with external resistive divi der. a pair of charge-pump independently regulate a positive output vddp and a negative output vddn for tft gate-on and gate-off supplies. at1731a also consists of a precision 1.23v reference that sources up to 50ua, logic shutdown , current -limited , soft-start, power-up sequencing , thermal shutdown and active low. main boost converter the boost converter operates in fast transient response , current-mode pwm and a constant frequency of 1.2 mhz , allowing the use of sm aller external inductor and output capacitors. depending on duty cycle of each switching cycle can regulate output voltage. osc control and driver logic current sense slope compansation gm pgnd lx nmos 1.23v comp gnd ref fb vin l vmain r1 r2 c10 vin undervoltage lockout thermal protection gm current limit short circuit protection soft-start fb scp figure 2 main step-up converter block diagram figure 2 shows main step-up converter block diag ram. on the rising edge of the internal clock , the control and driver logic block sets in ternal flip-flop when th e output voltage is too low, which turns on the n-mos . the external inductor current ramp s up linearly , storing energy in a magnetic filed. once peak current of inductor over trans-conductance output level , the n-mos turns off, the flip-flop resets , and external schottky diode turns on . this
at1731a preliminary product information dc-dc power ic for tft panel 7f, no.9,park avenue. ii, science-based indu strial park, hsinchu 300,taiwan, r.o.c. tel: 886-3-563-0878 fax: 886-3-563-0879 www: http://www.aimtron.com.tw 2/8/2006 rev:1.1 email: service@aimtron.com.tw 13 forces the current through the i nductor to ramp back down , tran sferring the energy stored in the magnetic field to the output capacitor and loa d. to add higher flexibility to the selection of external component values, the de vice uses external loop compensation. negative charge-pump regulator negative charge-pump contains internal p-channel and n-channel mosfets to perform the power transfer. the internal mosfets switch at a constant 600khz (0.5x f osc ). the charge-pump inverts the supply voltage (vddn) and provides a regulated negative output voltage. figure 3 shows charge-pump block di agram. during the first half-cycle, the p-channel mosfet turns on and flying capacitor c cpn charges to v ddn minus a diode drop. during the second half-cycle, the p-channel mosfet turns off, and the n-channel mosfet turns on, level shifting c cpn . this connects c cpn in parallel with the reservoir capacitor c neg . if the voltage across c neg minus a diode drop is lowe r than the voltage across c cpn , charge flows from c cpn to c neg until the diode turns off. the amount of charge transferred to the output is controlled by the vari able n-channel on-resistance. positive charge-pump regulator positive charge-pump also contains internal p-channel and n-channel mosfets to perform the power transfer. the internal mosfets switch at a constant 600khz (0.5x f osc ). the charge-pump inverts the doubles supply voltage (vddp) and provides a regulated positive output voltage. during the first half-cycle , the n-channel mosfet turns on and flying capacitor c cpp charges to v ddp minus a diode drop. during the second half-cycle, the n-channel mosfet turns off, and the p- channel mosfet turns on, level shifting c cpp by v ddp volts. this connects c cpp in series with the reservoir capacitor c pos . if the voltage across c pos plus a diode drop is lower than the level shifted flying capacitor voltage (v cpp +v ddp ), charge flows from c cpp to c pos until the diode turns of f. the amount of charge transferred to the output is controlled by the variable n-channel on-resistance. cpp cout cout fbn swn r10 ref v 1.23v r11 neg c neg v cpn c switch block fbp 1.23v r4 c r3 swp ddn vmain v ddp v pos c pos v vddp driver driver v pos =(1+r3/r4)x v ref v ref =1.23v v vv = -(r10/r11)x neg =1.23v ref ref
at1731a preliminary product information dc-dc power ic for tft panel 7f, no.9,park avenue. ii, science-based indu strial park, hsinchu 300,taiwan, r.o.c. tel: 886-3-563-0878 fax: 886-3-563-0879 www: http://www.aimtron.com.tw 2/8/2006 rev:1.1 email: service@aimtron.com.tw 14 figure 3 charge-pump block diagram shutdown the at1731a shuts down to reduce the supply cu rrent to 1ua when shdn is low. in this mode, the internal reference , error amplifier , comparators, and biasing circuitry turn off while the n-channel mosfet is turned off. th e boost converter?s output is connected to vin normally. do not leave shdn pin floating. a lo gic-level transition on shdn clears the fault latch. power-up sequencing the at1731a goes through start-up sequence after power-up or exiting shutdown. first, the reference power-up, then the main dc-dc step- up converter powers up with soft-start enable. once the main dc-dc step-up converter reaches regulation , the negative charge pump turns on. when the negative charge pump output vo ltage reaches approximately 90% of its nominal value (v fbn <110mv) , then the positive charge pump starts up. finally, when the positive output voltage reaches 100% of its nominal value (v fbp >1.1v) .the power-up sequence is completed, see figure 4. shotdown signal step-up vout positive charge-pump vout negative charge-pump vout nominal regulator value nominal regulator 100% 0v 0v 0v 0v nominal regulator 90% vin vmain figure 4 power sequence soft-start soft-start allows a gradual increase of the internal current-limit level for the main step-up converter during power-up to redu ce input surge currents. as the internal 2ua current source charges the external soft-start capacitor, the peak n-mos current is limited by the voltage on the capacitor. for the dual charge pumps , soft-start is achieved by in-turn controlling the
at1731a preliminary product information dc-dc power ic for tft panel 7f, no.9,park avenue. ii, science-based indu strial park, hsinchu 300,taiwan, r.o.c. tel: 886-3-563-0878 fax: 886-3-563-0879 www: http://www.aimtron.com.tw 2/8/2006 rev:1.1 email: service@aimtron.com.tw 15 rising rate of output voltage. short-circuit protection i f feedback voltage of the main regulator fa lls below 0.8v, positive charge-pump falls below 1.1v and negative charge-pump falls below 130mv , the built-in constant current will charge external capacitor c scp . if v scp reaches 0.8v ,the ready pin goes high impedance and all outputs shut down.; however , the reference remain s active. when short- circuit problem is to eliminate, toggle shutdown or cycle the input voltage to clear the fault latch . voltage reference the voltage at ref is nominally 1.23v. the reference can source up to 50ua with good regulation. connect a 0.22uf bypass capacitor between ref and gnd. thermal-overload protection thermal-overload protection limits total power dissipation in the at1731a. when the junction temperature exceeds tj=160 , a thermal sensor activates the thermal protection, which shuts down the ic, allowing the ic to cool. once the device cools down by 15 , ic will automatically recover normal operation. fo r continuous operation , do not exceed the absolute maximum junction-temperature rating of tj=150 . power dissipation consideration the at1731a maximum power dissipation depends on the thermal resistance of the ic package and circuit board, the temperature di fference between the di e junction and ambient air, and the rate of any airflow. the power di ssipation in the device depends on the operating conditions of each regulator. the step-up converter dissipates power across the internal n-mos as the controller ramps up the inductor current. in continuous conditi on, the power dissipated internally can be approximated by : d r l f d v v v i p on ds osc in in main main boost main + = ? ) ( 2 2 ] ) ( 12 1 ) [( where i main : it includes the primary load current and the input supply current for the charge-pumps. the charge-pumps provide regulated output vo ltages by dissipating power in the low-side n-mos, so they could be modeled as linear regulators followed by unregulated charge-pumps. therefore, their power dissip ation is similar to a linear regulator : ] ) 2 [( ] ) 2 [( out pos diode ddp pos pos out neg diode ddn neg neg v n v v i p v n v v i p ? ? ? ? = ? ? =
at1731a preliminary product information dc-dc power ic for tft panel 7f, no.9,park avenue. ii, science-based indu strial park, hsinchu 300,taiwan, r.o.c. tel: 886-3-563-0878 fax: 886-3-563-0879 www: http://www.aimtron.com.tw 2/8/2006 rev:1.1 email: service@aimtron.com.tw 16 where n : it is the number of charge-pump stages. v diode : diodes? forward voltage to find the total power dissipated in the devi ce, the power dissipated by each regulator and the buffer must be added together : pos neg boost main total p p p p + + = ? the maximum allowed power dissipati on is around 650 mw (16-pin tssop) ba jb a max j max t t p + ? = ) ( ) ( where : t j - t a : it is the temperature difference between the ic?s junction and the surrounding air. jb : the thermal resistance of the package to the board ba : the thermal resistance from the pcb to the surrounding air.
at1731a preliminary product information dc-dc power ic for tft panel 7f, no.9,park avenue. ii, science-based indu strial park, hsinchu 300,taiwan, r.o.c. tel: 886-3-563-0878 fax: 886-3-563-0879 www: http://www.aimtron.com.tw 2/8/2006 rev:1.1 email: service@aimtron.com.tw 17 applications information external components of main boost converter can be desi gned by performing simple calculations. it need to follow regulation by th e output voltage and the maximum load current, as well as maximum and minimum input voltage s. begin by selecting an inductor value. once l is know, choose the diode and capacitors. boost inductor inductor selection depends on input voltage, output voltage , maximum current , switching frequency and availability of inductor valu es. the following boost circuit equations are useful in choosing the inductor values based on the application. they allow the trading of peak current and inductor value while allowing for consideration of co mponent availability and cost. the peak inductor current is given by: d i i i i i main lavg l lavg lpeak ? = ? + = 1 2 where: i l is the inductor peak-to-peak cu rrent ripple and is decided by: osc in l f d l v i = ? d is the mosfet turn on ratio and is decided by: o in o v v v d ? = f osc is the switching frequency. the inductor should be chosen to be able to handle this current and inductor saturation current rating should be greater than i peak . diode selection the output diode has average current of i main , and peak current the same as the inductor?s peak current and a voltage rating at least 1.5 times the main output voltage. schottky diode is recommended and it should be able to handle those current. feedback resistor network an external resistor divider is required to divide the output voltage down to the nominal reference voltage. current drawn by the resistor network should be limited to maintain the overall converter efficiency . the maximum va lue of the resistor network is limited by the
at1731a preliminary product information dc-dc power ic for tft panel 7f, no.9,park avenue. ii, science-based indu strial park, hsinchu 300,taiwan, r.o.c. tel: 886-3-563-0878 fax: 886-3-563-0879 www: http://www.aimtron.com.tw 2/8/2006 rev:1.1 email: service@aimtron.com.tw 18 feedback input bias current and the potential fo r noise being coupled into the feedback pin. a resistor network in the order of 200k is recommended. the boost converter output voltage is determined by the following relationship: ? ? ? ? ? ? ? ? + = 2 1 1 r r v v ref main where v ref =1.23v as specified. output capacitor the at1731a is specially compensated to be stab le with capacitors which have a worst- case minimum value of 10uf at the particular v main being set. output ripple voltage requirements also determine the minimum value and type of capacitors. output ripple voltage consists of two components the voltage drop caused by the switching current th rough the esr of the output capacitor and the charging and di scharging of the output capacitor: osc out main main in main lpeak ripple f c i v v v esr i v ? + = for low esr ceramic capacitors, the output ripple is dominated by the charging or discharging of the output capacitor. compensation the main step-up loop can be compensated by adjusting the external components connected to the comp pin. the comp pin is connected to the output of the internal trans-conductance error amplifier. the compensation capacitor adju sts the low frequency ga in , and the series resistor value adjusts the high frequency gain . the following formula calculates at what frequency the resistor increas es the high frequency gain. c c z r c f = 2 1 if the device operates over the entire input vo ltage range from 2.7v to 5.5v, a larger compensation capacitor up to 18pf is recomm ended. for a good load transient where no oscillation should occur, 50 k is recommended for r c resistor. positive and negative charge pump the at1731 contains two independent charge pu mp. the regulation of both the negative and positive charge pumps is generated by the internal comparator that senses the output voltage and compares it with and internal reference. the switching frequency of the charge pumps is set to 0.5xf osc . the pumps use pulse width modulation to adjust the pump period, depending on the load present.
at1731a preliminary product information dc-dc power ic for tft panel 7f, no.9,park avenue. ii, science-based indu strial park, hsinchu 300,taiwan, r.o.c. tel: 886-3-563-0878 fax: 886-3-563-0879 www: http://www.aimtron.com.tw 2/8/2006 rev:1.1 email: service@aimtron.com.tw 19 cout fbn swn r10 ref v 1.23v r11 neg c neg v cpn c switch block fbp 1.23v r4 r3 swp ddn vmain v ddp v c out vddp driver driver dl c dl vddp vpos triple output c cpp pos c vpos triple output c cpp negative and positive char ge pump function diagram negative charge pump design consideration for a single stage charge pump, the maximum v neg output is determined by the following equation: ddn neg osc neg cpn osc neg diode on swnp on swnn neg max neg v c f i c f i v r r i v ? ? ? + + 5 . 0 1 5 . 0 1 2 ) ( 2 ) ( ) ( ) ( where: r swnn(on) and r swnp(on) resistance values depend on the v ddn voltage levels. positive charge pump design consideration for two stage charge pumps, the maximum v pos output is determin ed by the following equation: where: r swpp(on) and r swpn(on) resistance values depend on the v ddp voltage levels. ) 5 . 0 1 5 . 0 1 2 ( 5 . 0 1 5 . 0 1 2 ) ( 2 2 ) ( ) ( ) ( out osc pos cpp osc pos diode ddp pos osc pos cpp osc pos diode on swpp on swpn pos ddp max pos c f i c f i v v c f i c f i v r r i v v + + ? + ? ? ? + ?
at1731a preliminary product information dc-dc power ic for tft panel 7f, no.9,park avenue. ii, science-based indu strial park, hsinchu 300,taiwan, r.o.c. tel: 886-3-563-0878 fax: 886-3-563-0879 www: http://www.aimtron.com.tw 2/8/2006 rev:1.1 email: service@aimtron.com.tw 20 pcb layout guidelines careful printed circuit layout is extremely important to avoid causing parasitical capacitance and line inductance. the following layout guide lines are recommended to achieve optimum performance. ? please the boost converter diode and induc tor close to the lx pin and no via. ? please ceramic bypass capacitors n ear the charge-pump input pin. ? locate all feedback resi stive dividers as close to thei r respective feedback pins as possible. ? separate gnd and pgnd areas connected at only one point under the ic. ? use wide traces and trace le ngth is short as possible.
at1731a preliminary product information dc-dc power ic for tft panel 7f, no.9,park avenue. ii, science-based indu strial park, hsinchu 300,taiwan, r.o.c. tel: 886-3-563-0878 fax: 886-3-563-0879 www: http://www.aimtron.com.tw 2/8/2006 rev:1.1 email: service@aimtron.com.tw 21 package outline tssop-16pin unit: mm
at1731a preliminary product information dc-dc power ic for tft panel 7f, no.9,park avenue. ii, science-based indu strial park, hsinchu 300,taiwan, r.o.c. tel: 886-3-563-0878 fax: 886-3-563-0879 www: http://www.aimtron.com.tw 2/8/2006 rev:1.1 email: service@aimtron.com.tw 22 reflow profiles sn-pb eutectic assembly pb-free assembly profile feature large body pkg. thickness 2.5mm or pkg. volume 350mm 3 small body pkg. thickness <2.5mm or pkg. volume <350mm 3 large body pkg. thickness 2.5mm or pkg. volume 350mm 3 small body pkg. thickness 2.5mm or pkg. volume 350mm 3 average ramp-up rate (t l to t p ) 3 c/second max. 3 c/second max. preheat -temperature min(tsmin) -temperature max (tsmax) -time (min to max)(ts) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds ts m a x t o t l -ramp-up rate 3 c/second max. time maintained above: -temperature (t l ) -time (t l ) 183 c 60-150 seconds 217 c 60-150 seconds peak temperature(t p ) 225+0/-5 c 240+0/-5 c 245+0/-5 c 250+0/-5 c time within 5 c of actual peak temperature (t p ) 10-30 seconds 10-30 seconds 10-30 seconds 20-40 seconds ramp-down rate 6 c/second max. 3 c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. * all temperatures refer to topside of the package, measured on the package body surface.

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