frequency response (a v = +2v/v) features n unity-gain stable n high unity-gain bandwidth: 750mhz n ultra-low differential gain: 0.015% n very low differential phase: 0.025 n low power: 70mw n extremely fast slew rate: 1500v/ m s n high output current: 90ma n low noise: 3.5nv/ ? hz n dual 2.5v to 6v or single 5v to 12v supplies applications n professional video n graphics workstations n test equipment n video switching & routing n communications n medical imaging n a/d drivers n photo diode transimpedance amplifiers n improved replacement for clc420 or opa620 typical application 10mhz to 40mhz square and triangular wave generator pinout dip & soic general description the comlinear clc440 is a wideband, low-power, voltage feedback op amp that offers 750mhz unity-gain bandwidth, 1500v/ m s slew rate, and 90ma output current. for video applications, the clc440 sets new standards for voltage feedback monolithics by offering the impressive combination of 0.015% differential gain and 0.025 dif ferential phase errors while dissipating a mere 70mw. the clc440 incorporates the proven properties of comlinear s current feedback amplifiers (high bandwidth, fast slewing, etc.) into a ?lassical?voltage feedback architecture. this amplifier possesses truly differential and fully symmetrical inputs both having a high 900k w impedance with matched low input bias currents. furthermore, since the clc440 incorporates voltage feedback, a specific r f is not required for stability. this flexibility in choosing r f allows for numerous applications in wideband filtering and integration. unlike several other high-speed voltage feedback op amps, the clc440 operates with a wide range of dual or single supplies allowing for use in a multitude of applications with limited supply availability. the clc440 s low 3.5nv/ ? hz(e n ) and 2.5pa/ ? hz(i n ) noise sets a very low noise floor. comlinear clc440 high-speed, low-power, voltage feedback op amp n august 1996 comlinear clc440 high-speed, low-power, voltage feedback op amp generator waveforms 1996 national semiconductor corporation http://www.national.com printed in the u.s.a.
parameters conditions typ min/max ratings units notes ambient temperature clc440 +25 ? c +25 ? c 0 to 70 ? c -40 to 85 ? c frequency domain response -3db bandwidth a v =+2 v out < 0.2v pp 260 165 165 135 mhz b v out < 4.0v pp 190 150 135 130 mhz -3db bandwidth a v =+1 v out < 0.2v pp 750 mhz gain bandwidth product v out < 0.2v pp 230 mhz gain flatness v out < 2.0v pp dc to 75mhz 0.05 0.15 0.20 0.20 db linear phase deviation v out < 2.0v pp dc to 75mhz 0.8 1.2 1.5 1.5 deg differential gain 4.43mhz, r l =150 w 0.015 0.03 0.04 0.04 % differential phase 4.43mhz, r l =150 w 0.025 0.05 0.06 0.06 deg time domain response rise and fall time 2v step 1.5 2.0 2.2 2.5 ns 4v step 3.2 4.2 4.5 5.0 ns settling time to 0.05% 2v step 10 14 16 16 ns overshoot 4v step 7 13 13 13 % slew rate 4v step, 0.5v crossing 1500 900 750 600 v/ m s distortion and noise response 2nd harmonic distortion 2v pp , 5mhz -64 -59 -59 -59 dbc 2v pp , 20mhz -52 -46 -46 -46 dbc b 3rd harmonic distortion 2v pp , 5mhz -70 -65 -64 -64 dbc 2v pp , 20mhz -51 -45 -43 -43 dbc b equivalent input noise voltage >1mhz 3.5 4.5 5.0 5.0 nv/ hz current >1mhz 2.5 3.5 4.0 4.0 pa/ hz static dc performance input offset voltage 1.0 3.0 3.5 4.0 mv a average drift 5.0 10 10 m v/? input bias current 10 30 35 40 m aa average drift 30 50 60 na/? input offset current 0.5 2.0 2.0 3.0 m aa average drift 3.0 10 10 na/? power supply rejection ratio dc 65 58 58 58 db a common-mode rejection ratio dc 80 65 60 60 db supply current r l = 7.0 7.5 8.0 8.0 ma a miscellaneous performance input resistance common-mode 900 500 400 300 k w input capacitance common-mode 1.2 2.0 2.0 2.0 pf differential-mode 0.5 1.0 1.0 1.0 pf input voltage range common-mode 3.0 2.8 2.7 2.7 v output voltage range r l = 100 w 2.5 2.3 2.2 2.2 v output voltage range r l = 3.0 2.8 2.7 2.7 v output current 90 80 65 45 ma min/max ratings are based on product characterization and simulation. individual parameters are tested as noted. outgoing quality levels are determined from tested parameters. clc440 electrical characteristics (a v = +2, r f = r g = 250 w : v cc = + 5v, r l = 100 w unless specified) absolute maximum ratings voltage supply 6v i out is short circuit protected to ground common-mode input voltage vcc maximum junction temperature +175 ? c storage temperature range -65 ? c to +150 ? c lead temperature (soldering 10 sec) +300 ? c notes a) j-level: spec is 100% tested at +25 ? c, sample tested at +85 ? c. lc/mc-level: spec is 100% wafer probed at +25 ? c. b) j-level: spec is sample tested at +25 ? c. ordering information model temperature range description clc440ajp -40 ? c to +85 ? c 8-pin pdip CLC440AJE -40 ? c to +85 ? c 8-pin soic clc440alc -40 ? c to +85 ? c dice clc440a8b -55 ? c to +125 ? c 8-pin hermetic cerdip, mil-std-883 clc440amc -55 ? c to +125 ? c dice, mil-std-883 contact factory for smd number. package thermal resistance package q jc q ja plastic (ajp) 90 ? /w 105 ? /w surface mount (aje) 110 ? /w 130 ? /w cerdip 40 ? /w 130 ? /w http://www.national.com 2
clc440 typical performance characteristics (a v = +2, r f = 250 w : v cc = + 5v, r l = 100 w unless specified) non-inverting frequency response magnitude (1db/div) phase (deg) -180 -90 -135 -45 0 1 10 100 frequency (mhz) a v = 10 a v = 2 a v = 1 a v = 1(r f = 0) a v = 2 a v = 10 a v = 5 a v = 5 1000 gain phase inverting frequency response magnitude (1db/div) phase (deg) -360 -270 -315 -225 -180 1 10 100 frequency (mhz) a v -10 a v -1 a v -2 a v = -1 a v = -2 a v = -10 (rf = 500 w ) a v = -5 a v -5 1000 gain phase frequency response vs. load magnitude (1db/div) phase (deg) -180 -90 -135 -45 0 1 10 100 frequency (mhz) r l =1k r l =100 r l =1k r l =100 r l =50 r l =50 1000 gain phase frequency response vs. v out magnitude (1db/div) phase (deg) -180 -90 -135 -45 0 1 10 100 frequency (mhz) v out = 200mv pp 1000 gain phase v out = 2v pp v out = 5v pp v out = 5v pp v out = 200mv pp v out = 2v pp frequency response vs. capacitive load magnitude (1db/div) phase (deg) -180 -90 -135 -45 0 1 10 100 frequency (mhz) c l = 10pf r s = 50 1000 gain phase c l = 100pf r s = 30 c l = 1000pf r s = 5 c l = 1000pf c l = 100pf c l = 10pf + - r s 1k c l gain flatness and linear phase magnitude (0.05db/div) phase (1.0deg/div) 0 frequency (7.5mhz/div) 75 gain phase open loop gain and phase open loop gain (db) phase (deg) 1k frequency (hz) 100m gain phase 10k 100k 1m 10m 80 60 40 20 0 -20 0 -90 -180 -270 bw vs. gain for transimpedance configuration c f (pf) 100 1000 10000 r f 0 4 8 16 20 bandwidth (mhz) 400 320 240 80 0 12 160 c d = 1pf c d = 5pf c d = 20pf bw c f r f 1000 c f 1.6 bw 123 see dashed lines example equivalent input noise noise voltage (nv/ ? hz) frequency (hz) 10 1 1k 100 10k 100k 1m 10m noise current (pa/ ? hz) 10 1 voltage = 3.5nv/ ? hz current = 2.5pa/ ? hz 100m harmonic distortion vs. frequency distortion (dbc) frequency (mhz) -45 -55 -95 0.1 1 10 -75 -85 -65 3rd r l = 100 2nd r l = 1k 3rd r l = 1k 2nd r l = 100 50 v o = 2v pp 1db compression gain (1db/div) output power (p out ) -4 0 16 50mhz 100mhz 5mhz 20mhz 4812 + - 50 w 50 w p out 250 w 250 w input and output vswr vswr frequency (20mhz/div) 0 200 input output 1.0 1.4 1.8 2.2 40 80 120 160 + - 50 w output 50 w 250 w 50 w input psrr, cmrr, and closed loop r out psrr/cmrr (db) frequency (hz) 45 35 10k 100k 100m 15 25 100 80 40 0 60 5 1m 10m 20 cmrr r out psrr r out ( w ) differential gain and phase differential gain (%), phase (deg) number of 150 w loads 0.12 1 2 3 0.04 0 0.08 gain positive sync phase negative sync 4 gain negative sync phase positive sync 2-tone, 3rd order intermodulation intercept intercept point (+dbm) 1 10 100 frequency (mhz) 50 40 30 20 10 0 + - 50 w p out 250 w 250 w 50 w 3 http://www.national.com
general design equations the clc440 is a unity gain stable voltage feedback amplifier. the matched input bias currents track well over temperature. this allows the dc offset to be minimized by matching the impedance seen by both inputs. gain the non-inverting and inverting gain equations for the clc440 are as follows: non-inverting gain: inverting gain: gain bandwidth product the clc440 is a voltage feedback amplifier, whose closed-loop bandwidth is approximately equal to the gain-bandwidth product (gbp) divided by the gain (av). for gains greater than 5, av sets the closed-loop band- width of the clc440. closed loop bandwidth = gbp = 230mhz for gains less than 5, refer to the frequency response plots to determine maximum bandwidth. output drive and settling time performance the clc440 has large output current capability. the 90ma of output current makes the clc440 an excellent choice for applications such as: video line drivers distribution amplifiers when driving a capacitive load or coaxial cable, include a series resistance r s to back match or improve settling time. refer to the ?ettling time vs. capacitive load plot in the typical performance section to determine the recommended resistance for various capacitive loads. when driving resistive loads of under 500 w , settling time performance diminishes. this degradation occurs because a small change in voltage on the output causes a large change of current in the power supplies. this current creates ringing on the power supplies. a small resistor will dampen this effect if placed in series with the 6.8 m f bypass capacitor. noise figure noise figure (nf) is a measure of noise degradation caused by an amplifier. where, e ni = total equivalent input noise density due to the amplifier e t = thermal voltage noise ( seq ) clc440 typical performance characteristics (a v = +2, r f = 250 w : v cc = + 5v, r l = 100 w unless specified) i b and i os vs. common-mode voltage offset current, i os (5na/div ) bias current, i b (0.5 m a/div) common-mode input voltage (v) -4.0 -2.4 2.4 0 4.0 0 -0.8 0.8 i b l os -10 -20 10 20 2.0 1.0 -1.0 -2.0 application information pulse response output voltage (0.5v/div) time (5ns/div) 2.0 1.0 -1.0 -2.0 0 a v = +2 a v = -2 0.05% settling time vs. capacitive load settling time, t s (ns) to 0.05% 10 100 1000 load capacitance c l (pf) 80 60 40 20 0 recommended r s ( w ) 55 45 35 25 15 + - r s 1k c l r s t s short term settling time settling error % of output step time (ns) 0 20 80 0.1 100 40 60 0.2 0 -0.1 -0.2 long term settling time settling error % of output step time (s) 10 -9 10 -7 10 -1 0.1 10 0 10 -5 10 -3 0.2 0 -0.1 -0.2 10 -2 10 -4 10 -6 10 -8 1 r r f g + - r r f g gbp a v a rr r v f g g = + () nf 10log s/n s/n 10log e e ii oo ni 2 t 2 = ? ? ? ? = ? ? ? ? 4ktr typical dc errors vs. temperature input offset voltage, v io (mv) input bias, offset current, l b l os ( m a) temperature (c ) 0.4 0 -60 -20 100 -0.8 -1.6 -0.4 140 6 2 -6 -14 -2 -1.2 20 60 -10 l os l b v io http://www.national.com 4
figure 1 shows the noise model for the non-inverting amplifier configuration. the model includes all of the following noise sources: input voltage noise (e n ) input current noise (i n = i n+ = i n- ) thermal voltage noise (e t ) associated with each external resistor figure 1: non-inverting amplifier noise model the total equivalent input noise density is calculated by using the noise model shown. equations 1 and 2 represent the noise equation and the resulting equation for noise figure. equation 1: noise equation equation 2: noise figure equation the noise figure is related to the equivalent source resistance (r seq ) and the parallel combination of r f and r g. to minimize noise figure, the following steps are recommended: minimize r f iir g choose the optimum r s (r opt ) r opt is the point at which the nf curve reaches a minimum and is approximated by: figure 2 is a plot of nf vs r s with r f = 0, r g = (a v = +1). the nf curves for both unterminated and terminated systems are shown. the terminated curve assumes r s = r t . the table indicates the nf for various source resis- tances including r s = r opt . layout considerations a proper printed circuit layout is essential for achieving high frequency performance. comlinear provides evaluation boards for the clc440 (730055-dip, 730060- soic) and suggests their use as a guide for high frequency layout and as an aid in device testing and characterization. figure 2: noise figure vs. source resistance these boards were laid out for optimum, high-speed performance. the ground plane was removed near the input and output pins to reduce parasitic capacitance. and all trace lengths were minimized to reduce series inductances. supply bypassing is required for the amplifiers performance. the bypass capacitors provide a low impedance return current path at the supply pins. they also provide high frequency filtering on the power supply traces. 6.8 m f tantalum, 0.01 m f ceramic, and 500pf ceramic capacitors are recommended on both supplies. place the 6.8 m f capacitors within 0.75 inches of the power pins, and the 0.01 m f and 500pf capacitors less than 0.1 inches from the power pins. dip sockets add parasitic capacitance and inductance which can cause peaking in the frequency response and overshoot in the time domain response. if sockets are necessary, flush-mount socket pins are recommended. the device holes in the 730055 evaluation board are sized for cambion p/n 450-2598 socket pins, or their functional equivalent. transimpedance amplifier the low 2.5pa/ ? hz input current noise and unity gain stability make the clc440 an excellent choice for transimpedance applications. figure 3 illustrates a low noise transimpedance amplifier that is commonly implemented with photo diodes. r f sets the transimped- ance gain. the photo diode current multiplied by r f determines the output voltage. figure 3: transimpedance amplifier configuration r seq r f + - r g clc440 * i n+ * * e n i n- * * * 4ktr seq 4ktr f 4ktr g r seq = r s for unterminated systems r seq = r s ii r t for terminated systems noise figure vs. source resistance noise figure (db) source resistance ( w ) 10 100k unterminated terminated 10 15 20 25 100 1k 10k 5 0 r opt = 2800 w r opt = 1400 w r s ( w ) 50 r opt nf unterminated 12.03db 3.13db nf terminated 17.90db 6.15db applications circuits i in - + clc440 c d r f c f photo diode representation v out = -i in * r f v out e e i r r iir 4ktr 4kt r iir ni n 2 n 2 seq 2 f g 2 seq f g =+ + () ? ? ? ++ () nf 10log e i r r iir 4ktr 4kt r iir 4ktr n 2 n 2 seq 2 f g 2 seq f g seq = ++ () ? ? ? ++ () ? ? ? ? ? ? r e i opt n n @ 5 http://www.national.com
the capacitances are defined as: c in = internal input capacitance of the clc440 (typ 1.2pf) c d = equivalent diode capacitance c f = feedback capacitance the transimpedance plot in the typical performance section provides the recommended c f and expected bandwidth for different gains and diode capacitances. the feedback capacitances indicated on the plot give optimum gain flatness and stability. if a smaller capacitance is used, then peaking will occur. the frequency response shown in figure 4 illustrates the influence of the feedback capacitance on gain flatness. figure 4 the total input current noise density (i ni ) for the basic transimpedance configuration is shown in equation 3. the plot of current noise density versus feedback resistance is shown in figure 5. figure 5 equation 3: total equivalent input referred current noise density rectifier the large bandwidth of the clc440 allows for high speed rectification. a common rectifier topology is shown in figure 6. r 1 and r 2 set the gain of the rectifier. v out for a 5mhz, 2v pp sinusoidal input is shown in figure 7. figure 6: rectifier topology figure 7: rectifier output tunable low pass filter the center frequency of the low pass filter (lpf) can be adjusted by varying the clc522 gain control voltage, v g . figure 8: tunable low pass filter transimpedance amplifier
frequency response gain (db) frequency (hz) 10k 1m 40 60 100k 30 20 50 70 80 10m 100m 1g i in - + clc440 5 pf 1k c f 100 w c f = 0 c f = 1pf c f = 2pf c f = 5pf c f = 2.5pf current noise density vs.
feedback resistance current noise density (pa/ ? hz) feedback resistance (k w ) 0.1 10 i ni 10 15 20 25 1.0 5 0 30 35 40 i f i n e n r f (total) v in - + clc440 r 2 r 1 d 2 d 1 v out rectifier output v out (v) time (ns) 0 200 -1.2 -0.8 -0.4 0.4 100 -1.6 -2.0 0 0.8 1.2 2.0 300 400 500 1.6 qk rc rr cc 2 12 12 = ? ? ? ? v in - + clc440 r r 2 r t v out c 2 - + clc440 - + clc522 r 1 c 1 r in r g r a r f 20 w v g w o 1212 k rr cc = r v 1.8ma g in (max) = a k 1.85 r r v (max) f g == ii e r 4kt r ni n n 2 f 2 f =+ ? ? ? ? + http://www.national.com 6
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comlinear clc440 high-speed, low-power, voltage feedback op amp http://www.national.com 8 lit #150440-003 customer design applications support national semiconductor is committed to design excellence. for sales, literature and technical support, call the national semiconductor customer response group at 1-800-272-9959 or fax 1-800-737-7018 . life support policy national s products are not authorized for use as critical components in life support devices or systems without the express written approval of the president of national semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, a) are intended for surgical implant into the body, or b) support or sustain life, and whose failure to perform, when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 2. a critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. national semiconductor national semiconductor national semiconductor national semiconductor corporation europe hong kong ltd. japan ltd. 1111 west bardin road fax: (+49) 0-180-530 85 86 13th floor, straight block tel: 81-043-299-2309 arlington, tx 76017 e-mail: europe.support.nsc.com ocean centre, 5 canton road fax: 81-043-299-2408 tel: 1(800) 272-9959 deutsch tel: (+49) 0-180-530 85 85 tsimshatsui, kowloon fax: 1(800) 737-7018 english tel: (+49) 0-180-532 78 32 hong kong francais tel: (+49) 0-180-532 93 58 tel: (852) 2737-1600 italiano tel: (+49) 0-180-534 16 80 fax: (852) 2736-9960 national does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and national reserves the right at any time without notice to change said circuitry and specifications. n
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