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R7731 preliminary 1 ds7731-00pt00 january 2008 www.richtek.com general description the R7731 is a high-performance, low cost, low startup current, current mode pwm controller with burst triple- mode to support green mode power saving operation. the R7731 integrates functions of soft start, under voitage lockout (uvlo), leading edge blanking (leb), over temperature protection (otp), internal slope compensation. it provides the users a superior ac/dc power application of higher efficiency, low external component counts and lower cost solution. to protect the external power mosfet from being damaged by supply over voltage, the R7731 output driver is clamped at 12v. furthermore, R7731 features fruitful protections like olp (over load protection) ,ovp (over voltage protection) to eliminate the external protection circuits and provide reliable operation. R7731 is available in sot-23-6 and dip-8 packages. burst triple-mode pwm flyback controller features z z z z z very low start-up current (<30ua) z z z z z 10/14v uvlo z z z z z soft start function z z z z z current mode control z z z z z internal leading-edge blanking z z z z z built-in slope compensation z z z z z burst triple-mode pwm for green-mode z z z z z cycle-by-cycle current limiting z z z z z feedback open protection z z z z z output over voltage protection z z z z z over temperature protection z z z z z over load protection z z z z z soft driving for reducing emi z z z z z high noise immunity z z z z z opto coupler short protection z z z z z rohs compliant and 100% lead (pb)-free applications z adaptor and battery charger z atx standby power z set top boxes (stb) z dvd and cd(r) z tv/monitor standby power z pc peripherals typical application circuit vo+ rt comp gnd vdd gate cs R7731 ac mains (90v to 265v) vo- www.datasheet.co.kr datasheet pdf - http://www..net/
R7731 preliminary 2 ds7731-00pt00 january 2008 www.richtek.com pin configurations (top view) note : there is no pin1 indicator on top mark for sot-23-6 type, and pin 1 will be lower left pin when reading top mark from left to right. ordering information note : richtek pb-free and green products are : ` rohs compliant and compatible with the current requirements of ipc/jedec j-std-020. ` suitable for use in snpb or pb-free soldering processes. ` 100% matte tin (sn) plating. marking information for marking information, contact our sales representative directly or through a richtek distributor located in your area, otherwise visit our website for detail. sot-23-6 gnd 4 23 5 6 1 comp rt cs vdd gate dip-8 6 7 8 4 5 23 gate vdd nc cs rt nc comp gnd R7731 package type e : sot-23-6 n : dip-8 operating temperature range p : pb free with commercial standard g : green (halogen free with commer- cial standard) www.datasheet.co.kr datasheet pdf - http://www..net/
R7731 preliminary 3 ds7731-00pt00 january 2008 www.richtek.com function block diagram pin no. sot-23-6 dip8 pin name pin function 1 8 gnd ground. 2 7 comp comparator input pin. by connecting a photo-coupler to this pin, the peak current set point is adjusted accordingly to the output power requirement. 3 5 rt set the switching frequency by connecting a resistor to gnd. 4 4 cs primary current sense pin. 5 2 vdd ic power supply pin. 6 1 gate gate driver output to drive the external mosfet. -- 3, 6 nc no internal connection. functional pin description leb vdd r s q otp ss x3 slope ramp burst triple mode comp v burl v burh v dd pwm comparator counter shutdown logic comp open sensing brown out sensing dmax oscillator por 27v bias & bandgap uvlo ovp rt gate gnd cs comp 14v/10v olp constant power soft driver + - + - + - - www.datasheet.co.kr datasheet pdf - http://www..net/
R7731 preliminary 4 ds7731-00pt00 january 2008 www.richtek.com electrical characteristics parameter symbol conditions min typ max unit v dd section v dd over voltage protection level v ovp 25.5 27 28.5 v on threshold voltage v th_on 13 14 15 v v dd on/off hysteresis v dd_hys 3 4 5 v start-up current i dd-st v dd = v th_on ? 0.1v -- 20 30 ua operating current i dd-op v dd = 15v, r t = 100k , gate = open, v comp = 2.5v -- 1.1 2.2 ma v dd hold-up mode hysteresis ending level v dd_hys v comp < 1.6v -- 11.5 -- v v dd hold-up mode entry level v dd_low v comp < 1.6v -- 11 -- v v dd clamp voltage v dd_clamp -- 29 -- v oscillator section (rt pin) normal pwm frequency f osc r t = 100k 60 65 70 khz frequency jittering range -- 4 -- % maximum duty cycle d max 70 75 80 % to be continued recommended operating conditions (note 3) z supply input voltage, v dd ------------------------------------------------------------------------------------------- 12v to 25v z operating frequency ------------------------------------------------------------------------------------------------- 50k to 130khz z junction temperature range ---------------------------------------------------------------------------------------- ? 40 c to 125 c z ambient temperature range ---------------------------------------------------------------------------------------- ? 40 c to 85 c absolute maximum ratings (note 1) z supply input voltage, v dd ------------------------------------------------------------------------------------------- 30v z gate pin ---------------------------------------------------------------------------------------------------------------- 20v z fb, rt, comp, cs pin ---------------------------------------------------------------------------------------------- 6.5v z i dd ------------------------------------------------------------------------------------------------------------------------- 10ma z power dissipation, p d @ t a = 25 c sot-23-6 ---------------------------------------------------------------------------------------------------------------- 0.4w dip-8 --------------------------------------------------------------------------------------------------------------------- 0.714w z package thermal resistance (note 4) z sot-23-6, ja ----------------------------------------------------------------------------------------------------------- 250 c/w z dip-8, ja ---------------------------------------------------------------------------------------------------------------- 140 c/w z junction temperature ------------------------------------------------------------------------------------------------- 150 c z lead temperature (soldering, 10 se c.) --------------------------------------------------------------------------- 260 c z storage temperature range ---------------------------------------------------------------------------------------- ? 65 c to 150 c z esd susceptibility (note 2) hbm (human body mode) ------------------------------------------------------------------------------------------ 3kv mm (ma chine mode) -------------------------------------------------------------------------------------------------- 250v (v dd = 15v, r t = 100k , t a = 25 c, unless otherwise specified) www.datasheet.co.kr datasheet pdf - http://www..net/
R7731 preliminary 5 ds7731-00pt00 january 2008 www.richtek.com note 1. stresses beyond those listed under ? absolute maximum ratings ? may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. note 2. devices are esd sensitive. handling precaution recommended. the human body model is a 100pf capacitor discharged through a 1.5k resistor into each pin. note 3. the device is not guaranteed to function outside its operating conditions. note 4. ja is measured in the natural convection at t a = 25 c on a low effective single layer thermal conductivity test board of jedec 51-3 thermal measurement standard. note 5. guaranteed by design. parameter symbol conditions min typ max unit frequency variation versus vdd deviation f dv v vdd = 12v to 25v -- -- 2 % frequency variation versus temperature deviation f dv t a = ? 30 c to 105 c (note 5) -- -- 5 % comp input section open loop voltage v comp-op comp pin open 5 5.5 6 v comp open-loop protection delay cycles t olp r t = 100k -- 29 -- ms short circuit comp current i zero v comp = 0v -- 1.2 2.2 ma current-sense section peak current limitation v csth 0.65 0.7 0.75 v leading edge blanking time t leb -- 420 520 ns propagation delay time t pd -- 100 -- ns gate section rising time t r v dd = 15v, c l = 1nf -- 250 350 ns falling time t f v dd = 15v, c l = 1nf -- 150 250 ns gate output clamping voltage v clamp v dd = 22v -- 12 -- v over temperature protection t otp -- 140 -- c otp hysteresis t otp_hys -- 30 -- c www.datasheet.co.kr datasheet pdf - http://www..net/
R7731 preliminary 6 ds7731-00pt00 january 2008 www.richtek.com i dd-op vs. temperature 1.25 1.30 1.35 1.40 1.45 1.50 1.55 -40 -15 10 35 60 85 110 135 temperature i dd-op (ma) i dd-st vs. temperature 10 12 14 16 18 20 22 24 26 28 -40 -15 10 35 60 85 110 135 temperature i dd-st (ua) v th vs. temperature 9 10 11 12 13 14 15 -40 -25 -10 5 20 35 50 65 80 95 110 125 temperature v dd (v) typical operating characteristics ( c) ( c) v th_on v th_off d max vs. temperature 70 71 72 73 74 75 76 77 78 79 80 -40 -20 0 20 40 60 80 100 120 temperature d max (%) ( c) v comp = 2v, c l = 1nf v comp vs. temperature 5.15 5.20 5.25 5.30 5.35 5.40 5.45 5.50 -40 -20 0 20 40 60 80 100 120 temperature v comp (v) ( c) comp open voltage v dd = 13v v dd = 11v v dd = 27v v dd = 15v ( c) f osc vs. temperature 57 58 59 60 61 62 63 -40 -15 10 35 60 85 110 135 temperature f osc (khz) ( c) v dd = 11v v dd = 27v v dd = 15v www.datasheet.co.kr datasheet pdf - http://www..net/
R7731 preliminary 7 ds7731-00pt00 january 2008 www.richtek.com v oh vs. v dd 7 8 9 10 11 12 13 11 12 13 14 15 16 17 18 19 20 21 22 v dd (v) v oh (v) i source = 20ma i supply vs. temperature 0.30 0.35 0.40 0.45 0.50 -40 -20 0 20 40 60 80 100 120 temperature i supply (ma) ( c) comp open no gate output i supply = i dd-op ? i comp v ol vs. v dd 400 425 450 475 500 525 550 575 600 11 12 13 14 15 16 17 18 19 20 21 22 v dd (v) v ol (mv) i sink = 20ma i supply vs. v dd 0.408 0.410 0.412 0.414 0.416 0.418 0.420 0.422 0.424 0.426 11 12 13 14 15 16 17 18 19 20 21 22 v dd (v) i supply (ma) v comp open no gate output i supply = i dd-op ? i comp clamp voltage vs. temperature 10.0 10.5 11.0 11.5 12.0 12.5 13.0 -40 -15 10 35 60 85 110 135 temperature voltage (v) gate (rising/falling) vs. temperature 0 50 100 150 200 250 300 350 -40 -25 -10 5 20 35 50 65 80 95 110 125 temperature gate (ns) v dd = 20v, c l = 1nf ( c) v dd = 20v, c l = 1nf ( c) rising falling www.datasheet.co.kr datasheet pdf - http://www..net/
R7731 preliminary 8 ds7731-00pt00 january 2008 www.richtek.com gate driver a totem pole gate driver is fine tuned to meet both emi and efficiency requirement in low power application. an internal pull low circuit is activated after pretty low vdd to prevent external mosfet from accidentally turning on during uvlo. application information uvlo under voltage lockout (uvlo) block is to ensure vdd has reached proper operation voltage before we enable the whole ic blocks. to provide better temperature coefficient and precise uvlo threshold voltage, the reference voltage of hysteresis voltage (10v / 14v ) is from band-gap block directly. by this way, R7731 can operate more reliable in different environments. figure 1. competitor v cs v out v cs (500mv/div) v out (2v/div) figure 2. R7731 v cs v out v cs (500mv/div) v out (2v/div) oscillator to guarantee precise frequency, it is trimmed to 5% tolerance. it also generates slope compensation saw-tooth, 75% maximum duty cycle pulse and overload protection slope. by adjusting resistor of rt pin accor ding to the following formula : it can typically operate between 50khz to 130khz. note that rt pin can ? t be short or open otherwise oscillator will not operate. built-in slope compensation to reduce component count, slope compensation is implemented by internal built-in saw-tooth. since it ? s built- in, it ? s compromised between loop gain and sub-harmonic reduction. in general design, it can cancel sub-harmonic to 90vac. leading edge blanking (leb) mosfet coss, secondary rectifier reverse recovery current and gate driver sourcing current comprise initial current spike. the spike will seriously disturb current mode operation especially at light load and high line. R7731 provides built-in 420ns leb to guarantee proper operation in diverse design. noise immunity current mode controller is very sensitive to noise. R7731 takes the advantages of richtek long term experience in designing high noise immunity current mode circuit and layout. also, we amplify current sense signal to compare with feedback signal instead of dividing feedback signal. all the effort is to provide clean and reliable current mode operation. osc t 6500 f (khz) = r (k ) soft start during initial power on, especially at high line, current spike is kind of unlimited by current limit. therefore, besides cycle-by-cycle current limiting, R7731 still provides soft start function. it effectively suppresses the start up current spike. as shown in the figure 1 and figure 2, the start up v cs is about 0.3v lower than competitor. again, this will provide more reliable operation and possibility to use smaller current rating power mosfet. www.datasheet.co.kr datasheet pdf - http://www..net/
R7731 preliminary 9 ds7731-00pt00 january 2008 www.richtek.com protection R7731 provides fruitful protection functions that intend to protect system from being damaged. all the protection function can be listed as below: z z z z z cycle-by-cycle current limiting : this is a basic but very useful function and it can be implemented easily in current mode controller. z z z z z overload protection : long time cycle-by-cycle current limiting will lead to system thermal stress. to further protect system, system will be shutdown after about 2048 clo ck cycles. it ? s about 30ms delay in 67khz operation. after shutdown, system will resume and behave as hiccup. by proper startup resistor design, thermal will be averaged to an acceptable level over the on/off cycle of ic. this will last until fault is removed. z z z z z brownout protection : during heavy load, this will trigger 30ms protection and shutdown the system. if it ? s in light load condition, system will be shutdown after vdd is running low and triggers uvlo. z z z z z ovp : output voltage can be roughly sensed by vdd pin. if the sensed voltage reaches 27v threshold, system will be shutdown after 20us deglitch delay. z z z z z feedback open and opto coupler short : this will trigger ovp or 30ms delay protection. it depends on which one occurs first. z z z z z otp : internal 110/140 c hysteresis comparator will provide over temperature protection (otp). otp will not shutdown system. it stops the system from switching until the temperature is under 110 c. meanwhile, if vdd touches vdd turn off threshold voltage, system will hiccup. figure 3. burst triple-mode load vdd light load normal operation no load v comp v gate v burh v burl (vdd holdup mode) v dd_high v dd_low burst triple-mode to fulfill green mode requirement, there are 3 operation modes in R7731. please also refer to figure. 3 for details. z z z z z pwm mode : for most of load condition, the circuit will run at traditional pwm current mode. z z z z z burst mode : during light load, switching loss will dominate the power efficien cy calculation. this mode is to cut switching loss. as shown in figure 3, when the output load gets light, feedback signal drops and touches v burl . clock signal will be blanked and system ceases to switching. after v out drops and feedback signal goes back to v burh , switching will be resumed. burst mode so far is widely used in low power application because it ? s simple, reliable and will not have any patent infringement issue. z z z z z vdd holdup mode : when the vdd drops down to vdd turn off threshold voltage, the system will be shutdown. during shutdown period, controller does nothing to any load change and might cause v out down. to avoid this, when vdd drops to a setting threshold, 11v, the hysteresis comparator will bypass pwm and burst mode loop and force switching at a very lo w level to supply energy to vdd. www.datasheet.co.kr datasheet pdf - http://www..net/
R7731 preliminary 10 ds7731-00pt00 january 2008 www.richtek.com outline dimension a a1 e b b d c h l sot-23-6 surface mount package dimensions in millimeters dimensions in inches symbol min max min max a 0.889 1.295 0.031 0.051 a1 0.000 0.152 0.000 0.006 b 1.397 1.803 0.055 0.071 b 0.250 0.560 0.010 0.022 c 2.591 2.997 0.102 0.118 d 2.692 3.099 0.106 0.122 e 0.838 1.041 0.033 0.041 h 0.080 0.254 0.003 0.010 l 0.300 0.610 0.012 0.024 www.datasheet.co.kr datasheet pdf - http://www..net/
R7731 preliminary 11 ds7731-00pt00 january 2008 www.richtek.com richtek technology corporation headquarter 5f, no. 20, taiyuen street, chupei city hsinchu, taiwan, r.o.c. tel: (8863)5526789 fax: (8863)5526611 richtek technology corporation taipei office (marketing) 8f, no. 137, lane 235, paochiao road, hsintien city taipei county, taiwan, r.o.c. tel: (8862)89191466 fax: (8862)89191465 email: marketing@richtek.com j a b e c i d l f 8-lead dip plastic package dimensions in millimeters dimensions in inches symbol min max min max a 9.068 9.627 0.357 0.379 b 6.198 6.604 0.244 0.260 c 3.556 4.318 0.140 0.170 d 0.356 0.559 0.014 0.022 e 1.397 1.651 0.055 0.065 f 2.337 2.743 0.092 0.108 i 3.048 3.556 0.120 0.140 j 7.366 8.255 0.290 0.325 l 0.381 0.015 www.datasheet.co.kr datasheet pdf - http://www..net/

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