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  16-bit buffers/line drivers sccs028a - december 1987 - revised march 2001 data sheet acquired from cypress semiconductor corporation. data sheet modi?d to remove devices not offered. cy74fct16244t cy74fct162244t cy74fct162h244t copyright 2001, texas instruments incorporated 1cy74fct16444t/2 h244t features power-off disable outputs permits live insertion edge-rate control circuitry for signi?antly improved noise characteristics typical output skew < 250 ps esd > 2000v tssop (19.6-mil pitch) and ssop (25-mil pitch) packages industrial temperature range of ?0?c to +85?c v cc = 5v 10% cy74fct16244t features: 64 ma sink current, 32 ma source current typical v olp (ground bounce) <1.0v at v cc = 5v, t a = 25?c cy74fct162244t features: balanced output drivers: 24 ma reduced system switching noise typical v olp (ground bounce) <0.6v at v cc = 5v, t a = 25?c cy74fct162h244t features: bus hold on data inputs eliminates the need for external pull-up or pull-down resistors functional description these 16-bit buffers/line drivers are designed for use in memory driver, clock driver, or other bus interface applications, where high-speed and low power are required. with ?w-through pinout and small shrink packaging board layout is simpli?d. the three-state controls are designed to allow 4-bit, 8-bit or combined 16-bit operation. the outputs are de- signed with a power-off disable feature to allow for live insertion of boards. the cy74fct16244t is ideally suited for driving high-capacitance loads and low-impedance backplanes. the cy74fct162244t has 24-ma balanced output drivers with current limiting resistors in the outputs. this reduces the need for external terminating resistors and provides for mini- mal undershoot and reduced ground bounce. the cy74fct162244t is ideal for driving transmission lines. the cy74fct162h244t is a 24-ma balanced output part that has ?us hold on the data inputs. the device retains the in- puts last state whenever the input goes to high impedance. this eliminates the need for pull-up/down resistors and pre- vents ?ating inputs. gnd logic block diagrams cy74fct16244t, cy74fct162244t, cy74fct162h244t pin configuration 1 2 3 4 5 6 7 8 9 10 11 12 33 32 31 30 29 25 26 27 28 36 35 1 oe 34 ssop/tssop top view 1 y 1 1 y 2 1 y 3 1 y 4 13 14 15 16 17 18 19 20 21 22 23 24 45 44 43 42 41 37 38 39 40 48 47 46 1 a 1 1 a 2 1 a 3 1 a 4 1 oe 2 y 1 2 y 2 2 y 3 2 y 4 2 a 1 2 a 2 2 a 3 2 a 4 2 oe 1 y 1 1 y 2 1 y 3 1 y 4 1 a 1 1 a 2 1 a 3 1 a 4 2 oe gnd gnd v cc 2 y 3 2 y 4 2 y 1 2 y 2 2 a 1 2 a 2 2 a 3 2 a 4 v cc gnd gnd 3 y 3 3 y 4 3 y 1 3 y 2 3 a 1 3 a 2 3 a 3 3 a 4 gnd gnd v cc 4 y 3 4 y 4 4 y 1 4 y 2 4 a 1 4 a 2 4 a 3 4 a 4 v cc gnd 4 oe 3 oe 3 y 1 3 y 2 3 y 3 3 y 4 3 a 1 3 a 2 3 a 3 3 a 4 3 oe 4 y 1 4 y 2 4 y 3 4 y 4 4 a 1 4 a 2 4 a 3 4 a 4 4 oe fct16244? fct16244? fct16244? fct16244? fct16244? 16244t 162244t 162h244t
cy74fct16244t cy74fct162244t cy74fct162h244t 2 maximum ratings [3,4] (above which the useful life may be impaired. for user guidelines, not tested.) storage temperature ................................. ?5 c to +125 c ambient temperature with power applied............................................. ?5 c to +125 c dc input voltage ........................................... ?.5v to +7.0v dc output voltage......................................... ?.5v to +7.0v dc output current (maximum sink current/pin) ........................?0 to +120 ma power dissipation .......................................................... 1.0w static discharge voltage............................................>2001v (per mil-std-883, method 3015) notes: 1. on cy74fct162h244t these pins have ?us hold. 2. h = high voltage level. l = low voltage level. x = don? care. z = high importance. 3. operation beyond the limits set forth may impair the useful life of the device. unless otherwise noted, these limits are over the operating free-air temperature range. 4. unused inputs must always be connected to an appropriate logic voltage level, preferably either v cc or ground. pin description name description oe three-state output enable inputs (active low) a data inputs [1] y three-state outputs function table [2] inputs outputs oe a y l l l l h h h x z ordering range range ambient temperature v cc industrial ?40 c to +85 c 5v 10% electrical characteristics over the operating range parameter description test conditions min. typ. [5] max. unit v ih input high voltage 2.0 v v il input low voltage 0.8 v v h input hysteresis [6] 100 mv v ik input clamp diode voltage v cc =min., i in =?8 ma ?.7 ?.2 v i ih input high current standard v cc =max., v i =v cc 1 a bus hold 100 i il input low current standard v cc =max., v i =gnd 1 a bus hold 100 a i bbh i bbl bus hold sustain current on bus hold input [7] v cc =min. v i =2.0v ?0 a v i =0.8v +50 i bhho i bhlo bus hold overdrive current on bus hold input [7] v cc =max., v i =1.5v tbd ma i ozh high impedance output current (three-state output pins) v cc =max., v out =2.7v 1 a i ozl high impedance output current (three-state output pins) v cc =max., v out =0.5v 1 a i os short circuit current [8] v cc =max., v out =gnd ?0 ?40 ?00 ma i o output drive current [8] v cc =max., v out =2.5v ?0 ?80 ma i off power-off disable v cc =0v, v out 4.5v [9] 1 a
cy74fct16244t cy74fct162244t cy74fct162h244t 3 output drive characteristics for cy74fct16244t parameter description test conditions min. typ. [5] max. unit v oh output high voltage v cc =min., i oh =? ma 2.5 3.5 v v cc =min., i oh =?5 ma 2.4 3.5 v v cc =min., i oh =?2 ma 2.0 3.0 v v ol output low voltage v cc =min., i ol =64 ma 0.2 0.55 v output drive characteristics for cy74fct162244t, cy74fct162h244t parameter description test conditions min. typ. [5] max. unit i odl output low current [8] v cc =5v, v in =v ih or v il , v out =1.5v 60 115 150 ma i odh output high current [8] v cc =5v, v in =v ih or v il , v out =1.5v ?0 ?15 ?50 ma v oh output high voltage v cc =min., i oh =?4 ma 2.4 3.3 v v ol output low voltage v cc =min., i ol =24 ma 0.3 0.55 v notes: 5. typical values are at v cc =5.0v, t a = +25?c ambient. 6. this parameter is speci?d but not tested. 7. pins with bus hold are described in pin description. 8. not more than one output should be shorted at a time. duration of short should not exceed one second. the use of high-speed test apparatus and/or sampl e and hold techniques are preferable in order to minimize internal chip heating and more accurately re?ct operational values. ot herwise prolonged shorting of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. in any sequence of param eter tests, i os tests should be performed last. 9. tested at +25?c.
cy74fct16244t cy74fct162244t cy74fct162h244t 4 capacitance [6] (t a = +25?c, f = 1.0 mhz) parameter description test conditions typ. [5] max. unit c in input capacitance v in = 0v 4.5 6.0 pf c out output capacitance v out = 0v 5.5 8.0 pf power supply characteristics parameter description test conditions typ. [5] max. unit i cc quiescent power supply current v cc =max. v in 0.2v, v in v cc -0.2v 5 500 a ? i cc quiescent power supply current (ttl inputs high) v cc =max. v in =3.4v [10] 0.5 1.5 ma i ccd dynamic power supply current [11] v cc =max., one input toggling, 50% duty cycle, outputs open, oe=gnd v in =v cc or v in =gnd 60 100 a/mhz i c total power supply current [12] v cc =max., f 1 =10 mhz, 50% duty cycle, outputs open, one bit toggling, oe=gnd v in =v cc or v in =gnd 0.6 1.5 ma v in =3.4v or v in =gnd 0.9 2.3 ma v cc =max., f 1 =2.5 mhz, 50% duty cycle, outputs open, six- teen bits toggling, oe=gnd v in =v cc or v in =gnd 2.4 4.5 [13] ma v in =3.4v or v in =gnd 6.4 16.5 [13] ma notes: 10. per ttl driven input (v in = 3.4v); all other inputs at v cc or gnd. 11. this parameter is not directly testable, but is derived for use in total power supply calculations. 12. i c =i quiescent + i inputs + i dynamic i c =i cc + ? i cc d h n t +i ccd (f 0 /2 + f 1 n 1 ) i cc = quiescent current with cmos input levels i cc = power supply current for a ttl high input (v in =3.4v) d h = duty cycle for ttl inputs high n t = number of ttl inputs at d h i ccd = dynamic current caused by an input transition pair (hlh or lhl) f 0 = clock frequency for registered devices, otherwise zero f 1 = input signal frequency n 1 = number of inputs changing at f 1 all currents are in milliamps and all frequencies are in megahertz. 13. values for these conditions are examples of the i cc formula. these limits are speci?d but not tested.
cy74fct16244t cy74fct162244t cy74fct162h244t 5 s switching characteristics over the operating range [14] parameter description cy74fct16244t cy74fct162244t cy74fct16244at cy74fct162244at cy74fct162h244at min. max. min. max. unit fig. no. [15] t plh t phl propagation delay data to output 1.5 6.5 1.5 4.8 ns 1, 3 t pzh t pzl output enable time 1.5 8.0 1.5 6.2 ns 1, 7, 8 t phz t plz output disable time 1.5 7.0 1.5 5.6 ns 1, 7, 8 t sk(o) output skew [16] 0.5 0.5 ns switching characteristics over the operating range [14] (continued) parameter description cy74fct16244ct cy74fct162244ct cy74fct162h244ct min. max. unit fig. no. [15] t plh t phl propagation delay data to output 1.5 4.1 ns 1, 3 t pzh t pzl output enable time 1.5 5.8 ns 1, 7, 8 t phz t plz output disable time 1.5 5.2 ns 1, 7, 8 t sk(o) output skew [16] 0.5 ns notes: 14. minimum limits are speci?d but not tested on propagation delays. 15. see ?arameter measurement information?in the general information section. 16. skew between any two outputs of the same package switching in the same direction. this parameter is ensured by design.
cy74fct16244t cy74fct162244t cy74fct162h244t 6 document #: 38-00396-c ordering information cy74fct16244 speed (ns) ordering code package name package type operating range 4.1 cy74fct16244ctpact z48 48-lead (240-mil) tssop industrial CY74FCT16244CTPVC/pvct o48 48-lead (300-mil) ssop 4.8 cy74fct16244atpact z48 48-lead (240-mil) tssop industrial cy74fct16244atpvc/pvct o48 48-lead (300-mil) ssop 6.5 cy74fct16244tpact z48 48-lead (240-mil) tssop industrial cy74fct16244tpvc/pvct o48 48-lead (300-mil) ssop ordering information cy74fct162244 speed (ns) ordering code package name package type operating range 4.1 74fct162244ctpact z48 48-lead (240-mil) tssop industrial cy74fct162244ctpvc o48 48-lead (300-mil) ssop 74fct162244ctpvct o48 48-lead (300-mil) ssop 4.8 74fct162244atpact z48 48-lead (240-mil) tssop industrial cy74fct162244atpvc o48 48-lead (300-mil) ssop 74fct162244atpvct o48 48-lead (300-mil) ssop 6.5 cy74fct162244tpact z48 48-lead (240-mil) tssop industrial cy74fct162244tpvc/pvct o48 48-lead (300-mil) ssop ordering information cy74fct162h244 speed (ns) ordering code package name package type operating range 4.1 74fct162h244ctpvc/pvct o48 48-lead (300-mil) ssop industrial 4.8 74fct162h244atpact z48 48-lead (240-mil) tssop industrial
cy74fct16244t cy74fct162244t cy74fct162h244t 7 package diagrams 48-lead shrunk small outline package o48 48-lead thin shrunk smalloutline package z48
important notice texas instruments and its subsidiaries (ti) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. all products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, patent infringement, and limitation of liability. ti warrants performance of its products to the specifications applicable at the time of sale in accordance with ti s standard warranty. testing and other quality control techniques are utilized to the extent ti deems necessary to support this warranty. specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. customers are responsible for their applications using ti components. in order to minimize risks associated with the customer s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. ti assumes no liability for applications assistance or customer product design. ti does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of ti covering or relating to any combination, machine, or process in which such products or services might be or are used. ti s publication of information regarding any third party s products or services does not constitute ti s approval, license, warranty or endorsement thereof. reproduction of information in ti data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations and notices. representation or reproduction of this information with alteration voids all warranties provided for an associated ti product or service, is an unfair and deceptive business practice, and ti is not responsible nor liable for any such use. resale of ti s products or services with statements different from or beyond the parameters stated by ti for that product or service voids all express and any implied warranties for the associated ti product or service, is an unfair and deceptive business practice, and ti is not responsible nor liable for any such use. also see: standard terms and conditions of sale for semiconductor products. www.ti.com/sc/docs/stdterms.htm mailing address: texas instruments post office box 655303 dallas, texas 75265 copyright ? 2001, texas instruments incorporated


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