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d a t a sh eet product speci?cation supersedes data of 2005 jan 25 2005 mar 09 integrated circuits SAA5360; saa5361 multi page intelligent teletext decoder
2005 mar 09 2 philips semiconductors product speci?cation multi page intelligent teletext decoder SAA5360; saa5361 contents 1 features 2 general description 3 quick reference data 4 ordering information 5 block diagram 6 pinning 6.1 type SAA5360 6.2 type saa5361 7 commands and character sets 7.1 high-level command interface 7.2 character sets 8 limiting values 9 thermal characteristics 10 quality and reliability 11 characteristics 12 application information 12.1 emc guidelines 12.2 application diagram 12.3 application notes 12.3.1 external data memory access 12.3.2 symbol explanations 13 package outline 14 soldering 14.1 introduction to soldering surface mount packages 14.2 reflow soldering 14.3 wave soldering 14.4 manual soldering 14.5 suitability of surface mount ic packages for wave and reflow soldering methods 15 data sheet status 16 definitions 17 disclaimers 18 purchase of philips i 2 c components
2005 mar 09 3 philips semiconductors product speci?cation multi page intelligent teletext decoder SAA5360; saa5361 1 features support for 50 or 60 and 100 or 120 hz and progressive scan display modes complete 625 line teletext decoder in one chip reduces printed-circuit board area and cost automatic detection of transmitted fastext links or service information (packet 8/30) on-screen display (osd) for user interface menus using teletext and dedicated menu icons video programming system (vps) decoding wide screen signalling (wss) decoding SAA5360 supports pan-european, arabic and iranian character sets saa5361 supports pan-european, cyrillic, greek and arabic character sets high-level command interface via i 2 c-bus gives easy control with a low software overhead high-level command interface is backward compatible to stand-alone fastext and remote interface (safari) 625 and 525 line display rgb interface to standard colour decoder ics; current source versatile 8-bit open-drain input/output (i/o) expander; 5 v tolerant single 12 mhz crystal oscillator single power supply: from 3.0 v to 3.6 v operating temperature: - 20 to +70 c automatic detection of transmitted pages to be selected by page up and page down 8 page fastext decoder table of pages (top) decoder with basic top table (btt) and additional information tables (aits) 4 page user-defined list mode. 2 general description the SAA5360; saa5361 is a single-chip multi page 625 line world system teletext decoder with a high-level command interface, and is safari compatible. the device is designed to minimize the overall system cost, due to the high-level command interface offering the benefit of a low software overhead in the tv microcontroller. the SAA5360 incorporates the following functions: 10 page teletext decoder with osd, fastext, top, default and list acquisition modes automatic channel installation support. the functionality of the saa5361 is similar to the SAA5360, but offers the capability to store up to 250 additional pages of teletext in an external sram. 3 quick reference data note 1. periphery supply current is dependent on external components and i/o voltage levels. symbol parameter conditions min. typ. max. unit v dd all supply voltages referenced to v ss 3.0 3.3 3.6 v i ddp periphery supply current note 1 1 -- ma i ddc core supply current normal mode - 15 18 ma idle mode - 4.6 6 ma i dda analog supply current normal mode - 45 48 ma idle mode - 0.87 1 ma f xtal(nom) nominal crystal frequency fundamental mode - 12 - mhz t amb ambient temperature - 20 - +70 c t stg storage temperature - 55 - +125 c
2005 mar 09 4 philips semiconductors product speci?cation multi page intelligent teletext decoder SAA5360; saa5361 4 ordering information 5 block diagram type number package name description version SAA5360hl lqfp100 plastic low pro?le quad ?at package; 100 leads; body 14 14 1.4 mm sot407-1 saa5361hl lqfp100 plastic low pro?le quad ?at package; 100 leads; body 14 14 1.4 mm sot407-1 mhc633 microcontroller (80c51) sram 256-byte rom (128 or 192-kbyte) memory interface display r g b vds hsync vsync cvbs data capture dram (14-kbyte) tv control and interface i 2 c-bus, general i/o display timing cvbs data capture timing SAA5360 saa5361 fig.1 block diagram.
2005 mar 09 5 philips semiconductors product speci?cation multi page intelligent teletext decoder SAA5360; saa5361 6 pinning 6.1 type SAA5360 symbol pin type description p2_7/pwm6 1 i/o programmable bidirectional port 2: bit 7 or output bit 6 of the 7-bit pwm p3_0/adc0 2 i/o programmable bidirectional port 3: bit 0 or input 0 for the software adc facility n.c. 3 - not connected p3_1/adc1 4 i/o programmable bidirectional port 3: bit 1 or input 1 for the software adc facility p3_2/adc2 5 i/o programmable bidirectional port 3: bit 2 or input 2 for the software adc facility p3_3/adc3 6 i/o programmable bidirectional port 3: bit 3 or input 3 for the software adc facility n.c. 7 - not connected n.c. 8 - not connected n.c. 9 - not connected n.c. 10 - not connected v ssc 11 - core ground v ssp 12 - periphery ground p0_5 13 i/o 8 ma current sinking output for direct drive of led n.c. 14 - not connected n.c. 15 - not connected scl_nvram 16 i i 2 c-bus serial clock input to non-volatile ram sda_nvram 17 i/o i 2 c-bus serial data input and output of non-volatile ram p0_2 18 i/o programmable bidirectional port 0: bit 2 n.c. 19 - not connected n.c. 20 - not connected vpe 21 i otp programming voltage input; connect to ground p0_3 22 i/o programmable bidirectional port 0: bit 3 n.c. 23 - not connected p0_4 24 i/o programmable bidirectional port 0: bit 4 n.c. 25 - not connected n.c. 26 - not connected n.c. 27 - not connected p0_6 28 i/o 8 ma current sinking output for direct drive of led p0_7 29 i/o programmable bidirectional port 0: bit 7 v ssa 30 - analog ground cvbs0 31 i composite video input 0 selectable via sfr; a positive-going 1 v (p-p) input is required and connected via a 100 nf capacitor cvbs1 32 i composite video input 1 selectable via sfr; a positive-going 1 v (p-p) input is required and connected via a 100 nf capacitor n.c. 33 - not connected sync_filter 34 i/o cvbs sync ?lter input; this pin should be connected to v ssa via a 100 nf capacitor iref 35 i reference current input for analog circuits and connected to v ssa via a 24 k w resistor
2005 mar 09 6 philips semiconductors product speci?cation multi page intelligent teletext decoder SAA5360; saa5361 n.c. 36 - not connected n.c. 37 - not connected n.c. 38 - not connected n.c. 39 - not connected n.c. 40 - not connected frame 41 o de-interlace output synchronized with the vsync pulse to produce a non-interlaced display by adjustment of the vertical de?ection circuits vpe 42 i otp programming voltage input; connect to ground cor 43 o output which allows selective contrast reduction of the tv picture to enhance a mixed mode display; open-drain; active low n.c. 44 - not connected v dda 45 - 3.3 v analog supply voltage b 46 o pixel rate output of the blue colour information g 47 o pixel rate output of the green colour information r 48 o pixel rate output of the red colour information n.c. 49 - not connected n.c. 50 - not connected n.c. 51 - not connected vds 52 o video or data switch push-pull output for dot rate fast blanking hsync 53 i schmitt-triggered input for a ttl-level version of the horizontal sync pulse; the polarity of this pulse is programmable by register bit txt1.h polarity n.c. 54 - not connected vsync 55 i schmitt-triggered input for a ttl-level version of the vertical sync pulse; the polarity of this pulse is programmable by register bit txt1.v polarity n.c. 56 - not connected n.c. 57 - not connected n.c. 58 - not connected n.c. 59 - not connected v ssp 60 - periphery ground n.c. 61 - not connected v ssc 62 - core ground v ddc 63 - 3.3 v core supply voltage n.c. 64 - not connected n.c. 65 - not connected n.c. 66 - not connected n.c. 67 - not connected n.c. 68 - not connected oscgnd 69 - crystal oscillator ground xtalin 70 i 12 mhz crystal oscillator input xtalout 71 o 12 mhz crystal oscillator output reset 72 i reset input; if low for at least 24 crystal oscillator periods while the oscillator is running, the device is reset; internal pull-up symbol pin type description
2005 mar 09 7 philips semiconductors product speci?cation multi page intelligent teletext decoder SAA5360; saa5361 reset 73 i reset input; if high for at least 24 crystal oscillator periods while the oscillator is running, the device is reset; this pin should be connected to v ddc via a capacitor if an active high reset is required; internal pull-down n.c. 74 - not connected v ddp 75 - 3.3 v periphery supply voltage p1_0 76 i/o programmable bidirectional port 1: bit 0 n.c. 77 - not connected p1_1 78 i/o programmable bidirectional port 1: bit 1 p1_2 79 i/o programmable bidirectional port 1: bit 2 p1_3 80 i/o programmable bidirectional port 1: bit 3 scl 81 i i 2 c-bus serial clock input from application sda 82 i/o i 2 c-bus serial data input from or output to application p1_4 83 i/o programmable bidirectional port 1: bit 4 p1_5 84 i/o programmable bidirectional port 1: bit 5 n.c. 85 - not connected n.c. 86 - not connected n.c. 87 - not connected n.c. 88 - not connected n.c. 89 - not connected n.c. 90 - not connected n.c. 91 - not connected n.c. 92 - not connected p2_1/pwm0 93 i/o programmable bidirectional port 2: bit 1 or output bit 0 of the 7-bit pwm p2_2/pwm1 94 i/o programmable bidirectional port 2: bit 2 or output bit 1 of the 7-bit pwm p2_3/pwm2 95 i/o programmable bidirectional port 2: bit 3 or output bit 2 of the 7-bit pwm p2_4/pwm3 96 i/o programmable bidirectional port 2: bit 4 or output bit 3 of the 7-bit pwm p2_5/pwm4 97 i/o programmable bidirectional port 2: bit 5 or output bit 4 of the 7-bit pwm p2_6/pwm5 98 i/o programmable bidirectional port 2: bit 6 or output bit 5 of the 7-bit pwm v ssc 99 - core ground p2_0/tpwm 100 i/o programmable bidirectional port 2: bit 0 or output for 14-bit high precision pwm symbol pin type description
2005 mar 09 8 philips semiconductors product speci?cation multi page intelligent teletext decoder SAA5360; saa5361 SAA5360hl mhc508 1 2 3 4 5 6 7 8 9 10 11 12 13 14 20 21 22 23 24 25 75 74 73 72 71 70 69 68 67 66 65 64 63 62 56 55 54 53 52 51 15 16 17 18 19 61 60 59 58 57 26 27 28 29 30 31 32 33 34 35 36 37 38 39 45 46 47 48 49 50 10 0 99 98 97 96 95 94 93 92 91 90 89 88 87 81 80 79 78 77 76 40 41 42 43 44 86 85 84 83 82 n.c. p0_4 n.c. p0_3 vpe n.c. n.c. p0_2 sda_nvram scl_nvram n.c. n.c. p0_5 v ssp v ssc n.c. n.c. n.c. n.c. p3_3/adc3 p3_2/adc2 p3_1/adc1 n.c. p3_0/adc0 p2_7/pwm6 n.c. n.c. p0 _ 6 p0 _ 7 v ssa cvbs0 cvbs1 n.c. sync_filter iref n.c. n.c. n.c. n.c. n.c. frame vpe cor n.c. v dda b g r n.c. n.c. n.c. vds hsync n.c. vsync n.c. n.c. n.c. n.c. v ssp n.c. v ssc v ddc n.c. n.c. n.c. n.c. n.c. oscgnd xtalin xtalout reset reset n.c. v ddp p2 _ 0/tpwm v ssc p2 _ 6/pwm5 p2 _ 5/pwm4 p2 _ 4/pwm3 p2 _ 3/pwm2 p2 _ 2/pwm1 p2 _ 1/pwm0 n.c. n.c. n.c. n.c. n.c. n.c. n.c. n.c. p1 _ 5 p1 _ 4 sda scl p1 _ 3 p1 _ 2 p1 _ 1 n.c. p1 _ 0 fig.2 pin configuration of SAA5360hl.
2005 mar 09 9 philips semiconductors product speci?cation multi page intelligent teletext decoder SAA5360; saa5361 6.2 type saa5361 symbol pin type description p2_7/pwm6 1 i/o programmable bidirectional port 2: bit 7 or output bit 6 of the 6-bit pwm p3_0/adc0 2 i/o programmable bidirectional port 3 with alternative functions: bit 0 or input 0 for the software adc facility n.c. 3 o not connected p3_1/adc1 4 i/o programmable bidirectional port 3 with alternative functions: bit 1 or input 1 for the software adc facility p3_2/adc2 5 i/o programmable bidirectional port 3 with alternative functions: bit 2 or input 2 for the software adc facility p3_3/adc3 6 i/o programmable bidirectional port 3 with alternative functions: bit 3 or input 3 for the software adc facility n.c. 7 o not connected a14 8 o address line 14 rd 9 o read control output to external data memory; active low wr 10 o write control output to external data memory; active low v ssc 11 - core ground v ssp 12 - periphery ground p0_5 13 i/o 8 ma current sinking output for direct drive of led n.c. 14 i not connected a7 15 o address line 7 scl_nvram 16 i i 2 c-bus serial clock input to non-volatile ram sda_nvram 17 i/o i 2 c-bus serial data input and output of non-volatile ram p0_2 18 i/o programmable bidirectional port 0 with alternative functions: bit 2 input and output for general use n.c. 19 o not connected n.c. 20 o not connected vpe 21 i otp programming voltage input; connect to ground p0_3 22 i/o programmable bidirectional port 0 with alternative functions: bit 3 input and output for general use a6 23 o address line 6 p0_4 24 i/o programmable bidirectional port 0 with alternative functions: bit 4 input and output for general use n.c. 25 i/o not connected a5 26 o address line 5 a4 27 o address line 4 p0_6 28 i/o 8 ma current sinking output for direct drive of led p0_7 29 i/o programmable bidirectional port 0 with alternative functions: bit 7 input and output for general use v ssa 30 - analog ground cvbs0 31 i composite video input 0 selectable via sfr; a positive-going 1 v (p-p) input is required and connected via a 100 nf capacitor cvbs1 32 i composite video input 1 selectable via sfr; a positive-going 1 v (p-p) input is required and connected via a 100 nf capacitor
2005 mar 09 10 philips semiconductors product speci?cation multi page intelligent teletext decoder SAA5360; saa5361 a15_bk 33 o address line 15 sync_filter 34 i/o cvbs sync ?lter input; this pin should be connected to v ssa via a 100 nf capacitor iref 35 i reference current input for analog circuits and connected to v ssa via a 24 k w resistor a13 36 o address line 13 a12 37 o address line 12 a3 38 o address line 3 a2 39 o address line 2 a1 40 o address line 1 frame 41 o de-interlace output synchronized with the vsync pulse to produce a non-interlaced display by adjustment of the vertical de?ection circuits vpe 42 i otp programming voltage input; connect to ground cor 43 o output which allows selective contrast reduction of the tv picture to enhance a mixed mode display; open-drain; active low n.c. 44 i/o not connected v dda 45 - 3.3 v analog supply voltage b 46 o pixel rate output of the blue colour information g 47 o pixel rate output of the green colour information r 48 o pixel rate output of the red colour information a0 49 o address line 0 rambk1 50 o rambk sfr selection bits input 1 for external program sram data storage rambk0 51 o rambk sfr selection bits input 0 for external program sram data storage vds 52 o video or data switch push-pull output for dot rate fast blanking hsync 53 i schmitt-triggered input for a ttl-level version of the horizontal sync pulse; the polarity of this pulse is programmable by register bit txt1.h polarity n.c. 54 i/o not connected vsync 55 i schmitt-triggered input for a ttl-level version of the vertical sync pulse; the polarity of this pulse is programmable by register bit txt1.v polarity n.c. 56 o not connected n.c. 57 o not connected n.c. 58 o not connected n.c. 59 i/o not connected v ssp 60 - periphery ground n.c. 61 i not connected (internal pull-up) v ssc 62 - core ground v ddc 63 - 3.3 v core supply voltage a11 64 o address line 11 a10 65 o address line 10 a9 66 o address line 9 a8 67 o address line 8 n.c. 68 o not connected oscgnd 69 - crystal oscillator ground symbol pin type description
2005 mar 09 11 philips semiconductors product speci?cation multi page intelligent teletext decoder SAA5360; saa5361 xtalin 70 i 12 mhz crystal oscillator input xtalout 71 o 12 mhz crystal oscillator output reset 72 i reset input; if low for at least 24 crystal oscillator periods while the oscillator is running, the device is reset; internal pull-up reset 73 i reset input; if high for at least 24 crystal oscillator periods while the oscillator is running, the device is reset; this pin should be connected to v ddc via a capacitor if an active high reset is required; internal pull-down n.c. 74 o not connected v ddp 75 - 3.3 v periphery supply voltage p1_0 76 io programmable bidirectional port 1 with alternative functions: bit 0 input and output for general use n.c. 77 o not connected p1_1 78 i/o programmable bidirectional port 1 with alternative functions: bit 1 input and output for general use p1_2 79 i/o programmable bidirectional port 1 with alternative functions: bit 2 input and output for general use p1_3 80 i/o programmable bidirectional port 1 with alternative functions: bit 3 input and output for general use scl 81 i i 2 c-bus serial clock input from application sda 82 i/o i 2 c-bus serial data input from or output to application p1_4 83 i/o programmable bidirectional port 1 with alternative functions: bit 4 input and output for general use p1_5 84 i/o programmable bidirectional port 1 with alternative functions: bit 5 input and output for general use ad0 85 i/o address line 0 with multiplexed data line 0 ad1 86 i/o address line 1 with multiplexed data line 1 ad2 87 i/o address line 2 with multiplexed data line 2 ad3 88 i/o address line 3 with multiplexed data line 3 ad4 89 i/o address line 4 with multiplexed data line 4 ad5 90 i/o address line 5 with multiplexed data line 5 ad6 91 i/o address line 6 with multiplexed data line 6 ad7 92 i/o address line 7 with multiplexed data line 7 p2_1/pwm0 93 i/o programmable bidirectional port 2: bit 1 or output bit 0 of the 6-bit pwm p2_2/pwm1 94 i/o programmable bidirectional port 2: bit 2 or output bit 1 of the 6-bit pwm p2_3/pwm2 95 i/o programmable bidirectional port 2: bit 3 or output bit 2 of the 6-bit pwm p2_4/pwm3 96 i/o programmable bidirectional port 2: bit 4 or output bit 3 of the 6-bit pwm p2_5/pwm4 97 i/o programmable bidirectional port 2: bit 5 or output bit 4 of the 6-bit pwm p2_6/pwm5 98 i/o programmable bidirectional port 2: bit 6 or output bit 5 of the 6-bit pwm v ssc 99 - core ground p2_0/tpwm 100 i/o programmable bidirectional port 2: bit 0 or output for 14-bit high precision pwm symbol pin type description
2005 mar 09 12 philips semiconductors product speci?cation multi page intelligent teletext decoder SAA5360; saa5361 saa5361hl 001aaa526 1 2 3 4 5 6 7 8 9 10 11 12 13 14 20 21 22 23 24 25 75 74 73 72 71 70 69 68 67 66 65 64 63 62 56 55 54 53 52 51 15 16 17 18 19 61 60 59 58 57 26 27 28 29 30 31 32 33 34 35 36 37 38 39 45 46 47 48 49 50 10 0 99 98 97 96 95 94 93 92 91 90 89 88 87 81 80 79 78 77 76 40 41 42 43 44 86 85 84 83 82 n.c. p0_4 a6 p0_3 vpe n.c. n.c. p0_2 sda_nvram scl_nvram a7 n.c. p0_5 v ssp v ssc rd wr a14 n.c. p3_3/adc3 p3_2/adc2 p3_1/adc1 n.c. p3_0/adc0 p2_7/pwm6 a5 a4 p0 _ 6 p0 _ 7 v ssa cvbs0 cvbs1 a15_bk sync_filter iref a13 a12 a3 a2 a1 frame vpe cor n.c. v dda b g r a0 rambk1 rambk0 vds hsync n.c. vsync n.c. n.c. n.c. n.c. v ssp n.c. v ssc v ddc a11 a10 a9 a8 n.c. oscgnd xtalin xtalout reset reset n.c. v ddp p2 _ 0/tpwm v ssc p2 _ 6/pwm5 p2 _ 5/pwm4 p2 _ 4/pwm3 p2 _ 3/pwm2 p2 _ 2/pwm1 p2 _ 1/pwm0 ad7 ad6 ad5 ad4 ad3 ad2 ad1 ad0 p1 _ 5 p1 _ 4 sda scl p1 _ 3 p1 _ 2 p1 _ 1 n.c. p1 _ 0 fig.3 pin configuration of saa5361hl.
2005 mar 09 13 philips semiconductors product speci?cation multi page intelligent teletext decoder SAA5360; saa5361 7 commands and character sets 7.1 high-level command interface the i 2 c-bus interface is used to pass control commands and data between the SAA5360; saa5361 and the television microcontroller. the interface uses high-level commands, which are backwards compatible with the safari. the i 2 c-bus transmission formats are given in tables 1 to 3. table 1 user command table 2 system command table 3 user read 7.2 character sets the SAA5360hl/m1/0004 contains the character set for pan-euro, arabic and iranian and has slave address 58h. the saa5361hl/m1/1651 contains the character set for pan-euro, cyrillic, greek and arabic and has slave address 60h. user command start i 2 c-bus address write ack command ack stop system command start i 2 c-bus address write ack command ack parameter ack stop user read start i 2 c-bus address read ack data ack stop
2005 mar 09 14 philips semiconductors product speci?cation multi page intelligent teletext decoder SAA5360; saa5361 8 limiting values in accordance with absolute maximum rating system (iec 60134). note 1. this maximum value refers to 5 v tolerant i/os and may be 6 v maximum but only when v dd is present. 9 thermal characteristics 10 quality and reliability in accordance with general quality specification for integrated circuits snw-fq-611 . symbol parameter conditions min. max. unit v dd all supply voltages - 0.5 +4.0 v v i input voltage (any input) v dd < 3.6 v; note 1 - 0.5 v dd + 0.5 v v dd 3 3.6 v; note 1 - 0.5 4.1 v v o output voltage (any output) note 1 - 0.5 v dd + 0.5 v i o output current (each output) - 10 ma i io(d) diode dc input or output current - 20 ma t amb ambient temperature - 20 +70 c t j junction temperature - 20 +125 c t stg storage temperature - 55 +125 c v esd electrostatic discharge voltage human body model; c = 100 pf; r = 1.5 k w - 2000 v machine model; c = 200 pf; r = 0 w - 200 v i lu latch-up current 1.5 v dd - 100 ma symbol parameter conditions value unit r th(j-a) thermal resistance from junction to ambient in free air 52 k/w r th(j-c) thermal resistance from junction to case 8 k/w
2005 mar 09 15 philips semiconductors product speci?cation multi page intelligent teletext decoder SAA5360; saa5361 11 characteristics v dd = 3.3 v 10 %; v ss =0v; t amb = - 20 c to +70 c; unless otherwise speci?ed. symbol parameter conditions min. typ. max. unit supplies v dd any supply voltage referenced to v ss 3.0 3.3 3.6 v i ddp periphery supply current note 1 1 -- ma i ddc core supply current operating mode - 15 18 ma idle mode - 4.6 6 ma power-down mode - 0.76 1 ma i dda analog supply current operating mode - 45 48 ma idle mode - 0.87 1 ma power-down mode - 0.45 0.7 ma digital inputs p in reset v il low-level input voltage -- 1.00 v v ih high-level input voltage 1.85 - 5.5 v v hys hysteresis voltage of schmitt-trigger input 0.44 - 0.58 v i li input leakage current v i =0 -- 0.17 m a r pd equivalent pull-down resistance v i =v dd 55.73 70.71 92.45 k w p in reset v il low-level input voltage -- 0.98 v v ih high-level input voltage 1.73 - 5.5 v v hys hysteresis voltage of schmitt-trigger input 0.41 - 0.5 v i li input leakage current v i =v dd -- 0.00 m a r pu equivalent pull-up resistance v i = 0 46.07 55.94 70.01 k w p ins hsync and vsync v il low-level input voltage -- 0.96 v v ih high-level input voltage 1.80 - 5.5 v v hys hysteresis of schmitt-trigger input 0.40 - 0.56 v i li input leakage current v i =0tov dd -- 0.00 m a digital outputs p ins frame and vds v ol low-level output voltage i ol =3ma -- 0.13 v v oh high-level output voltage i oh = 3 ma 2.84 -- v t o(r) output rise time 10 % to 90 % of v dd ; c l =70pf 7.50 8.85 10.90 ns t o(f) output fall time 10 % to 90 % of v dd ; c l =70pf 6.70 7.97 10.00 ns
2005 mar 09 16 philips semiconductors product speci?cation multi page intelligent teletext decoder SAA5360; saa5361 p in cor ( open - drain ) v ol low-level output voltage i ol =3ma -- 0.14 v v oh high-level pull-up output voltage i ol = - 3 ma; push-pull 2.84 -- v i li input leakage current v i = 0 to v dd -- 0.12 m a t o(r) output rise time 10 % to 90 % of v dd ; c l =70pf 7.20 8.64 11.10 ns t o(f) output fall time 10 % to 90 % of v dd ; c l =70pf 4.90 7.34 9.40 ns digital input/outputs p ins scl_nvram, sda_nvram, p0_4 to p0_7, p1_0, p1_1, p2_1 to p2_7 and p3_0 to p3_4 v il low-level input voltage -- 0.98 v v ih high-level input voltage 1.78 - 5.50 v v hys hysteresis of schmitt-trigger input 0.41 - 0.55 v i li input leakage current v i =0tov dd -- 0.01 m a v ol low-level output voltage i ol =4ma -- 0.18 v v oh high-level output voltage i oh = - 4 ma; push-pull 2.81 -- v t o(r) output rise time 10 % to 90 % of v dd ; c l = 70 pf; push-pull 6.50 8.47 10.70 ns t o(f) output fall time 10 % to 90 % of v dd ; c l =70pf 5.70 7.56 10.00 ns p ins p1_2, p1_3 and p2_0 v il low-level input voltage -- 0.99 v v ih high-level input voltage 1.80 - 5.50 v v hys hysteresis voltage of schmitt-trigger input 0.42 - 0.56 v i li input leakage current v i =0tov dd -- 0.02 m a v ol low-level output voltage i ol =4ma -- 0.17 v v oh high-level output voltage i oh = - 4 ma; push-pull 2.81 -- v t o(r) output rise time 10 % to 90 % of v dd ; c l = 70 pf; push-pull 7.00 8.47 10.50 ns t o(f) output fall time 10 % to 90 % of v dd ; c l =70pf 5.40 7.36 9.30 ns p ins p0_5 and p0_6 v il low-level input voltage -- 0.98 v v ih high-level input voltage 1.82 - 5.50 v i li input leakage current v i =0tov dd -- 0.11 m a v hys hysteresis voltage of schmitt-trigger input 0.42 - 0.58 v v ol low-level output voltage i ol =8ma -- 0.20 v v oh high-level output voltage i oh = - 8 ma; push-pull 2.76 -- v t o(r) output rise time 10 % to 90 % of v dd ; c l = 70 pf; push-pull 7.40 8.22 8.80 ns symbol parameter conditions min. typ. max. unit
2005 mar 09 17 philips semiconductors product speci?cation multi page intelligent teletext decoder SAA5360; saa5361 t o(f) output fall time 10 % to 90 % of v dd ; c l =70pf 4.20 4.57 5.20 ns p ins p1_4 and p1_5 ( open drain ) v il low-level input voltage -- 1.08 v v ih high-level input voltage 1.99 - 5.50 v v hys hysteresis voltage of schmitt-trigger input 0.49 - 0.60 v i li input leakage current v i =0tov dd -- 0.13 m a v ol low-level output voltage i ol =8ma -- 0.35 v t o(f) output fall time 10 % to 90 % of v dd ; c l =70pf 69.70 83.67 103.30 ns t o(f)(i2c) output fall time in relation to the i 2 c-bus speci?cations v o = 3 v to 1.5 v at i ol = 3 ma; c l = 400 nf - 57.80 - ns analog inputs p ins cvbs0 and cvbs1 v sync sync voltage amplitude 0.1 0.3 0.6 v v v(p-p) video input voltage amplitude (peak-to-peak value) 0.7 1.0 1.4 v z source source impedance 0 - 250 w v ih high-level input voltage 3.0 - v dda + 0.3 v c i input capacitance -- 10 pf p in iref r gnd resistance to ground resistor tolerance 2 % - 24 - k w p ins adc0 to adc3 v ih high-level input voltage range = v ddp - v tn ; note 2 -- v dda v c i input capacitance -- 10 pf analog outputs p ins r, g and b i o(b) output current (black level) v dda = 3.3 v - 10 - +10 m a i o(max) output current (maximum intensity) v dda = 3.3 v; intensity level code = 31 decimal 6.0 6.67 7.3 ma i o(70) output current (70 % of full intensity) v dda = 3.3 v; intensity level code = 0 decimal 4.2 4.7 5.1 ma r l load resistor referenced to v ssa; resistor tolerance 5 % - 150 -w c l load capacitance -- 15 pf t o(r) output rise time 10 % to 90 % full intensity - 16.1 - ns t o(f) output fall time 90 % to 10 % full intensity - 14.5 - ns symbol parameter conditions min. typ. max. unit
2005 mar 09 18 philips semiconductors product speci?cation multi page intelligent teletext decoder SAA5360; saa5361 analog input/output p in sync_filter c sync storage capacitor to ground - 100 - nf v sync sync ?lter level voltage for nominal sync amplitude 0.35 0.55 0.75 v crystal oscillator i nput : pin xtalin v il low-level input voltage v ssa -- v v ih high-level input voltage -- v dda v c i input capacitance -- 10 pf o utput : pin xtalout c o output capacitance -- 10 pf crystal speci?cation; notes 3 and 4 f xtal nominal frequency fundamental mode - 12 - mhz c l load capacitance -- 30 pf c mot motional capacitance t amb =25 c -- 20 ff r res resonance resistance t amb =25 c -- 60 w c osc capacitors at pins xtalin and xtalout t amb =25 c - note 4 - pf c o crystal holder capacitance t amb =25 c - note 4 - pf t xtal crystal temperature range - 20 +25 +85 c x j adjustment tolerance t amb =25 c -- 50 10 - 6 x d drift -- 100 10 - 6 i 2 c-bus characteristics for fast mode f scl scl clock frequency 0 - 400 khz t buf bus free time between a stop and start condition 1.3 -- m s t hd;sta hold time start condition; after this period; the ?rst clock pulse is generated 0.6 -- m s t low scl low time 1.3 -- m s t high scl high time 0.6 -- m s t su;sta set-up time repeated start 0.6 -- m s t hd;dat data hold time notes 5 and 6 0 - 0.9 m s t su;dat data set-up time note 7 100 -- ns t r rise time sda and scl note 7 20 - 300 ns t f fall time sda and scl note 7 20 - 300 ns t su;sto set-up time stop condition 0.6 -- m s c b capacitive load of each bus line note 8 -- 400 pf symbol parameter conditions min. typ. max. unit
2005 mar 09 19 philips semiconductors product speci?cation multi page intelligent teletext decoder SAA5360; saa5361 notes 1. periphery current is dependent on external components and voltage levels on i/os. 2. v tn is the drop across a protection transistor which clamps the input to v dd . the maximum value is v tn = 0.75 v 3. crystal order number 4322 143 05561. 4. if the 4322 143 05561 crystal is not used, the formula in the crystal specification should be used. the mean of the capacitances due to the chip at xtalin and at xtalout is c io , where c io = 7 pf. c ext is a value for the mean of the stray capacitances due to the external circuits at xtalin and xtalout. a) c osc(typ) =2c l - c io - c ext . capacitor c osc may need to be reduced from the initial selected value. b) c o(max) =35 - 0.5 (c osc +c io +c ext ) pf. the maximum value for the crystal holder capacitance is to ensure start-up. 5. a device must internally provide a hold time of at least 300 ns for the sda signal, referenced to the v ih(min) of the scl signal, in order to bridge the undefined region of the falling edge of scl. 6. the maximum t hd;dat has only to be met if the device does not stretch the low period of the scl signal (t low(scl) ). 7. a fast mode i 2 c-bus device can be used in a standard-mode i 2 c-bus system, but the requirement t su;dat 3 250 ns must be met. this requirement is met for a device that does not stretch t low(scl) . if a device does stretch t low(scl) , the next data bit to the sda line must be output t r(max) +t su;dat = 1000 + 250 = 1250 ns before the scl line is released (according to the standard-mode i 2 c-bus specification). 8. c b = total capacitance of one bus line in pf. 12 application information 12.1 emc guidelines optimization of circuit return paths and minimization of common mode emission is achieved by a double sided printed-circuit board (pcb) with low inductance ground plane. on a single-sided pcb a local ground plane under the whole ic should be present. preferably, the pcb local ground plane connection should not be connected to other grounds on route to the pcb ground. do not use wire links. wire links cause ground inductance which increases ground bounce. the supply pins can be decoupled at the ground pin plane below the ic. this is easily achieved by using surface mount capacitors, which, at high frequency, are more effective than components with leads. using a device socket would increase the area and therefore increase the inductance of the external bypass loop. to provide a high-impedance to any high frequency signals on the v dd supplies to the ic, a ferrite bead or inductor can be connected in series with the supply line close to the decoupling capacitor. to prevent signal radiation, pull-up resistors of signal outputs should not be connected to the v dd supply on the ic side of the ferrite bead or inductor. oscgnd should only be connected to the crystal load capacitors and not to any other ground connection. distances to physical connections of associated active devices should be as short as possible. pcb output tracks should have close proximity, mutually coupled and ground return paths.
2005 mar 09 20 philips semiconductors product speci?cation multi page intelligent teletext decoder SAA5360; saa5361 this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader .this text is here in _ white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader.this text is here inthis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader. white to force landscape pages to be ... 12.2 application diagram mhc509 93 v dd v dd v afc av status program + program - plus( + ) minus( - ) menu v tune v ss v ss v ss v dd v dd v ssc v ddp v ddc v ssp v ssa v ss vpe v ss v ss v ss p2_1/pwm0 94 p2_2/pwm1 95 p2_3/pwm2 96 p2_4/pwm3 97 p2_5/pwm4 98 p2_6/pwm5 1 p2_7/pwm6 2 p3_0/adc0 p3_1/adc1 p3_2/adc2 scl_nvram p3_3/adc3 4 5 6 11, 62, 99 16 17 18 22 24 13 28 29 sda_nvram p0_2 p0_3 p0_4 p0_5 p0_6 p0_7 g b v dda hsync vds r vsync xtalout xtalin oscgnd p1_0 reset iref 100 nf 100 nf 100 nf frame sync_filter cvbs1 cvbs0 cvbs (if) cvbs (scart) 30 31 32 35 34 43 41 21, 42 100 83 82 81 80 79 78 76 75 73 71 70 69 63 12, 60 55 53 52 48 47 46 45 44 84 p2_0/tpwm p1_4 sda scl p1_3 p1_2 p1_1 p1_5 brightness contrast saturation hue volume (l) volume (r) v dd v ss 1 k w 1 k w 150 w 24 k w v dd 40 v v ss v ss v dd v ss ph2369 47 m f v dd v ss 100 nf cor 10 m f 56 pf v dd v dd v dd SAA5360hl saa5361hl ir receiver 12 mhz to tv display circuits tv control signals field flyback line flyback v dd reset 72 v dd fig.4 application diagram. bidirectional ports have been configured as open-drain. output ports have been configured as push-pull. connections of the saa5361hl to the external sdram are shown in fig.5.
2005 mar 09 21 philips semiconductors product speci?cation multi page intelligent teletext decoder SAA5360; saa5361 coa003 sram saa5361hl ad0 ad1 ad2 ad3 ad4 ad5 ad6 ad7 a0 rambk1 a1 a2 a3 a12 a13 a5 a4 a15_bk d7 1 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 75 74 73 72 71 70 69 68 67 66 a11 rambk0 a10 a9 a8 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 26 d6 d5 d4 d3 d2 d1 d0 a7 a7 a6 a6 a5 a4 a3 a2 a1 a0 a17 a16 a15 a14 a13 a12 a11 a10 a9 a8 wr rd/wr rd a14 oe fig.5 application diagram of saa5361 with external sram connections.
2005 mar 09 22 philips semiconductors product speci?cation multi page intelligent teletext decoder SAA5360; saa5361 12.3 application notes ports ad0 to ad7 of the microcontroller can be connected to pins d0 to d7 of the sram in any order. for the addressing, the lower group of address lines (a0 to a8) and the upper group of address lines (a9 to a14, a15_bk, rambk0 and rambk1) may be connected in any order within the groups, provided that the full 256 kbytes of external sram is used. fig.5 shows the application diagram of the saa5361 with external sram connections. when using an external sram smaller than 256 kbytes, the relevant number of bits from the microcontroller address bus should be disconnected, always removing the most significant bits first. for power saving modes, it might be advisable to control the ce pin of the sram module(s) using one of the microcontroller ports to de-select the sram. 12.3.1 e xternal data memory access table 4 external data memory access (see fig.6 and fig.7) note 1. the timings are only valid for the nominal 12 mhz clock provided to the microcontroller. 12.3.2 s ymbol explanations each timing symbol has five characters. the first character is always t (time). depending on their positions, the other characters indicate the name of a signal or the logical status of that signal. the designations are: a = address c = clock d = input data h = logic level high i = instruction (program memory contents) l = logic level low, or ale p = psen q = output data r = rd signal t = time v = valid w = wr signal x = no longer a valid logic level z = float examples: t avll = time for address valid to ale low. t llpl = time for ale to psen low. symbol parameter typical (1) unit t rlrh rd pulse width 250 ns t wlwh wr pulse width 250 ns t rldv rd low to valid data in 198 ns t rhdx data hold after rd 0 ns t rhdz data ?oat after rd tbd ns t llwl ale low to rd or wr low 132 ns t avwl address valid to wr low or rd low 172 ns t qvwx data valid to wr low 89 ns t whqx data hold after wr 15 ns t rlaz rd low to address ?oat tbd ns t whlh rd or wr high to ale high 40 ns
2005 mar 09 23 philips semiconductors product speci?cation multi page intelligent teletext decoder SAA5360; saa5361 handbook, full pagewidth gsa082 t llwl t rlrh ale psen rd ad < 0 : 7 > a < 0 : 14 > , a15_bk, rambk < 0 : 1 > a0-a7 data in a0-a7 instr in t avwl t avll t rhdx t llax t rlaz t rldv t rhdz t whlh fig.6 external data memory read cycle. handbook, full pagewidth gsa083 t llwl t wlwh ale psen wr ad < 0 : 7 > a < 0 : 14 > , a15_bk, rambk < 0 : 1 > a0-a7 data out a0-a7 from pcl instr in t avwl t avll t llax t qvwx t whqx t whlh fig.7 external data memory write cycle.
2005 mar 09 24 philips semiconductors product speci?cation multi page intelligent teletext decoder SAA5360; saa5361 13 package outline unit a max. a 1 a 2 a 3 b p ce (1) eh e ll p z y w v q references outline version european projection issue date iec jedec jeita mm 1.6 0.15 0.05 1.45 1.35 0.25 0.27 0.17 0.20 0.09 14.1 13.9 0.5 16.25 15.75 1.15 0.85 7 0 o o 0.08 0.08 0.2 1 dimensions (mm are the original dimensions) note 1. plastic or metal protrusions of 0.25 mm maximum per side are not included. 0.75 0.45 sot407-1 136e20 ms-026 00-02-01 03-02-20 d (1) (1) (1) 14.1 13.9 h d 16.25 15.75 e z 1.15 0.85 d b p e q e a 1 a l p detail x l (a ) 3 b 25 c d h b p e h a 2 v m b d z d a z e e v m a x 1 100 76 75 51 50 26 y pin 1 index w m w m 0 5 10 mm scale lqfp100: plastic low profile quad flat package; 100 leads; body 14 x 14 x 1.4 mm sot407-1
2005 mar 09 25 philips semiconductors product speci?cation multi page intelligent teletext decoder SAA5360; saa5361 14 soldering 14.1 introduction to soldering surface mount packages this text gives a very brief insight to a complex technology. a more in-depth account of soldering ics can be found in our data handbook ic26; integrated circuit packages (document order number 9398 652 90011). there is no soldering method that is ideal for all surface mount ic packages. wave soldering can still be used for certain surface mount ics, but it is not suitable for fine pitch smds. in these situations reflow soldering is recommended. 14.2 re?ow soldering reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. driven by legislation and environmental forces the worldwide use of lead-free solder pastes is increasing. several methods exist for reflowing; for example, convection or convection/infrared heating in a conveyor type oven. throughput times (preheating, soldering and cooling) vary between 100 seconds and 200 seconds depending on heating method. typical reflow peak temperatures range from 215 c to 270 c depending on solder paste material. the top-surface temperature of the packages should preferably be kept: below 225 c (snpb process) or below 245 c (pb-free process) C for all bga, htsson..t and ssop..t packages C for packages with a thickness 3 2.5 mm C for packages with a thickness < 2.5 mm and a volume 3 350 mm 3 so called thick/large packages. below 240 c (snpb process) or below 260 c (pb-free process) for packages with a thickness < 2.5 mm and a volume < 350 mm 3 so called small/thin packages. moisture sensitivity precautions, as indicated on packing, must be respected at all times. 14.3 wave soldering conventional single wave soldering is not recommended for surface mount devices (smds) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. to overcome these problems the double-wave soldering method was specifically developed. if wave soldering is used the following conditions must be observed for optimal results: use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. for packages with leads on two sides and a pitch (e): C larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; C smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. the footprint must incorporate solder thieves at the downstream end. for packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printed-circuit board. the footprint must incorporate solder thieves downstream and at the side corners. during placement and before soldering, the package must be fixed with a droplet of adhesive. the adhesive can be applied by screen printing, pin transfer or syringe dispensing. the package can be soldered after the adhesive is cured. typical dwell time of the leads in the wave ranges from 3 seconds to 4 seconds at 250 c or 265 c, depending on solder material applied, snpb or pb-free respectively. a mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. 14.4 manual soldering fix the component by first soldering two diagonally-opposite end leads. use a low voltage (24 v or less) soldering iron applied to the flat part of the lead. contact time must be limited to 10 seconds at up to 300 c. when using a dedicated tool, all other leads can be soldered in one operation within 2 seconds to 5 seconds between 270 c and 320 c.
2005 mar 09 26 philips semiconductors product speci?cation multi page intelligent teletext decoder SAA5360; saa5361 14.5 suitability of surface mount ic packages for wave and re?ow soldering methods notes 1. for more detailed information on the bga packages refer to the (lf)bga application note (an01026); order a copy from your philips semiconductors sales office. 2. all surface mount (smd) packages are moisture sensitive. depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). for details, refer to the drypack information in the data handbook ic26; integrated circuit packages; section: packing methods . 3. these transparent plastic packages are extremely sensitive to reflow soldering conditions and must on no account be processed through more than one soldering cycle or subjected to infrared reflow soldering with peak temperature exceeding 217 c 10 c measured in the atmosphere of the reflow oven. the package body peak temperature must be kept as low as possible. 4. these packages are not suitable for wave soldering. on versions with the heatsink on the bottom side, the solder cannot penetrate between the printed-circuit board and the heatsink. on versions with the heatsink on the top side, the solder might be deposited on the heatsink surface. 5. if wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. the package footprint must incorporate solder thieves downstream and at the side corners. 6. wave soldering is suitable for lqfp, qfp and tqfp packages with a pitch (e) larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 7. wave soldering is suitable for ssop, tssop, vso and vssop packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. 8. image sensor packages in principle should not be soldered. they are mounted in sockets or delivered pre-mounted on flex foil. however, the image sensor package can be mounted by the client on a flex foil by using a hot bar soldering process. the appropriate soldering profile can be provided on request. 9. hot bar soldering or manual soldering is suitable for pmfp packages. package (1) soldering method wave reflow (2) bga, htsson..t (3) , lbga, lfbga, sqfp, ssop..t (3) , tfbga, vfbga, xson not suitable suitable dhvqfn, hbcc, hbga, hlqfp, hso, hsop, hsqfp, hsson, htqfp, htssop, hvqfn, hvson, sms not suitable (4) suitable plcc (5) , so, soj suitable suitable lqfp, qfp, tqfp not recommended (5)(6) suitable ssop, tssop, vso, vssop not recommended (7) suitable cwqccn..l (8) , pmfp (9) , wqccn..l (8) not suitable not suitable
2005 mar 09 27 philips semiconductors product speci?cation multi page intelligent teletext decoder SAA5360; saa5361 15 data sheet status notes 1. please consult the most recently issued data sheet before initiating or completing a design. 2. the product status of the device(s) described in this data sheet may have changed since this data sheet was published. the latest information is available on the internet at url http://www.semiconductors.philips.com. 3. for data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. level data sheet status (1) product status (2)(3) definition i objective data development this data sheet contains data from the objective speci?cation for product development. philips semiconductors reserves the right to change the speci?cation in any manner without notice. ii preliminary data quali?cation this data sheet contains data from the preliminary speci?cation. supplementary data will be published at a later date. philips semiconductors reserves the right to change the speci?cation without notice, in order to improve the design and supply the best possible product. iii product data production this data sheet contains data from the product speci?cation. philips semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. relevant changes will be communicated via a customer product/process change noti?cation (cpcn). 16 definitions short-form specification ? the data in a short-form specification is extracted from a full data sheet with the same type number and title. for detailed information see the relevant data sheet or data handbook. limiting values definition ? limiting values given are in accordance with the absolute maximum rating system (iec 60134). stress above one or more of the limiting values may cause permanent damage to the device. these are stress ratings only and operation of the device at these or at any other conditions above those given in the characteristics sections of the specification is not implied. exposure to limiting values for extended periods may affect device reliability. application information ? applications that are described herein for any of these products are for illustrative purposes only. philips semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 17 disclaimers life support applications ? these products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. philips semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify philips semiconductors for any damages resulting from such application. right to make changes ? philips semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. when the product is in full production (status production), relevant changes will be communicated via a customer product/process change notification (cpcn). philips semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
? koninklijke philips electronics n.v. 2005 sca76 all rights are reserved. reproduction in whole or in part is prohibited without the prior written consent of the copyright owne r. the information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. no liability will be accepted by the publisher for any consequence of its use. publication thereof does not con vey nor imply any license under patent- or other industrial or intellectual property rights. philips semiconductors C a worldwide company contact information for additional information please visit http://www.semiconductors.philips.com . fax: +31 40 27 24825 for sales of?ces addresses send e-mail to: sales.addresses@www.semiconductors.philips.com . printed in the netherlands r24/06/pp 28 date of release: 2005 mar 09 document order number: 9397 750 14857

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