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infrared irda ? compliant 4 mb/s 3.3 v transceiver HSDL-2300 technical data features ? fully compliant to irda 1.0/1.1 specifications C 115.2 kb/s to 4 mb/s operation C excellent nose-to-nose operation ? compatible with ask, hp-sir, and tv remote ? backward compatible to slower speed ? iec825-class 1 eye safe ? 3.3 v performance ? complete shutdown C txd, rxd, pin diode ? low shutdown current C 10 na typical ? adjustable optical power management C adjust led drive current to maintain link integrity ? single rx data output C fir select pin switch to fir ? small 3.3 v module package C height of 5.5 mm maximum ? integrated emi shield C excellent noise immunity ? minimum number of passive components C one rled resistor and two bypass capacitors ? enhanced reliability performance ? designed to accommodate light loss with cosmetic window ? interfaces to various super i/o and controller devices ? edge detection input C to prevent led from long turn-on time ? typical link distance > 1 m at 4 mb/s applications ? data communication C notebook computers C sub-notebook computers C desktop pcs C printers C personal digital assistance (pdas) C fax/photocopiers ? digital imaging C digital cameras C photo-imaging printers ? industrial and medical instrumentation C general data collection devices C patient and pharmaceutical data collection ? ir lans description the HSDL-2300 is a new generation 3.3 v power supply infrared transceiver module that provides interface between logic and ir signals for through-air, serial, half-duplex ir data link. the module is compliant to irda physical layer specifications 1.0/1.1 and is iec825-class 1 eye safe.
2 package the HSDL-2300 module consists of optical sub-assemblies (osas), an electrical sub- assembly (esa), and an integrated emi shield. there are two package options: option #001 with guide pins, and option #002 without guide pins. drawings of the two options package are illustrated in figure 3 and figure 4. new package benefits the new package that consists of osas and esa with the combination of integrated emi shield utilizes existing in-house high-volume assembly processes to ensure high quality and high volume supply. the integrated emi shield helps to ensure low emi emission and high immunity to emi field, thus enhancing reliable performance. optical sub-assemblies (osas) the optical sub-assemblies include a transmitter and a receiver. the transmitter has a discrete emitter that utilizes transparent- substrate aluminium gallium arsenide (ts algaas) led technology that offers high-speed and high optical output efficiency performance with an integral lens in a clear molded package. the receiver utilizes a discrete silicon pin photo-diode with an integral lens in a molded package and contains a dye to absorb visible light. the receiver lens is designed such that it magnifies the effective area of the pin photo-diode to enhance sensitivity. and the pin photo- diode and pre-amplifier power supplies are filtered to attenuate noise from external sources. electrical sub-assembly (esa) the electrical sub-assembly (esa) consists of a double-sided printed circuit board on which a bicmos integrated circuit (ic) and various surface-mount passive circuit elements are attached. the ic contains an led driver and a receiver that provides a single output channel, rxd. application information the application engineering group in agilents communications semiconductor solution division is available to assist you with the technical understanding associated with HSDL-2300 infrared transceiver module. you can contact them through your local sales i/o pins configuration table pin description symbol 1 led anode leda 2 transmitter data input txd 3 receiver data output rxd 4 ground gnd 5 ground gnd 6 mode 1 md1 7 mode 0 md0 8 fir select fir_sel 9 analog ground agnd 10 supply voltage v cc caution: the bicmos inherent to the design of this component increases the components susceptibility to damage from electrostatic discharge (esd). it is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by esd.
3 transceiver control truth table mode 0 mode 1 fir_sel rx function tx function 1 0 x shutdown shutdown 0 0 0 sir full distance power 0 1 0 sir 2/3 distance power 1 1 0 sir 1/3 distance power 0 0 1 mir/fir full distance power 0 1 1 mir/fir 2/3 distance power 1 1 1 mir/fir 1/3 distance power x = dont care. transceiver i/o truth table input output txd ei ie (led) sir [4] mir/fir [5] v ih x high (on) nv nv v il ei h [1] low (off) low [3] nv v il ei h [2] low (off) nv low [3] v il ei l low (off) high high x = dont care nv = not valid notes: 1. in-band ei 115.2 kb/s. 2. in-band ei 3 0.576 mb/s. 3. logic low is a pulsed response. the condition is maintained for a duration dependent on pattern and strength of the incident intensity. 4. sir defined as the data rate from 2.4 kb/s to 115.2 kb/s. 5. mir/fir defined as the data rate from 0.576 mb/s to 4.0 mb/s.
4 figure 1. HSDL-2300 application circuit diagram. recommended application circuit components component recommended value r1 2.2 w , 5%, 0.5 watt, for 3.0 v cc 3.6 v operation cx1 [1] 0.47 m f, 20%, x7r ceramic cx2 [2] 6.8 m f, 20%, tantalum notes: 1. cx1 must be placed within 0.7 cm of the HSDL-2300 to obtain optimum noise immunity. 2. in environments with noisy power supplies, supply rejection can be enhanced by including cx2 as shown in application circuit diagram, figure 1. 3. for interface between 5 v endec and HSDL-2300, level shifters or external protection circuits are recommended at all input pins; md0, md1, txd, and fir_sel. v cc txd r1 2 gnd 3 8 rxd fir_sel 1 leda md0 7 md1 6 sp 4, 5 10 9 cx1 cx2* v cc agnd * optional
5 figure 2. selection of resistor r1. absolute maximum ratings [1] parameter symbol min. max. units conditions storage temperature t s C20 85 ?c operating temperature t a 070?c average led current i led 100 ma (dc1) average led current i led 165 ma 90 m s pulse width, (dc2) 25% duty cycle repetitive pulsed led i led 650 ma 90 m s pulse width, current (rp) 25% duty cycle peak led current i led 750 ma 2 m s pulse width, (pk) 10% duty cycle led anode voltage v leda C0.5 7 v supply voltage v cc C0.5 7 v transmitter data i txd C12 12 ma input current (dc) receiver data v rxd C0.5 v cc +vi o (rxd) = C20 m a output voltage 0.5 note: 1. for implementations where case to ambient thermal resistance 50?c/w. i led (a) 0.7 v cc (v) 0.4 3.2 3.6 0.2 0.3 0.6 3.8 2.8 0.5 3.0 3.4 r1 = 2.2 w
6 recommended operating conditions parameter symbol min. max. units conditions operating t a 070?c temperature supply v cc 3.0 3.6 v voltage logic high input v ih 2 v cc /3 v cc v voltage (txd, md0, md1, fir_sel) logic low input v il 0v cc /3 v voltage (txd, md0, md1, fir_sel) logic high receiver ei h 0.0036 500 mw/cm 2 for in-band signals input irradiance 115.2 kb/s [1] 0.0090 500 mw/cm 2 0.576 mb/s in-band signals 4.0 mb/s [1] logic low ei l 0.3 m w/cm 2 for in-band signals [1] receiver input irradiance led (logic high) i leda 400 650 ma current pulse amplitude receiver signal 2.4 115.2 kb/s rate C sir receiver 0.576 4 mb/s signal rate C mir/fir ambient light see irda serial infrared physical layer link specification, appendix a for ambient levels. note: 1. an in-band optical signal is a pulse/sequence where the peak wavelength, l p, is defined as 850 nm l p 900 nm, and the pulse characteristics are compliant with the irda serial infrared physical layer link specification.
7 electrical and optical specifications test conditions represent worst case values for the parameters under test. specifications hold over the recommended operating conditions unless otherwise noted. unspecified test conditions may be anywhere in their operating range. all values are at 25?c and 3.3 v unless otherwise noted. parameter symbol min. typ. max. units conditions receiver data logic low v ol 0 0.4v v i ol (rxd) = 1.0 ma, output (rxd) [1] for in-band ei 3 voltage 3.6 m w/cm 2 , q 1/2 15? logic high v oh v cc -0.2 v cc vi oh (rxd) = C20 m a, (rxd) for in-band ei 0.3 m w/cm 2 , q 1/2 15? viewing 2 q 1/2 30 angle transmitter logic ei h 100 177 mw/sr v ih (txd) 3 2 v cc /3 radiant high i leda = 400 ma, intensity intensity q 1/2 15? peak l p 875 nm wavelength spectral s l p 1/2 35 nm line half width viewing 2 q 1/2 30 60 angle digital data logic i l/h C1 1 m a0 v i v cc input current low/high led anode on v on 2.4 v i leda = 400 ma, state voltage (leda) v i (txd) 3 2 v cc /3 led anode off i lk 110 m av leda = v cc = 3.6 v, state leakage (leda) v i (txd) v cc /3 supply shutdown i cc1 10 200 na v cc = 3.6 v current idle i cc2 2.5 4 ma v cc = 3.6 v, v i (txd) v il , ei = 0 active i cc3 27 30 ma v cc = 3.6 v, receiver v i (txd) v il ei 500 mw/cm 2 receiver peak sensitivity l p 880 nm wavelength note: 1. logic low is a pulsed response. the condition is maintained for a duration dependent on pattern and strength of the incident intensity.
8 switching specifications test conditions represent worst case values for the parameters under test. specifications hold over the recommended operating conditions unless otherwise noted. unspecified test conditions may be anywhere in their operating range. all values are at 25?c and 3.3 v unless otherwise noted. parameter symbol min. typ. max. units conditions transmitter radiant t pw 1.5 1.6 1.8 m st pw (txd) = 1.6 m s intensity pulse width (ie) at 115.2 kpulses/s 148 217 260 ns t pw (txd) = 217 ns at 1.15 mpulses/s 115 125 135 ns t pw (txd) = 125 ns at 2.0 mpulses/s transmitter t r/f 40 ns t pw (txd) = 125 ns at radiant intensity 2.0 mpulses/s rise and fall times receiver sir t pw 2 2.5 3 m s [1] f 1/2 15? pulse width (sir) c l = 10 pf receiver mir t pw 100 500 ns [4] f 1/2 15? pulse width (mir) c l = 10 pf receiver fir t pw 85 165 ns [2] f 1/2 15? pulse width (fir) c l = 10 pf receiver ask t pw 1 m s [3] 500 khz/50% duty pulse width (ask) cycle carrier ask, c l = 10 pf receiver rise/fall t r/f 25 ns c l = 10 pf time (rxd) receiver latency t l 20 50 m s [1] [2] time notes: 1. for in-band signals 115.2 kb/s where 3.6 m w/cm 2 ei l 500 mw/cm 2 . 2. for in-band signals, 125 ns pw, 4 mb/s, 4 ppm at recommended 400 ma drive current. 3. pulse width specified is the pulse width of the second 500 khz carrier pulse received in a data bit. the first 500 khz carrier pulse may exceed 2 m s in width, which will not affect correct demodulation of the data stream. an ask and dask system using the HSDL-2300 has been shown to correctly receive all data bits for 9 m w/cm 2 < ei < 500 mw/cm 2 incoming signal strength. ask or dask should use the fir channel enabled. 4. for in-band signals at 1.15 mb/s where 9.0 m w/cm 2 ei 500 mw/cm 2 .
9 figure 3. package outline with dimension and recommended pc board pad layout. (integrated emi shield with guide pins C part number: HSDL-2300#001.) 7.5 ?0.20 8.8 ?0.20 1.00 1.05 13.00 ?0.20 2.80 ?0.30 9.60 ?0.30 1.143 bsc typ. 0.55 typ. r 0.15 5.50 ?0.15 0.80 ?0.15 3.20 ?0.30 5.30 0.80 ?0.20 1.00 + 0.15 0 1.50 ?0.30 0.51 ?0.15 1.25 (10x) 0.70 0.97 ?0.10 2.40 b 2.92 1.143 bsc 5.05 (10x) 2.60 1.05 ?0.10 1.31 ?0.10 2.31 ?0.10 shield solder pad 110 notes: 1. recommended solder stencil to be 5 to 6 mils thick. 2. letter 'a' indicates location of through hole for shield guide pin. 2. letter 'b' indicates location of shield soldered grounding pad. 3??3 guide pins a 11.86 ?0.10 5.84 a r 0.40 4.30 0.59 6.30 ?0.10 pin 1 + 0.20 0
10 figure 4. package outline with dimension and recommended pc board pad layout. (integrated emi shield without guide pins C part number: HSDL-2300#002.) 7.5 ?0.20 8.8 ?0.20 1.00 1.05 13.00 ?0.20 2.80 ?0.30 9.60 ?0.30 1.143 bsc typ. 0.55 typ. r 0.15 5.50 ?0.15 0.80 ?0.15 3.20 ?0.30 5.30 0.80 ?0.20 1.00 + 0.15 0 1.50 ?0.30 0.51 ?0.15 1.25 (10x) 0.70 0.97 ?0.10 2.40 a 2.92 1.143 bsc 5.05 (10x) 2.60 pin 1 1.05 ?0.10 1.31 ?0.10 2.31 ?0.10 shield solder pad 110 notes: 1. recommended solder stencil to be 5 to 6 mils thick. 2. letter 'a' indicates location of shield soldered grounding pad. 3??3 1 + 0.20 0
11 figure 5. reflow profile. representative for additional details. figure 5 is a straight line representation of a nominal temperature profile for a convective ir reflow solder process. the temperature profile is divided into four process zones with four d t/ d time temperature change rates. the d t/ d time temperature change rates are detailed in table 1. the temperatures are measured at the component to printed-circuit (pc) board connections. in process zone p1 , the pc board and HSDL-2300 castellation i/o pins are heated to a temperature of 125?c to activate the flux in the solder paste. the temperature ramp up rate, r1, is limited to 3?c per second to allow for even heating of both the pc board and HSDL-2300 castellation i/o pins. process zone p2 should be of sufficient time duration to dry the solder paste. the temperature is raised to a level just below the liquidus point of the solder, usually 170?c (338?f). process zone p3 is the solder reflow zone. in zone p3, the temperature is quickly raised above the liquidus point of solder to 230?c (446?f) for optimum results. the dwell time above the liquidus point of solder should be between 15 and 90 seconds. it usually takes about 15 seconds to assure proper coalescing of the solder balls into liquid solder and the formation of good solder connections. beyond a dwell time of 90 seconds, the intermetallic growth within the solder connections becomes excessive, resulting in the formation of weak and unreliable connections. the temperature is then rapidly reduced to a point below the solidus temperature of the solder, usually 170?c (338?f), to allow the solder within the connections to freeze solid. process zone p4 is the cool down after solder freeze. the cool down rate, r5, from the liquidus point of the solder to 25?c (77?f) should not exceed C3?c (26.6?f) per second maximum. this limitation is necessary to allow the pc board 0 t-time (seconds) t ?temperature ?(?) 200 170 125 100 50 15 60 90 120 150 195 30 45 75 105 135 165 180 210 150 183 230 p1 heat up p2 solder paste dry p3 solder reflow p4 cool down 25 r1 r2 r3 r4 r5 90 sec. max. above 183? table 1. reflow process zones. process zone symbol d t d t/ d time heat up p1, r1 25?c to 125?c 3?c/s max. solder paste dry p2, r2 125?c to 170?c 0.5?c/s max. solder reflow p3, r3 170?c to 230?c (235?c max.) 4.0?c/s typ. p4, r4 230?c to 170?c C4.0?c/s typ. cool down p4, r5 170?c to 25?c C3?c/s max.
12 tape and reel dimensions 16.00 ?0.10 (0.630 ?0.004) 4.00 ?0.10 (0.157 ?0.004) 2.00 ?0.10 (0.079 ?0.004) 1.50 ?0.10 (0.059 ?0.004) 24.00 ( 0.945 11.50 ?0.10 (0.453 ?0.004) 1.75 ?0.10 (0.069 ?0.004) 4.59 (0.181) 7.31 ?0.10 (0.288 ?0.004) 13.43 ?0.10 (0.529 ?0.004) 7.05 ?0.10 (0.278 ?0.004) 8?max. 4?max. + 0.30 - 0.10 + 0.012 - 0.004 ) 4.88 (0.192) 2.60 (0.102) 4.28 (0.169) 1.30 (0.051) 0.356 ?0.013 (0.0140 ?0.0005) dimensions in millimeters (inches) 30.4 max. measured at hub 20.2 min. 100.0 ?0.50 1.30 ?0.20 hub diameter (scroll start) 24.4 + 2.00 0 measured at hub 330 max. 1.5 min. 27.40 23.90 measured at outer edge dimensions in millimeters reel for 24 mm tape
13 and HSDL-2300 castellation i/o pins to change dimensions evenly, putting minimal stresses on the HSDL-2300 transceiver. appendix a. test methods a.1 background light and electromagnetic field there are four ambient interference conditions in which the receiver is to operate correctly. the conditions are to be applied separately: 1. electromagnetic field: 3 v/m maximum (please refer to iec 801-3, severity level 3 for details). 2. sunlight: 10 kilolux maximum at the optical port. this is simulated with an ir source having a peak wavelength within the range 850 nm to 900 nm and a spectral width less than 50 nm biased to provide 490 m w/cm 2 (with no modulation) at the optical port. the light source faces the optical port. this simulates sunlight within the irda spectral range. the effect of longer wavelength radiation is covered by the incandescent condition. 3. incandescent lighting: 1000 lux maximum. this is produced with general service, tungsten-filament, gas- filled, inside-frosted lamps in the 60 watt to 150 watt range to generate 1000 lux over the horizontal surface on which the equipment under test rests. the light sources are above the test area. the source is expected to have a filament temperature in the 2700 to 3050 degrees kelvin range and a spectral peak in the 850 nm to 1050 nm range. 4. fluorescent lighting: 1000 lux maximum. this is simulated with an ir source having a peak wavelength within the range 850 nm to 900 nm and a spectral width of less than 50 nm biased and modulated to provide an optical square wave signal (0 m w/cm 2 minimum and 0.3 m w/cm 2 peak amplitude with 10% to 90% rise and fall times less than or equal to 100 ns) over the horizontal surface on which the equipment under test rests. the light sources are above the test area. the frequency of the optical signal is swept over the frequency range from 20 khz to 200 khz. due to the variety of fluorescent lamps and the range of ir emissions, this condition is not expected to cover all circumstances. it will provide a common floor for irda operation. appendix b. smt assembly methods 1.0 solder pad, mask and metal stencil all ir transceivers operating under the recommended drive conditions are classified as cenelec en60825-1 accessible emission limit (ael) class 1. this standard is in effect in europe as of january 1, 1997. ael class 1 led devices are considered eye safe. please see application note 1094 for more information. figure 1.0. stencil and pcba. metal stencil for solder paste printing land pattern pcba stencil aperture solder mask
14 figure 2.0. top view of land pattern. figure 3.0. pcba C adjacent land keep-out and solder mask. 1.1 recommended land pattern for HSDL-2300 1.2 adjacent land keep-out and solder mask areas shield solder pad a b y c f d e g tx lens rx lens theta 10x pad dim. mm inches a b c (pitch) d e f g 2.60 0.70 1.14 2.40 1.25 4.22 5.05 0.102 0.027 0.045 0.094 0.049 0.166 0.198 g j tx lens rx lens dim. mm inches g h k j min. 0.15 13.40 7.20 2.10 min. 0.006 0.528 0.283 0.083 h solder mask land k ?adjacent land keep-out is the maximum space occupied by the unit relative to the land pattern. there should be no other smd components within this area. ?"g" is the minimum solder resist strip width required to avoid solder bridging adjacent pads. note: wet/liquid photo-imageable solder resist/mask is recommended. y
15 2.0 recommended solder paste/cream volume for castellation joints. the printed solder paste volume required per castellation pad is 0.36 cubic mm 15% (based on either no- clean or aqueous solder cream types with typically 60 to 65% solid content by volume). 2.1 recommended metal solder stencil aperture to ensure adequate printed solder paste volume, the following combination of metal stencil aperture and metal stencil thickness should be used: 3.0 pick and place misalignment tolerance and product self-alignment after solder reflow if the printed solder paste volume is adequate, the HSDL-2300 will self-align after solder reflow. units should be properly reflowed in ir-hot air convection over using the recommended reflow profile. the direction of board travel does not matter. 3.1 tolerance for x-axis alignment of castellation misalignment of castellation to the land pad should not exceed 0.2 mm or approximately half the width of the castellation during placement of the unit. the castellations will completely self- align to the pads during solder reflow. 3.2 tolerance for rotational (theta) misalignment unit when mounted should not be rotated more than 3? with reference to center x-y as specified in figure 2.0. see figure 4.0 t, nominal stencil thickness l, length of aperture mm inches mm inches 0.127 0.005 3.8 0.1 0.150 0.004 0.152 0.006 3.4 0.1 0.134 0.004 0.203 0.008 2.7 0.1 0.106 0.004 w, the width of aperture is fixed at 0.7 mm (0.028 inches) allowable misalignment tolerance x-direction 0.2 mm (0.008 inches) theta-direction 3? figure 4.0. solder paste stencil aperture. aperture as per land dimensions solder paste metal stencil l w t (stencil thickness) unit with theta misalignment of more than 3? does not completely self-align after reflow. unit with 3? rotational of theta misalignment self-align completely after solder reflow.
figure 5.0. section of a castellation in y-axis. 0.2 0.2 x y center of y axis 3.3 y-axis misalignment of castellation in the y direction, the unit does not self-align after solder reflow. this should not be an issue as the length of the pad (2.6 mm) is sufficient for a misplacement accuracy of +/C 0.2 mm from center of y-axis as shown in figure 5.0. there is still more than sufficient space for a proper strong solder fillet to be fully formed on both sides of the castellation joints. www.semiconductor.agilent.com data subject to change. copyright ? 1999 agilent technologies inc. obsoletes 5966-3872e (3/98) 5968-2121e (11/99)

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