caution: these devices are sensitive to electrostatic discharge. users should follow proper ic handling procedures. copyright ? harris corporation 1996 1 semiconductor hip0050 0.3a/50v octal low side power driver with serial bus control and over-current fault flag description the hip0050 is a logic controlled, eight channel octal low side power driver. as shown in the block diagram, the outputs are con- trolled via the serial data interface which allows the data to be shifted out, allowing control of other cascaded serial devices. if an over-current (oc) short circuit exists in one output, it may be inde- pendently shutdown while the other outputs remain in operation. when a shorted output is latched off, it may be turned back on when the next serial input data is latched. a fault ?ag ( fl t) is set to a low status to indicate current-limited shutdown. the outputs are independently latched off when an oc fault is detected. the fault latch is cleared on the next data strobe. over-temperature (ot) shutdown is provided with hysteresis to force global shutdown of all output drivers. shutdown is maintained until the on-chip temper- ature falls below the minimum hysteresis threshold point. the hip0050 is fabricated in a power bimos ic process, and is intended for use in automotive and other applications having a wide range of temperature and electrical stress conditions. it is particularly suited for driving lamps, displays, relays, and solenoids in applications where low operating power, high breakdown voltage, and high output current at high temperature is required. higher current needs can be met by paralleling adjacent output drivers . ordering information part number temp. range ( o c) package pkg. no. hip050ip -40 to 85 20 ld pdip e20.3 hip0050ib -40 to 85 24 ld soic m24.3 features ? octal ndmos output drivers in a high voltage power bimos process - each capable of sinking 300ma - low idle and standby current ? over-stress protection - each output: - over-current latch off . . . . . . . . . 300ma min - over-voltage clamp . . . . . . . . . . . . . . . 50v typ ? thermal shutdown with hysteresis ? serial data input, parallel output power drive ? short circuit latch off for each output ? common enable for output drivers and data storage register ? ambient operating temperature range. . . . . . . . . . . . .-40 o c to 85 o c - optional 125 o c maximum ambient operating temperature range (dissipation limited) applications ? automotive and industrial systems ? solenoids, relays and lamp drivers ? logic and m p controlled drivers ? robotic controls december 1996 file number 4034.1 pinouts hip0050 (pdip) top view 11 12 13 14 15 16 17 18 20 19 10 9 8 7 6 5 4 3 2 1 dr2 dr3 fl t en gnd gnd sck str dr4 dr5 dr1 si v cc gnd dr0 gnd lgnd so dr7 dr6 hip0050 (soic) top view dr2 dr3 fl t en gnd gnd gnd gnd str sck dr4 dr5 dr1 si v cc gnd gnd gnd so dr7 dr6 dr0 gnd lgnd 1 2 3 4 5 6 7 8 9 10 11 12 16 17 18 19 20 21 22 23 24 15 14 13
2 hip0050 block diagram output control logic table strobe 8-bit serial data (latched) output d1 d2 d3 d4 d5 d6 d7 d8 dr1 dr2 dr3 dr4 dr5 dr6 dr7 dr8 00000000offoffoffoffoffoffoffoff 10000000onoffoffoffoffoffoffoff 11000000ononoffoffoffoffoffoff 11100000onononoffoffoffoffoff 11110000ononononoffoffoffoff 00001111offoffoffoffonononon 11111111onononononononon sck output oc shut- over-temperature shutdown w/hys output driver (channel 1 of 8) dr#0 latch por en fault latch fl t (strobe) si so down serial (spi) parallel (data is register input str (enable) q1 q2 q3 q4 q5 q6 q7 strobed) when latched output s r q0
3 hip0050 absolute maximum ratings thermal information output voltage, v out (note 1) . . . . . . . . . . . . . . . . . . . -0.3v to v oc input voltage, v in . . . . . . . . . . . . . . . . . . . . . . . . -0.3v to v cc +0.3v logic supply voltage, v cc . . . . . . . . . . . . . . . . . . . . . . -0.3v to +7v max output load current, i load (per output, note 2) . . . . . . . . . i cl max. output load current, i load (all outputs on, note 2) . . . . . 2a operating ambient temperature range, t a . . . . . . . . -40 o c to 85 o c operating junction temperature range. . . . . . . . . . -40 o c to 150 o c storage temperature range, t stg . . . . . . . . . . . . . -55 o c to 150 o c maximum lead temperature (soldering 10s max). . . . . . . . . 300 o c (lead tips only) caution: stresses above those listed in absolute maximum ratings may cause permanent damage to the device. this is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this speci?cation is not implied. operating conditions typical logic supply voltage, v cc . . . . . . . . . . . . . . . . . . . . . . +5v i cc supply current, with 200ma each output . . . . . . . . . . . . 2ma i cc supply current, with no load . . . . . . . . . . . . . . . . . . . . . 2ma input low voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.0v input high voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.5v power output driver voltage range . . . . . . . . . . . . . . . . . 0 to v oc power output driver current load, i dr . . . . . . . . . . . . . . . . 0 to i cl typical output r dson channel resistance . . . . . . . . . . . . . . . . 2 w typical output rise time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 m s typical output fall time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 m s electrical speci?cations v cc = 4.5v to 5.5v, v batt = 8v to 16v, t a = -40 o c to 85 o c; unless otherwise speci?ed parameter symbol conditions min typ max units outputs drivers (dr0 to dr7) output channel resistance r dson output current = 200ma, t a =85 o c - 2 4.0 w output over-current shutdown threshold i cl 300 - 500 ma output clamping voltage v oc outputs off 42 50 58 v output clamping energy e oc 1ms single pulse width, t a = 25 o c, (refer to figure 2 for soa). -25-mj output off leakage current i off output voltage = 40v, t a =85 o c--10 m a output rise time t rise load = 75 w , 0.01 m f (parallel) 0.5 4 30 m s output fall time t fall load = 75 w , 0.01 m f (parallel) 0.5 10 30 m s output delay from strobe, high to low output transition t dhl 1410 m s output delay from strobe, low to high output transition t dlh 0.2 2.6 10 m s logic supply logic supply current, loaded i cc all outputs on, 0.2a load per output - 2 4 ma logic supply current, no load i cc all outputs off - 2 4 ma logic supply under-voltage reset threshold all outputs off 3.5 - 4 v logic inputs ( en, si, sck, str) threshold voltage at falling edge v t -v cc = 5v 10% 0.2v cc 0.3v cc -v threshold voltage at rising edge v t +v cc = 5v 10% - 0.6v cc 0.7v cc v hysteresis voltage v h v t + - v t - 0.85 1.4 2.25 v leakage current i lin -10 - 10 m a serial data clock (sck) (refer to figure 1 for waveform detail) frequency f sck - - 1.6 mhz pulse width high t w(sckh) - 27 175 ns package q jc ( o c/w) ? q ja ( o c/w) ?? 02 pdip . . . . . . . . . . . . . 10 50 35 soic . . . . . . . . . . . . . 10 60 40 ? versus additional square inches 1oz. copper on pcb. ?? standard test board, 0.002 diameter t/c located at lead shoulder, middle lead.
4 hip0050 figure 1. logic timing control waveforms pulse width low t w(sckl) - 27 175 ns serial data in (si) (refer to figure 1 for waveform detail) input setup time t sui - 1.1 75 ns input hold time t hi - 1.5 75 ns strobe (str) strobe pulse width t w(s) - 12 150 ns clock to strobe delay t d(cs) - 5 75 ns serial data out (so) (refer to figure 1 for waveform detail) low level output voltage v ol sink current = 1.6ma - 0.2 0.4 v high level output voltage v oh source current = -1.6ma 3.7 4.4 - v propagation delay t p(cd) 75 260 500 ns protection parameters fault output ( fl t) low v ol sink current = 1.6ma - - 0.4 v over-temp. (ot) shutdown t sd 145 155 165 o c ot shutdown hysteresis t h 51020 o c notes: 1. the mosfet output drain is internally clamped with a drain-to-gate zener diode that turns on the mosfet; holding the drain at the output clamp voltage v oc . 2. the hip0050 output drive is protected by an internal current shutdown. the i cl over-current shutdown threshold parameter specification defines the maximum current. the minimum limit for this threshold is 300ma. the maximum current with all outputs on may be further limited by dissipation. 3. package dissipation is based on thermal resistance capability in a normal operating environment. the junction to ambient thermal resis- tance values are defined here as a pc board mounted device with minimal copper. due to the heat conducting capability of the dip and soic package lead frames, 35 o c/w thermal resistance can be achieved with approximately 2 square inches of 1 oz. copper pc board area. the junction to lead thermal resistance values are based on measurements from the chip to the ground leads of the package. electrical speci?cations v cc = 4.5v to 5.5v, v batt = 8v to 16v, t a = -40 o c to 85 o c; unless otherwise speci?ed (continued) parameter symbol conditions min typ max units sck (clock) si (serial data in) str (strobe) drx (power output driver) so (serial data out) t w(sck) t w(sck) t sui t hi t d(cs) t w(s) t d(lh) t d(hl) t p(cd) t fall , t rise 10% 90%
5 hip0050 pin descriptions v cc power pin the v cc pin is the positive 5v logic voltage supply input for the ic. the normal operating voltage range is 4.5v to 5.5v. when switched on, the por forces all outputs off. sck serial clock pin sck is the clock input for the spi interface. output on/off control data is clocked into an eight stage shift register on the rising edge of an external clock. this input has a schmitt trigger. si serial data in pin si is the serial data input pin for the spi interface. the eight power outputs are controlled by the serial data via the output data buffer. this input has a schmitt trigger. str strobe pin for the spi interface when the str pin is high, data from the 8-bit shift register is passed into the output data buffers where it controls the on- off state of each output driver. the data is latched in the output data buffers when str goes low. this input has a schmitt trigger. so serial data out pin the serial data out allows other ics to be serially cascaded. for example, a 10-bit led driver may be located behind the hip0050. a controlling microprocessor may then clock out 18-bits of information and simultaneously strobe both parts. the cascaded ics may be the same or different from the hip0050. dr0 - dr7 outputs 0 thru 7 the drain output pins of the dmos power drivers are capa- ble of sinking 300ma. each output has short circuit protection to independently shutdown the output under excessive high load current conditions. fl t fault flag the fault ?ag pin indicates an over-current in any one of the output drivers. (it is not an indicator for the thermal shutdown mode.) the fl t output is active low and can sink 1.6ma when activated. when latched low, it will remain latched until the next data strobe. en enable pin the enable pin is an active low enable function for all eight output drivers. when en is high, drive from the output data buffer is held low and all output drivers are disabled. when en is low, the output drivers are enabled and data in the 8-bit shift register is transparent to the output data buffer. this input has a schmitt trigger. lgnd and gnd pins the lgnd pin is the 5v logic supply ground for the ic and gnd is a common ground for the power output drivers. figure 2. maximum single pulse energy safe operating area for each clamped output driver, t a = 25 o c 0.1 1 10 100 1 10 100 time (ms) energy (mj) safe operating area below line 1000
6 hip0050 e20.3 (jedec ms-001-ad issue d) 20 lead dual-in-line plastic package symbol inches millimeters notes min max min max a - 0.210 - 5.33 4 a1 0.015 - 0.39 - 4 a2 0.115 0.195 2.93 4.95 - b 0.014 0.022 0.356 0.558 - b1 0.045 0.070 1.55 1.77 8 c 0.008 0.014 0.204 0.355 - d 0.980 1.060 24.89 26.9 5 d1 0.005 - 0.13 - 5 e 0.300 0.325 7.62 8.25 6 e1 0.240 0.280 6.10 7.11 5 e 0.100 bsc 2.54 bsc - e a 0.300 bsc 7.62 bsc 6 e b - 0.430 - 10.92 7 l 0.115 0.150 2.93 3.81 4 n20 209 rev. 0 12/93 notes: 1. controlling dimensions: inch. in case of con?ict between english and metric dimensions, the inch dimensions control. 2. dimensioning and tolerancing per ansi y14.5m - 1982. 3. symbols are defined in the mo series symbol list in section 2.2 of publication no. 95. 4. dimensions a, a1 and l are measured with the package seated in jedec seating plane gauge gs - 3. 5. d, d1, and e1 dimensions do not include mold flash or protru- sions. mold flash or protrusions shall not exceed 0.010 inch (0.25mm). 6. e and are measured with the leads constrained to be per- pendicular to datum . 7. e b and e c are measured at the lead tips with the leads uncon- strained. e c must be zero or greater. 8. b1 maximum dimensions do not include dambar protrusions. dambar protrusions shall not exceed 0.010 inch (0.25mm). 9. n is the maximum number of terminal positions. 10. corner leads (1, n, n/2 and n/2 + 1) for e8.3, e16.3, e18.3, e28.3, e42.6 will have a b1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm). c l e e a c e b e c -b- e1 index 1 2 3 n/2 n area seating base plane plane -c- d1 b1 b e d d1 a a2 l a1 -a- 0.010 (0.25) c a m b s e a -c- dual-in-line plastic packages (pdip)
7 all harris semiconductor products are manufactured, assembled and tested under iso9000 quality systems certi?cation. harris semiconductor products are sold by description only. harris semiconductor reserves the right to make changes in circuit design and/or speci?cations at any time without notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnished by harris is believed to be accurate and reliable. however, no responsibility is assumed by harris or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of harris or its subsidiaries. sales of?ce headquarters for general information regarding harris semiconductor and its products, call 1-800-4-harris north america harris semiconductor p. o. box 883, mail stop 53-210 melbourne, fl 32902 tel: 1-800-442-7747 (407) 729-4984 fax: (407) 729-5321 europe harris semiconductor mercure center 100, rue de la fusee 1130 brussels, belgium tel: (32) 2.724.2111 fax: (32) 2.724.22.05 asia harris semiconductor pte ltd. no. 1 tannery road cencon 1, #09-01 singapore 1334 tel: (65) 748-4200 fax: (65) 748-0400 semiconductor hip0050 m24.3 (jedec ms-013-ad issue c) 24 lead wide body small outline plastic package symbol inches millimeters notes min max min max a 0.0926 0.1043 2.35 2.65 - a1 0.0040 0.0118 0.10 0.30 - b 0.013 0.020 0.33 0.51 9 c 0.0091 0.0125 0.23 0.32 - d 0.5985 0.6141 15.20 15.60 3 e 0.2914 0.2992 7.40 7.60 4 e 0.05 bsc 1.27 bsc - h 0.394 0.419 10.00 10.65 - h 0.010 0.029 0.25 0.75 5 l 0.016 0.050 0.40 1.27 6 n24 247 a 0 o 8 o 0 o 8 o - rev. 0 12/93 notes: 1. symbols are de?ned in the mo series symbol list in section 2.2 of publication number 95. 2. dimensioning and tolerancing per ansi y14.5m - 1982. 3. dimension d does not include mold flash, protrusions or gate burrs. mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. dimension e does not include interlead flash or protrusions. in- terlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. the chamfer on the body is optional. if it is not present, a visual index feature must be located within the crosshatched area. 6. l is the length of terminal for soldering to a substrate. 7. n is the number of terminal positions. 8. terminal numbers are shown for reference only. 9. the lead width b, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch) 10. controlling dimension: millimeter. converted inch dimen- sions are not necessarily exact. index area e d n 123 -b- 0.25(0.010) c a m b s e -a- l b m -c- a1 a seating plane 0.10(0.004) h x 45 o c h 0.25(0.010) b m m a small outline plastic packages (soic)
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