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revisions ltr description date (yr - mo - da) approved rev sheet rev sheet 15 16 17 18 19 20 21 22 23 24 25 26 26 27 rev status rev of sheets sheet 1 2 3 4 5 6 7 8 9 10 11 12 13 14 pmic n/a prepared by phu h. nguyen defense supply center columbus standard microcircuit drawing checked by phu h. nguyen columbus, ohio 43216 htt p://www.dscc.dla.mil this drawing is available for use by all departments approved by thomas m. hess and agencies of the department of defe nse drawing approval date 02 - 04 - 04 microcircuit, digital, asic, single point to point ieee 1355 high speed controller, monolithic silicon amsc n/a revision level size a cage code 67268 5962 - 02a02 sheet 1 of 27 dscc form 2233 apr 97 5962 - e093 - 02 distribution statement a . approved for public release; di stribution is unlimited.
standard microcircuit drawing size a 5962 - 02a02 defense supply center columbus columbus, ohio 43216 - 5000 revision le vel sheet 2 dscc form 2234 apr 97 1. scope 1.1 scope . this drawing documents two product assurance class levels consisting of high reliability (device classes q and m) and space application (device class v). a choice of case outlines and lead finishes are ava ilable and are reflected in the part or identifying number (pin). when available, a choice of radiation hardness assurance (rha) levels are reflected in the pin. 1.2 pin . the pin is as shown in the following example: 5962 - 02a02 01 q x x federal stock class designator rha designator (see 1.2.1) device type (see 1.2.2) device class designator case outline (see 1.2.4) lead finish (see 1.2.5) \ / (see 1.2.3) \ / drawing number 1.2.1 rha designator . device classes q and v rha marked devices meet the mil - prf - 38535 specified rha levels and are marked with the appropriate rha designator. device clas s m rha marked devices meet the mil - prf - 38535, appendix a specified rha levels and are marked with the appropriate rha designator. a dash ( - ) indicates a non - rha device. 1.2.2 device type(s) . the device type(s) identify the circuit function as follows : device type generic number circuit function 01 t7906e ieee1355 high speed controller 1.2.3 device class designator . the device class designator is a single letter identifying the product assurance level as follows: device class device requireme nts documentation m vendor self - certification to the requirements for mil - std - 883 compliant, non - jan class level b microcircuits in accordance with mil - prf - 38535, appendix a q or v certification and qualification to mil - prf - 38535 1.2.4 case outline( s) . the case outline(s) are as designated in mil - std - 1835 and as follows: outline letter descriptive designator terminals package style x see figure 1 100 square quad flat package 1.2.5 lead finish . the lead finish is as specified in mil - prf - 38535 for device classes q and v or mil - prf - 38535, appendix a for device class m.
standard microcircuit drawing size a 5962 - 02a02 defense supply center columbus columbus, ohio 43216 - 5000 revision le vel sheet 3 dscc form 2234 apr 97 1.3 absolute maximum ratings 1 / 2 / supply voltage range (v dd ) ................................ ................................ - 0.5 v to 7.0 v input voltage range (v in ) ................................ ................................ .... - 0.5 v to v dd + 0.5 v 3 / input current (i in ) signal pin ................................ ................................ .................. - 10 ma to 10 ma power pin ................................ ................................ .................. - 50 ma to 50 ma output short circuit current 4 / v out = v dd ................................ ................................ ................. 160 ma v out = v ss ................................ ................................ ................. - 130 ma lead temperature (soldering, 10 sec) ................................ ............... 300c 5 / storage temperature ................................ ................................ .......... - 65c to 150c maximum junct ion temperature (t j ) ................................ .................. 175c 1.4 recommended operating conditions . supply voltage range ................................ ................................ ......... 4.5 v to 5.5 v case operating temperature (t c ) ................................ ...................... - 55c to 125c 2. applicable documents 2.1 government specification, standards, and handbooks . the followin g specification, standards, and handbooks form a part of this drawing to the extent specified herein. unless otherwise specified, the issues of these documents are those listed in the issue of the department of defense index of specifications and standard s (dodiss) and supplement thereto, cited in the solicitation. specification department of defense mil - prf - 38535 - integrated circuits, manufacturing, general specification for. standards department of defense mil - std - 883 - test method standard microcircuits. mil - std - 1835 - interface standard electronic component case outlines. handbooks department of defense mil - hdbk - 103 - list of standard microcircuit drawings. mil - hdbk - 780 - standard microcircuit drawings. (unless oth erwise indicated, copies of the specification, standards, and handbooks are available from the standardization document order desk, 700 robbins avenue, building 4d, philadelphia, pa 19111 - 5094.) _________ 1 / stresses above the absolute maximum rating may cause permanent damage to the device. extended operation at the maximum levels may degrade performance and affect reliability. 2 / all voltages referenced to ground unless otherwise specified 3 / v dd + 0.5 v shall not exceed 7.0 v 4 / the maximum out put current of any single output in a shorted condition for a maximum duration of 1 second. 5 / duration 10 s max at a distance not less than 1.6 mm.
standard microcircuit drawing size a 5962 - 02a02 defense supply center columbus columbus, ohio 43216 - 5000 revision le vel sheet 4 dscc form 2234 apr 97 2.2 non government publications . the following document(s) form a part of this document to the extent specified herin. unless otherwise specified, the issues of the documents(s) which are dod adopted are those listed in the dodiss cited in the solicitation institute of electrical and electronics engineers (ieee) ieee standard 1355 - ieee standard for h eterogeneous interconnect (hic) (low - cost, low - latency scalable serial interconnect for parallel system construction. ieee standard 1149.1 - ieee standard test access port and boundary scan architecture. (applications for copies should be addressed to the institute of electrical and electronic engineers, 445 hoes lane, piscataway, nj 08854 - 4150 2.3 order of precedence . in the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes prece dence. nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. requirements 3.1 item requirements . the individual item requirements for device classes q and v shall be in accor dance with mil - prf - 38535 and as specified herein or as modified in the device manufacturer's quality management (qm) plan. the modification in the qm plan shall not affect the form, fit, or function as described herein. the individual item requirements for device class m shall be in accordance with mil - prf - 38535, appendix a for non - jan class level b devices and as specified herein. 3.2 design, construction, and physical dimensions . the design, construction, and physical dimensions shall be as specifi ed in mil - prf - 38535 and herein for device classes q and v or mil - prf - 38535, appendix a and herein for device class m. 3.2.1 case outline(s) . the case outline(s) shall be in accordance with 1.2.4 herein and figure 1. 3.2.2 terminal connections . the terminal connections shall be as specified on figure 2. 3.2.3 block diagram(s) . the block diagram shall be as specified on figure 3. 3.2.4 timing waveforms . the timing waveforms shall be specified in figure 4. 3.2.5 jtag timing waveforms . the jtag timing waveforms sha ll be as specified on figure 5. 3.2.6 b oundary scan instruction codes . the boundary scan instruction codes shall be maintained and available from the device manufacturer upon request. 3.3 electrical performance characteristics and postirradiation para meter limits . unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table i and shall apply over the full case operating temperature range. 3.4 electrical test requirement s . the electrical test requirements shall be the subgroups specified in table ii. the electrical tests for each subgroup are defined in table i. 3.5 marking . the part shall be marked with the pin listed in 1.2 herein. in addition, the manufacturer's pin may also be marked as listed in mil - hdbk - 103. for packages where marking of the entire smd pin number is not feasible due to space limitations, the manufacturer has the option of not marking the "5962 - " on the device. for rha product using this opti on, the rha designator shall still be marked. marking for device classes q and v shall be in accordance with mil - prf - 38535. marking for device class m shall be in accordance with mil - prf - 38535, appendix a. 3.5.1 certification/compliance mark . the cer tification mark for device classes q and v shall be a "qml" or "q" as required in mil - prf - 38535. the compliance mark for device class m shall be a "c" as required in mil - prf - 38535, appendix a.
standard microcircuit drawing size a 5962 - 02a02 defense supply center columbus columbus, ohio 43216 - 5000 revision le vel sheet 5 dscc form 2234 apr 97 3.6 certificate of compliance . for device classes q and v, a certificate of compliance shall be required from a qml - 38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). for device class m, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in mil - hdbk - 103 (see 6.6.2 herein). the certificate of compliance submitted to dscc - va prior to listing as an approved source of supply for this drawing shall affirm that the manufacturer's product meets, for device classes q and v, the requirements of mil - prf - 38535 and herein or for device class m, the requirements of mil - prf - 38535, appendix a and herein. 3.7 certificate of conformance . a certificate of conformance as required for device classes q and v in mil - prf - 38535 or for device class m in mil - prf - 38535, appendix a shall be provided with each lot of microcircuits delivered to this drawing. 3.8 notification of change for device class m . for device class m, notification to dscc - va of change of produc t (see 6.2 herein) involving devices acquired to this drawing is required for any change as defined in mil - prf - 38535, appendix a. 3.9 verification and review for device class m . for device class m, dscc, dscc's agent, and the acquiring activity retain the option to review the manufacturer's facility and applicable required documentation. offshore documentation shall be made available onshore at the option of the reviewer. 3.10 microcircuit group assignment for device class m . device class m devices covered by this drawing shall be in microcircuit group number 123 (see mil - prf - 38535, appendix a). 3.11 ieee 1149.1 compliance . all device types shall be compliant with ieee 1149.1.
standard microcircuit drawing size a 5962 - 02a02 defense supply center columbus columbus, ohio 43216 - 5000 revision le vel sheet 6 dscc form 2234 apr 97 table i. electrical performance characteristics . test symbol group a subgroups limits unit conditions - 55 c t c +125 c v dd = 5.0 v 10 % unless otherwise specified min max input clamp voltage to gnd 1 / v ic i oh = - 300 m a 1, 2, 3 - 1.2 - 0.2 v low level input current 2 / i il v in = gnd, v dd = 5.5 v 1 , 2, 3 - 10 m a low level input current, pull - up 2 / i ilpu v in = gnd, v dd = 5.5 v 1, 2, 3 - 250 m a low level input current, pull - down 2 / i llpd v in = gnd, v dd = 5.5 v 1, 2, 3 - 10 m a high level input current 2 / i ih v in = v dd = 5.5 v 1, 2, 3 10 m a high level input current, pull - up 2 / i ihpu v in = v dd = 5.5 v 1, 2, 3 10 m a high level input current, pull - down 2 / i ihpd v in = v dd = 5.5 v 1, 2, 3 450 m a output leakage low current 2 / i ozl outputs disabled, v out = gnd 1, 2, 3 - 10 m a output leakage high current pull - down output 2 / i ozhpd outputs disabled, v out = v dd 1, 2, 3 450 m a output leakage low current pull - up output 2 / i ozlpu outputs disabled, v out =gnd 1, 2, 3 - 250 m a output leakage high current 2 i ozh outpu ts disabled, v out = v dd 1, 2, 3 10 m a low level input voltage 1 / v il functional verification 1, 2, 3 0.8 v high level input voltage 1 / v ih functional verification 1, 2, 3 2.2 v low level output voltage 2 / 4 / v ol v dd = 4.5 v, i ol = + 3, + 6, + 12 ma 1, 2, 3 0.4 v high level output voltage 2 / 4 / v oh v dd = 4.5 v, i oh = - 3, - 6, - 12 ma 1, 2, 3 3.9 v supply current at reset 3 / iccrst vcc=5.5v 1, 2, 3 15 ma supply current in idle 3 / iccidle vcc=5.5v 1, 2, 3 50 ma supply c urrent at reset 2 / iccop vcc=5.5v 1, 2, 3 80 ma input capacitance 3 / c i v dd = 0 v 4 15 pf output capacitance 3 / c io v dd = 0 v 4 15 pf see notes at end of table.
standard microcircuit drawing size a 5962 - 02a02 defense supply center columbus columbus, ohio 43216 - 5000 revision le vel sheet 7 dscc form 2234 apr 97 table i. electrical performance characteristics - continued. test symbol group a subgroups limits unit conditions - 55 c t c +125 c v dd = 5.0 v 10 % unless otherwise specified min max clk period 3 / t clk nominal 5mhz : 200ns 9,10,11 ns clk width high 3 / t clkh see figure 4 9,10,11 80 120 ns clk width low 3 / t clkl see figure 4 9,10,11 80 120 ns reset setup before clk high 3 / t rsts see figure 4 9,10,11 10 ns reset low pulse width 3 / t rstw see figure 4 9,10,11 2*t clk ns output disable after clk high 3 / t outd see fig ure 4 9,10,11 38 ns hsel active low pulse width 3 / t hsl see figure 4 9,10,11 150 ns hsel inactive high pulse width 3 / t hsh see figure 4 9,10,11 60 ns hwrnrd setup before hsel active low 3 / t hwnrs see figure 4 9,10,11 5 ns hdatnadr setup before hsel active low 3 / t hwnrh see figure 4 9,10,11 5 ns hwrnrd hold after hsel inactive high 3 / t hwnrh see figure 4 9,10,11 0 ns hdatnadr hold after hsel inactive high 3 / t hdnah see figure 4 9,10,11 0 ns hdata valid after hsel active low and hwrnrd high 3 / t hdwv see figure 4 9,10,11 25 ns hdata hold after hsel inactive high 3 / t hdwh see figure 4 9,10,11 0 ns hsel active low pulse width 3 / t hsl see figure 4 9,10,11 150 ns hsel inactive high pulse width 3 / t hsh see figure 4 9,10,11 60 ns hwrnrd setup before hsel active low 3 / t hwnrs see figure 4 9,10,11 5 ns hdatnad r setup before hsel active low 3 / t hwnrl see figure 4 9,10,11 5 ns hwrnrd hold after hsel inactive high 3 / t hwnrh see figure 4 9,10,11 0 ns hdatnadr hold after hsel inactive high 3 / t hdnah see figure 4 9,10,11 0 ns hdata enable after hsel active low and hwrnrd low 3 / t hde see figure 4 9,10,11 4 18 ns see notes at end of table.
standard microcircuit drawing size a 5962 - 02a02 defense supply center columbus columbus, ohio 43216 - 5000 revision le vel sheet 8 dscc form 2234 apr 97 table i. electrical performance characteristics - continued. test symbol group a subgroups limits unit conditions - 55 c t c +125 c v dd = 5.0 v 10 % unless otherwise specified min max hdata valid after hsel active low and hwrnrd low 3 / t hdv see figure 4 9,10,11 125 ns hdata hold after hsel inactive high 3 / t hdh see figure 4 9,10,11 4 18 ns hsel active low pulse width 3 / t hsl see figure 4 9,10,11 150 ns ram i/f write access time 3 / t rwa see figure 4 9,10,11 120 120+(ws*40) ns cso - 3, wr active low pulse width 3 / t rwl see figure 4 9,10,11 40+(ws*40) 5 / 42+(ws*40) 5 / ns address addr0 - 15 valid before cso , wr active low 3 / t rwas see figure 4 9,10,11 38 42 ns ad dress addr0 - 15 hold after cso - 3, wr inactive high 3 / t rwah see figure 4 9,10,11 38 42 ns data0 - 15 enable after cso - 3, wr active low 3 / t rwde see figure 4 9,10,11 0 6 ns data0 - 15 valid before cso - 3, wr inactive high 3 / t rwdv see figure 4 9,10,11 32 ns data0 - 15 hold after cso - 3, wr inactive high 3 / t rwdh see figure 4 9,10,11 20 26 ns cso - 3, wr , rd and addr valid active low pulse width 3 / t rrl see figure 4 9,10,11 40+(ws*40) 5 / 42+(ws*40) 5 / ns cso - 3, wr , rd and addr valid inactive high pulse width 3 / t rrh see figure 4 9,10,11 38 40 ns address change 3 / 6 / t rra see figure 4 9,10,11 40+(ws*40) 5 / 42+(ws*40) 5 / ns data0 - 15 setup before cso - 3, rd high or new address on addr0 - 15 valid 3 / t rds see figure 4 9,10,11 14 ns data hold after cso - 3, rd high o r new address on addr0 - 15 3 / t rdh see figure 4 9,10,11 0 40 ns cso - 3, wr , rd , addr0 - 15 and data0 - 15 disable after req _ bus active low 3 / t rbrs see figure 4 9,10,11 40 160 ns cso - 3, wr , rd , addr0 - 15 and data0 - 15 enable after bus_re q inactive high 3 / t rbra see figure 4 9,10,11 20 65 ns see notes at end of table.
standard microcircuit drawing size a 5962 - 02a02 defense supply center columbus columbus, ohio 43216 - 5000 revision le vel sheet 9 dscc form 2234 apr 97 table i. electrical performance characteristics - continued. test symbol group a subgr oups limits unit conditions - 55 c t c +125 c v dd = 5.0 v 10 % unless otherwise specified min max start_trm high active pulse width 3 / t reth see figure 4 9,10,11 47 ns start_trm low inactive pulse width 3 / t retl see figure 4 9,10,11 47 ns first read access ( cso - 3/ rd low a ctive) after start_trm high 3 / t retc see figure 4 9,10,11 120 7 / ns trm_rdy (transmit ready) high active after the last read from memory 3 / t retr see figure 4 9,10,11 160 7 / ns time between the rising edge of trm_rdy and the next start (rising edge fro m start_trm) 3 / t rets see figure 4 9,10,11 0 ns trm_rdy hold after start_trm high 3 / t retd see figure 4 9,10,11 170 ns start_rcv high active pulse width 3 / t rerh see figure 4 9,10,11 47 ns start_rcv low inactive pulse width 3 / t rerl see figure 4 9,10,11 47 ns first write access ( cso - 3/ wr low active) after start_rcv high 3 / t rerc see figure 4 9,10,11 120 ns rcv_rdy (receive ready) high inactive after the last write to memory 3 / t rerr see figure 4 9,10, 11 160 170 ns time between the rising edge of rcv_rdy and the next start (rising edge from start_rcv) 3 / t rers see figure 4 9,10,11 0 ns rcv_rdy hold after start_rcv high 3 / t rerd see figure 4 9,10,11 170 ns wr active low pulse width 3 / t fwl see figure 4 9,10,11 40+(ws*40) 5 / 42+(ws*40) 5 / ns wr inactive high pulse width 3 / t fwh see figure 4 9,10,11 38 40 ns see notes at end of table.
standard microcircuit drawing size a 5962 - 02a02 defense supply center columbus columbus, ohio 43216 - 5000 revision le vel sheet 10 dscc form 2234 apr 97 table i. electrical performance characteristics - continued. test symbol group a subgroups limits unit conditions - 55 c t c +125 c v dd = 5.0 v 10 % unless otherwise specified min max wr active low after rcv_eop_ack high 3 / t fwack see figure 4 9,10,11 120 ns full _ fifo setup before ` wr high 3 / t ffs see figure 4 9,10,11 8 ns rcveop1, rcveop2 high after last write and wr high 3 / t fweop see figure 4 9,10,11 40 7 / ns rcv_eop_ack active high pulse width 3 / t fweopa see figure 4 9,10,11 49 ns rcveop1, rcveop2 low after rcv_eop_ack high 3 / t fweoph see figure 4 9,10,11 128 ns data0 - 7 enable after wr low 3 / t fwde see figure 4 9,10,11 0 6 ns data 0 - 7 valid before wr high 3 / t fwdv see figure 4 9,10,11 32 ns data0 - 7 hold after wr high 3 / t fwdh see figure 4 9,10,11 2 ns rd active low pulse width 3 / t frl see figure 4 9,10,11 40+(ws*40) 5 / 42+(ws*40) 5 / ns rd inactive high pulse width 3 / t frh see figure 4 9,10,11 38 40 ns empty _ fifo setup before rd high 3 / t fes see figure 4 9,10,11 8 ns trm_eop_acknowledge active high after trmeop1, trmeop2 high and fifo_empty active low 3 / t freopa see figure 4 9,10,11 160 7 / ns trmeop1, trmeop2 hold after trm_eop_ack high 3 / t freoph see figure 4 9,10,11 0 ns trm_eop_ack hold after trmeop1, trmeop2 low 3 / t frackh see figure 4 9,10,11 122 128 ns data0 - 7 setup before rd inactive hi gh 3 / t frdv see figure 4 9,10,11 9 ns data0 - 7 hold after rd inactive high 3 / t frdh see figure 4 9,10,11 0 ns cs _ adc low pulse width 3 / t adccs see figure 4 9,10,1 1 40+(ws*40) 5 / 42+(ws*40) 5 / ns adc_rdy high pulse width 3 / t adcrdy see figure 4 9,10,11 45 ns see notes at end of table.
standard microcircuit drawing size a 5962 - 02a02 defense supply center columbus columbus, ohio 43216 - 5000 revision le vel sheet 11 dscc form 2234 apr 97 table i. electrical performance characteristics - continued. test symbol group a subgroups limits unit conditions - 55 c t c +125 c v dd = 5.0 v 10 % unless otherwise specified min max adc_rdy high to adc_ c / r high 3 / t adcr see figure 4 9,10,11 200 ns adc_ c / r setup before cs _ adc low 3 / t adcs see fi gure 4 9,10,11 40+(ws*40) 5 / 42+(ws*40) 5 / ns adc_trig high pulse width 3 / t adctrig see figure 4 9,10,11 45 ns adc_trig high to cs _ adc low 3 / t adctcs see figure 4 9,10,11 200+(ws*40) 5 / ns data 0 - 15 setup to cs _ adc high 3 / t adcds see figure 4 9,10,11 19 ns data 0 - 15 hold after cs _ adc high 3 / t adcdh see figure 4 9,10,11 0 ns dac_addr 0 - 2 and data 0 - 15 setup before wr _ dac low 3 / t dacs see figure 4 9,10,11 40+(ws*40) 5 / 42+( ws*40) 5 / ns wr _ dac low pulse width 3 / t dacwr see figure 4 9,10,11 40+(ws*40) 5 / 42+(ws*40) 5 / ns data 0 - 15 hold after wr _ dac high 3 / t dach see figure 4 9,10,11 38 42 ns tmrx_clk period 3 / t tclk see figure 4 9,10, 11 80 ns tmrx_clk width high 3 / t tclkh see figure 4 9,10,11 35 45 ns tmrx_clk width low 3 / t tclkl see figure 4 9,10,11 35 45 ns tmrx_exp low / high after tmrx_clk high 3 / t texp see figure 4 9,10,11 9 24 ns ext_ireqx low pulse width 3 / t exint see f igure 4 9,10,11 10 ns bit period 3 / t lbitp see figure 4 9,10,11 4 ns ldox, lsox output skew 3 / 8 / t louts see figure 4 9,10,11 0.5 ns data/strobe edge separa tion 3 / t ldsi see figure 4 9,10,11 1 ns tck period 3 / t tck see figure 5 9,10,11 100 n s tck width high 3 / t tckh see figure 5 9,10,11 40 ns tck width low 3 / t tckl see figure 5 9,10,11 4 0 ns tms, tdi setup before tck high 3 / t tis see figure 5 9,10,11 8 ns tms, tdi hold after tck high 3 / t tih see figure 5 9,10,11 8 ns tdo delay af ter tck low 3 / t tdo see figure 5 9,10,11 17 ns see notes at end of table.
standard microcircuit drawing size a 5962 - 02a02 defense supply center columbus columbus, ohio 43216 - 5000 revision le vel sheet 12 dscc form 2234 apr 97 table i. electrical performance characteristics - continued. test symbol group a subgroups limits unit conditions - 55 c t c +125 c v dd = 5.0 v 10 % unless otherwise specified min max smcs inputs setup before tck high 3 / t syss see figure 5 4 8 ns smcs inputs hold after tck high 3 / t sysm see figure 5 4 8 ns smcs outputs delay after tck low 3 / t syso see figure 5 4 27 ns tdo disable after trst active low 3 / t tdoz see figure 5 4 5 ns trst pulse width 3 / t trst see figure 5 4 2 * t tck ns 1 / forcing conditions of the functional test, assure that these limits are met, but they will not be individually recorded. 2 / read & record measurements in accordance with mil - prf - 38535. 3 / tested at initial design and after major process changes, otherwise guaranteed. 4 / i ol and i oh are based on buffer size. 5 / ws = wait state number. wait state is defined in one register (called ram_ws_reg) located at address ox42. 6 / internal clock runs at 25mhz, t iclk = 40 ns. 7 / data bandwidth over the ieee - 1355 link. simultaneous read from the memory with wait states. 8 / output skew includes jitter.
standard microcircuit drawing size a 5962 - 02a02 defense supply center columbus columbus, ohio 43216 - 5000 revision le vel sheet 13 dscc form 2234 apr 97 case x milimeters inches symbol min max min max a 2.21 2.67 .087 .105 c 0.15 0.20 .006 .008 d/e 31.80 32.80 1.252 1.291 d1/e1 18.80 19.30 .740 .760 e 0.635 bsc .025 bsc b 0.254 ref .010 ref a1 1.83 2.24 .072 .088 a2 0.203 ref .008 ref l 6.50 6.75 .256 .266 n1/n2 25 25 figure1. case outline .
standard microcircuit drawing size a 5962 - 02a02 defense supply center columbus columbus, ohio 43216 - 5000 revision le vel sheet 14 dscc form 2234 apr 97 pin number name pin number name pin number name 1 v cc 35 iob16 69 gpio2 2 gnd 36 iob17 70 gpio3 3 gnd 37 iob18 71 gpio4 4 v cc 38 iob19 72 gpio5 5 ld0 39 iob20 73 gpio6 6 ls0 40 iob21 74 gpio7 7 ldi 41 iob22 75 tmr1_clk 8 lsi 42 iob23 76 tmr2_clk 9 gnd 43 iob24 77 rxd1 10 tck 44 iob25 78 tmr1_exp 11 tms 45 iob26 79 tmr2_exp 12 tdi 46 iob27 80 txd1 13 trst 47 data0 81 hdata0 14 td0 48 data1 82 hdata1 15 gnd 49 data2 83 hdata2 16 v cc 50 data3 84 hdata3 17 iob0 51 data4 85 hdata4 18 iob1 52 data5 86 hdata5 19 iob2 53 data6 87 hdata6 20 iob3 54 data7 88 v cc 21 iob4 55 data8 89 gnd 22 iob5 56 v cc 90 hdata7 23 i ob6 57 gnd 91 hdatnadr 24 iob7 58 data9 92 hsel 25 iob8 59 data10 93 hwrnrd 26 iob9 60 data11 94 hintr 27 v cc 61 v cc 95 reset 28 gnd 62 gnd 96 clk 29 iob10 63 data12 97 gnd 30 iob1 1 64 data13 98 gnd 31 iob12 65 data14 99 v cc 32 iob13 66 data15 100 pllout 33 iob14 67 gpio0 34 iob15 68 gpio1 figure 2. terminal connections .
standard microcircuit drawing size a 5962 - 02a02 defense supply center columbus columbus, ohio 43216 - 5000 revision le vel sheet 15 dscc form 2234 apr 97 figure 3. block diagram .
standard microcircuit drawing size a 5962 - 02a02 defense supply center columbus columbus, ohio 43216 - 5000 revision le vel sheet 16 dscc form 2234 apr 97 figure 4. timing waveforms .
standard microcircuit drawing size a 5962 - 02a02 defense supply center columbus columbus, ohio 43216 - 5000 revision le vel sheet 17 dscc form 2234 apr 97 figure 4. timing waveforms - continued.
standard microcircuit drawing size a 5962 - 02a02 defense supply center columbus columbus, ohio 43216 - 5000 revision le vel sheet 18 dscc form 2234 apr 97 figure 4. timing waveforms - continued.
standard microcircuit drawing size a 5962 - 02a02 defense supply center columbus columbus, ohio 43216 - 5000 revision le vel sheet 19 dscc form 2234 apr 97 figure 4. timing waveforms - continued.
standard microcircuit drawing size a 5962 - 02a02 defense supply center columbus columbus, ohio 43216 - 5000 revision le vel sheet 20 dscc form 2234 apr 97 figure 4. timing waveforms - continued.
standard microcircuit drawing size a 5962 - 02a02 defense supply center columbus columbus, ohio 43216 - 5000 revision le vel sheet 21 dscc form 2234 apr 97 figure 4. timing waveforms - continued.
standard microcircuit drawing size a 5962 - 02a02 defense supply center columbus columbus, ohio 43216 - 5000 revision le vel sheet 22 dscc form 2234 apr 97 figure 4. timing waveforms - c ontinued.
standard microcircuit drawing size a 5962 - 02a02 defense supply center columbus columbus, ohio 43216 - 5000 revision le vel sheet 23 dscc form 2234 apr 97 figure 5. jtag timing waveforms .
standard microcircuit drawing size a 5962 - 02a02 defense supply center columbus columbus, ohio 43216 - 5000 revision le vel sheet 24 dscc form 2234 apr 97 4. quality assurance provisions 4.1 sampling and inspection . for device classes q and v, sampling and inspection procedures shall be in accordance with mil - prf - 38535 or as modified in the device manufacturer's quality management (qm) plan. the modification in the qm plan shall not affect the form, fit, or function as described herein. for device class m, sampling and inspection procedures shall be in accordance with mi l - prf - 38535, appendix a. 4.2 screening . for device classes q and v, screening shall be in accordance with mil - prf - 38535, and shall be conducted on all devices prior to qualification and technology conformance inspection. for device class m, screening shall be in accordance with method 5004 of mil - std - 883, and shall be conducted on all devices prior to quality conformance inspection. 4.2.1 additional criteria for device class m . a. burn - in test, method 1015 of mil - std - 883. (1) test condition a, b, c, d or e. the test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. the test circuit shall specify the inputs, outputs, biases, and po wer dissipation, as applicable, in accordance with the intent specified in test method 1015. (2) t a = +125 c, minimum. b. interim and final electrical test parameters shall be as specified in table ii herein. 4.2.2 additional criteria for device class es q and v . a. the burn - in test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturer's qm plan in accordance with mil - prf - 38535. the burn - in test circuit shall be maintained under docume nt revision level control of the device manufacturer's technology review board (trb) in accordance with mil - prf - 38535 and shall be made available to the acquiring or preparing activity upon request. the test circuit shall specify the inputs, outputs, bi ases, and power dissipation, as applicable, in accordance with the intent specified in test method 1015 of mil - std - 883. b. interim and final electrical test parameters shall be as specified in table ii herein. c. additional screening for device class v b eyond the requirements of device class q shall be as specified in mil - prf - 38535, appendix b. 4.3 qualification inspection for device classes q and v . qualification inspection for device classes q and v shall be in accordance with mil - prf - 38535. insp ections to be performed shall be those specified in mil - prf - 38535 and herein for groups a, b, c, d, and e inspections (see 4.4.1 through 4.4.4). 4.4 conformance inspection . technology conformance inspection for classes q and v shall be in accordance wi th mil - prf - 38535 including groups a, b, c, d, and e inspections and as specified herein. quality conformance inspection for device class m shall be in accordance with mil - prf - 38535, appendix a and as specified herein. inspections to be performed for dev ice class m shall be those specified in method 5005 of mil - std - 883 and herein for groups a, b, c, d, and e inspections (see 4.4.1 through 4.4.4). 4.4.1 group a inspection . a. tests shall be as specified in table ii herein. b. for device class m, subgroup s 7 and 8 tests shall be sufficient to verify the functionality of the device. for device classes q and v, subgroups 7 and 8 shall include verifying the functionality of the device. 4.4.2 group c inspection . the group c inspection end - point electrical parameters shall be as specified in table ii herein.
standard microcircuit drawing size a 5962 - 02a02 defense supply center columbus columbus, ohio 43216 - 5000 revision le vel sheet 25 dscc form 2234 apr 97 table ii. electrical test requirements . test requirements subgroups (in accordance with mil - std - 883, method 5005, table i) subgroups (in accordance with mil - prf - 38535, table iii) device c lass m device class q device class v interim electrical parameters (see 4.2) 1,7,9 1,7,9 1,7,9 final electrical parameters (see 4.2) 1,2,3,7,8,9,10,11 1 / 1,2,3,7,8,9,10, 11 1 / 1,2,3,7,8,9,10, 11 2 / 3 / group a test requirements (see 4.4) 1,2,3,4,7,8,9,10,11 1 / 1,2,3,4,7,8,9, 10,11 1 / 1,2,3,4,7,8,9,10, 11 2 / group c end - point electrical parameters (see 4.4) 1,7,9 1,7,9 1,7,9 group d end - point electrical parameters (see 4.4) 1,7,9 1,7,9 1,7,9 group e end - point elec trical parameters (see 4.4) 1,7,9 1,7,9 1,7,9 1 / pda applies to subgroup 1. 2 / pda applies to subgroups 1 and 7. 3 / delta limits are as specified in table iib herein and shall be required where specified in table i. table iib. delta limits parameter 1 / symbol test method test conditions change limits unit low level input current 2 / i il as per table i 0.1 m a high level input current 2 / i ih 0.1 m a output leakage low current 2 / i ozl 0.1 m a output leakage high current 2 / i ozh 0.1 m a low level output voltage v ol 100 mv high level output voltage v oh 100 mv 1 / the parameters shall be recorded before and after the required burn - in and life test to determine the delta limits. 2 / only for inputs and i/o without pull up or pull down. 4.4.2.1 additional criteria for device class m . steady - state life test conditions, method 1005 of mil - std - 883: a. test condition a, b, c, d or e. the test circuit shall be maintained by the manufacturer under document revision le vel control and shall be made available to the preparing or acquiring activity upon request. the test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1005 of m il - std - 883. b. t a = +125 c, minimum. c. test duration: 1,000 hours, except as permitted by method 1005 of mil - std - 883.
standard microcircuit drawing size a 5962 - 02a02 defense supply center columbus columbus, ohio 43216 - 5000 revision le vel sheet 26 dscc form 2234 apr 97 4.4.2.2 additional criteria for device classes q and v . the steady - state life test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturer's qm plan in accordance with mil - prf - 38535. the test circuit shall be maintained under document revision level control by the device manufacturer's trb in accordance with mil - prf - 3 8535 and shall be made available to the acquiring or preparing activity upon request. the test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1005 of mil - std - 883. 4.4.3 group d inspection . the group d inspection end - point electrical parameters shall be as specified in table ii herein. 4.4.4 group e inspection . group e inspection is required only for parts intended to be marked as radiation hardness assu red (see 3.5 herein). rha levels for device classes m, q and v shall be as specified in mil - i - 38535. a. end - point electrical parameters shall be as specified in table ii herein. b. for device classes q and v, the devices or test vehicle shall be subjec ted to radiation hardness assured tests as specified in mil - prf - 38535 for the rha level being tested. for device class m, the devices shall be subjected to radiation hardness assured tests as specified in mil - prf - 38535, appendix a for the rha level being tested. all device classes must meet the postirradiation end - point electrical parameter limits as defined in table i at t a = +25 c 5 c, after exposure, to the subgroups specified in table ii herein. c. when specified in the purchase order or contract, a copy of the rha delta limits shall be supplied. 5. packaging 5.1 packaging requirements . the requirements for packaging shal l be in accordance with mil - prf - 38535 for device classes q and v or mil - prf - 38535, appendix a for device class m. 6. notes 6.1 intended use . microcircuits conforming to this drawing are intended for use for government microcircuit applications (orig inal equipment), design applications, and logistics purposes. 6.1.1 replaceability . microcircuits covered by this drawing will replace the same generic device covered by a contractor prepared specification or drawing. 6.1.2 substitutability . device class q devices will replace device class m devices. 6.2 configuration control of smd's . all proposed changes to existing smd's will be coordinated with the users of record for the individual documents. this coordination will be accomplished using dd form 1692, engineering change proposal. 6.3 record of users . military and industrial users should inform defense supply center columbus when a system application requires configuration control and which smd's are applicable to that system. dscc will maintain a record of users and this list will be used for coordination and distribution of changes to the drawings. users of drawings covering microelectronic devices (fsc 5962) should contact dscc - va, telephone (614) 692 - 0544. 6.4 comments . comments on this drawing should be directed to dscc - va , columbus, ohio 43216 - 5000, or telephone (614) 692 - 0547.
standard microcircuit drawing size a 5962 - 02a02 defense supply center columbus columbus, ohio 43216 - 5000 revision le vel sheet 27 dscc form 2234 apr 97 6.5 abbreviations, symbols, and definitions . the abbreviations, symbols, and definitions used herein are defined in mil - prf - 38535 and mil - hdbk - 133 1. 6.5.1 table iii. pin descriptions . tdi - test data input . provides serial data for the boundary scan logic. tdo - test data output . serial scan output of the scan path. tck - test clock . provides an asynchronous clock for jtag boundary scan. tms - test m ode select . used to control the test state machine. this input should be left unconnected or tied to ground during normal operation. trst - test reset . resets the test state machine. 6.6 sources of supply . 6.6.1 sources of supply for device class es q and v . sources of supply for device classes q and v are listed in qml - 38535. the vendors listed in qml - 38535 have submitted a certificate of compliance (see 3.6 herein) to dscc - va and have agreed to this drawing. 6.6.2 approved sources of supply f or device class m . approved sources of supply for class m are listed in mil - hdbk - 103. the vendors listed in mil - hdbk - 103 have agreed to this drawing and a certificate of compliance (see 3.6 herein) has been submitted to and accepted by dscc - va.
sta ndard microcircuit drawing bulletin date: 02 - 04 - 04 approved sources of supply for smd 5962 - 02a02 are listed below for immediate acquisition information only and shall be added to mil - hdbk - 103 and qml - 38535 during the next revision. mil - hdbk - 103 and qm l - 38535 will be revised to include the addition or deletion of sources. the vendors listed below have agreed to this drawing and a certificate of compliance has been submitted to and accepted by dscc - va. this bulletin is superseded by the next dated revi sion of mil - hdbk - 103 and qml - 38535. standard microcircuit drawing pin 1 / vendor cage number vendor similar pin 2 / 5962 - 02a0201qxc f7400 t7906ektmq 5962 - 02a0201vxc f7400 t7906ektsv 1 / the lead finish shown for each pin representing a hermetic packa ge is the most readily available from the manufacturer listed for that part. if the desired lead finish is not listed contact the vendor to determine its availability. 2 / caution . do not use this number for item acquisition. items acquired to this num ber may not satisfy the performance requirements of this drawing. vendor cage vendor name number and address f7400 atmel nantes sa bp 70602 44306 nantes cedex 3 france the information contained herein is disse minated for convenience only and the government assumes no liability whatsoever for any inaccuracies in the information bulletin.

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