View LT3740EDHC-TRPBF_2698226.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

lt3740 1 3740fc typical application features applications description wide operating range, valley mode, no r sense ? synchronous step-down controller the lt ? 3740 is a synchronous step-down switching regulator controller that drives n-channel power mosfet stages. the controller uses valley current mode architecture to achieve very low duty cycles with excellent transient response without requiring a sense resistor. the lt3740 includes an internal step-up converter to provide a bias 7.8v higher than the input voltage for the drive. this enables the part to work from an input voltage as low as 2.2v. the xref pin is an external reference input that allows the user to override the internal 0.8v feedback reference with any lower value, allowing full control of the output voltage during operation, output voltage tracking or soft-start. the lt3740 has three current limit levels that can be chosen by connecting the range pin to ground, open, and input respectively. high ef? ciency step-down converter n wide v in range: 2.2v to 22v n internal boost provides 6v gate drive for v in down to 2.2v n no sensing resistor required n dual n-channel mosfet synchronous drive n valley current mode control n optimized for high step-down ratio n power good output voltage monitor n 0.8v reference n three pin-selected current limit levels n constant switching frequency: 300khz n programmable soft-start n output voltage tracking n available in 16-pin 5mm 3mm dfn n notebook and palmtop computers, pda n portable instruments n distributed power systems l , lt, ltc and ltm are registered trademarks of linear technology corporation. no r sense is a trademark of linear technology corporation. all other trademarks are the property of their respective owners. ef? ciency vs load current swb v in shdn xref range v c bgdp bias tgate sw sn + bgate gnd lt3740 sn C pgnd fb 3740 ta01a 0.9h 1f 0.22f v out 1.8v 10a v in 3v to 12v m1 hat2168h m2 hat2165h 100f s 3 10f 39pf 22h 20k 15k 1nf 22pf 80.6k 105k 15k 1 1 d1 b320a 1 load current (a) 0 efficiency (%) 86 92 88 90 94 3740 ta01b 84 82 80 46 2 8 10 v in = 3v v in = 5v v in = 12v v out = 1.8v
lt3740 2 3740fc absolute maximum ratings sn ? , bgate, v c , fb, xref, pgood voltages .............10v v in , shdn , sw, range voltages ...............................22v bias, tgate, bgdp, sn + voltages ............................32v swb voltage ............................................................36v maximum junction temperature........................... 125c operating temperature range (note 2)....? 40c to 85c storage temperature range ...................?65c to 125c (note 1) electrical characteristics the l denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c, v in = 5v unless otherwise noted. (note 2) parameter conditions min typ max units minimum operation voltage 3mm) plastic dfn t jmax = 125c, ja = 43c/w exposed pad is gnd (pin 17), must be soldered to pcb order information lead free finish tape and reel part marking package description temperature range lt3740edhc#pbf lt3740edhc#trpbf 3740 16-lead (5mm 3mm) plastic dfn ? 40c to 85c lead based finish tape and reel part marking package description temperature range lt3740edhc lt3740edhc#tr 3740 16-lead (5mm 3mm) plastic dfn ? 40c to 85c consult ltc marketing for parts speci? ed with wider operating temperature ranges. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel speci? cations, go to: http://www.linear.com/tapeandreel/
lt3740 3 3740fc electrical characteristics note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. the l denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c, v in = 5v unless otherwise noted. (note 2) parameter conditions min typ max units shdn voltage to enable device o 1.1 v shdn voltage to disable device o 0.5 v tgate on voltage 5.5 v tgate off voltage 0.2 v bgate on voltage 5.5 v bgate off voltage 0.2 v tgate rise time c load = 3300pf 30 ns tgate fall time c load = 3300pf 30 ns bgate rise time c load = 3300pf 50 ns bgate fall time c load = 3300pf 50 ns pgood threshold o 720 740 765 mv pgood low voltage i pgood = 100a o 0.2 v pgood current capacity 500 a internal boost switching frequency 0.8 1 1.2 mhz internal boost switch current limit 360 440 520 ma (bias C v in ) in operation 7.8 v (bias C v in ) to start controller 7.2 v note 2: the lt3740e is guaranteed to meet performance speci? cations from 0c to 85c. speci? cations over the C40c to 85c operating temperature range are assured by design, characterization and correlation with statistical process controls. note 3: the minimum off time of the lt3740 application consists of the minimum bgate on time, the delay from tgate off to bgate on (80ns) and the delay from bgate off to tgate on (80ns). typical performance characteristics transient response transient response shutdown pin start-up (t a = 25c, unless otherwise noted) load step 0a to 10a v in = 10v, v out = 2.5v figure 4 circuit v out 50mv/div i l 5a/div 3740 g01 20s/div load step 0a to 10a v in = 5v, v out = 1.8v page 17 circuit v out 50mv/div i l 5a/div 3740 g02 10s/div 3740 g03 v in = 10v, v out = 2.5v i load = 3a shdn 2v/div v o 2v/div i l 2a/div 2ms/div
lt3740 4 3740fc typical performance characteristics shutdown vs maximum v c v c vs current sensing threshold feedback reference voltage vs temperature pgood threshold vs temperature shutdown threshold vs temperature switching frequency vs temperature shutdown (v) 0 maximum v c (v) 1.0 0.8 1.6 1.4 1.8 1.2 2.0 3740 g07 0.6 0.4 0.2 0 1.5 2 1 0.5 2.5 3 v c (v) 1 current sensing threshold (mv) 150 250 200 300 3740 g08 100 50 0 1.4 1.6 1.5 1.3 1.1 1.2 1.7 1.8 range = v in range = open range = gnd temperature (c) C50 v fb (mv) 800 806 808 804 802 810 3740 g09a 798 796 792 794 790 25 75 50 0 C25 100 temperature (c) C50 v fb (mv) 740 760 750 770 3740 g09b 730 720 710 25 50 0 C25 75 100 temperature (c) C50 0.8 1.1 1.0 0.9 1.2 3740 g10 0.7 0.6 0.5 0.4 25 50 0 C25 75 100 shdn (v) temperature (c) C50 controller frequency (khz) 300 315 310 305 320 3740 g11 295 290 285 280 25 50 0 C25 75 100 (t a = 25c, unless otherwise noted) xref pin start-up load regulation current limit vs bottom gate on-time ss 0.5v/div v o 2v/div i l 2a/div 3740 g04 v in = 10v, v out = 2.5v i load = 3a 2ms/div load current (a) 0 dv out (%) C0.3 C0.4 C0.1 C0.2 0 8 3740 g05 C0.5 C0.6 C0.7 C0.8 2 4 6 10 range = v in range = open range = gnd v in = 10v v out = 2.5v r s = 12m bottom gate on duty cycle (%) 30 current sensing limit (mv) 100 80 160 140 180 120 200 90 3740 g06 60 40 20 0 50 60 40 70 80 100 range = v in range = open range = gnd
lt3740 5 3740fc error ampli? er transconductance vs temperature bias-v in to enable controller vs temperature undervoltage lockout threshold vs temperature pin functions sn C (pin 1): negative current sensing pin. connect this pin to the source of the bottom mosfet for no r sense or to a current sense resistor. pgnd (pin 2): power ground. connect this pin closely to the source of the bottom n-channel mosfet. bgate (pin 3): bottom gate drive. drives the gate of the bottom n-channel mosfet. bgdp (pin 4): bottom gate drive power supply. connect this pin to a voltage source higher than 7v (v in or bias). sn + (pin 5): positive current sensing pin. connect this pin to the drain of the bottom mosfet for no r sense or to a current sense resistor. sw (pin 6): switch node. connect this pin to the source of the top n-channel mosfet and the drain of the bottom n-channel mosfet. tgate (pin 7): top gate drive. drives the gate of the top n-channel mosfet to bias. bias (pin 8): top gate drive power supply. connect a capacitor between this pin and v in . swb (pin 9): switch pin of the internal boost. connect the boost inductor here. v in (pin 10): input supply pin. must be locally bypassed with a capacitor. range (pin 11): current limit range select pin. ground this pin for 50mv current sense voltage limit. leave this pin open for 80mv current sense voltage limit. connect this pin to v in for current sense voltage limit of 105mv. pgood (pin 12): power good output. open collector logic output that is pulled low when the fb voltage lower than 720mv. shdn (pin 13): shutdown pin. connect to 2.5v or higher to enable device; 0.5v or less to disable device. also, this pin functions as soft-start when a voltage ramp is applied. xref (pin 14): external reference pin. this pin sets the fb voltage externally between 0v and 0.8v. it can be used to slave the output voltage during normal operation or the output start-up behavior to an external signal source. tie this pin to 1v or higher to use the internal 0.8v reference. fb (pin 15): feedback pin. pin voltage is regulated to 0.8v if internal reference is used or to the xref pin if voltage is between 0v and 0.8v. connect the feedback resistor divider to this pin. temperature (c) C50 error amp (s) 340 390 370 380 350 360 400 3740 g12 330 320 310 300 25 50 0 C25 75 100 temperature (c) C50 bias-v in (v) 7.20 7.45 7.35 7.40 7.25 7.30 7.50 3740 g13 7.15 7.10 7.05 7.00 25 50 0 C25 75 100 temperature (c) C50 undervoltage lockout v in (v) 2.0 2.5 1.5 3.0 3740 g14 1.0 0.5 0 25 50 0 C25 75 100 typical performance characteristics (t a = 25c, unless otherwise noted)
lt3740 6 3740fc block diagram C + + C + C + C + C + + C + C 1.2mhz oscillator ramp generator v ref 0.80v 300khz oscillator ramp generator switch logic bias q1 8 16 13 14 15 12 7 6 4 3 2 5 1 11 v c shdn xref fb pgood tgate sw bgdp bgate pgnd sn + sn C range g m swb a2 a3 a1 g m rq 0.72v s v in 7.8v 3740 bd 9 10 + pin functions v c (pin 16): error ampli? er compensation pin. connect the external compensation rc to this pin. the current comparator threshold increases with the voltage of this pin. exposed pad (pin 17): ground. must be soldered to pcb ground.
lt3740 7 3740fc operation the lt3740 is a constant-frequency, valley current mode controller for dc/dc step-down converters. at the start of each oscillator cycle, the switch logic is set, which turns on the bottom mosfet. after a 500ns blanking time, the bottom mosfet current is sensed and added to a stabilizing ramp, and the resulting sum is fed into the pwm comparator a1. when this voltage goes below the voltage at v c pin, the switch logic is reset, which turns off the bottom mosfet, and turns on the top mosfet. the top mosfet remains on until the next oscillator cycle. the bottom mosfet current can be determined by sensing the voltage between the drain and source of the mosfet using the bottom mosfet on-resistance, or by sensing the voltage drop across a resistor between the source of the bottom mosfet and ground. the two current sensing pins are sn + and sn C . the g m error ampli? er adjusts the voltage on the v c pin by comparing the feedback signal v fb with the reference, which is determined by the lower of the internal 0.8v reference and the voltage at the xref pin. if the error ampli? ers output increases, more current is delivered to the output; if it decreases, less current is delivered. the lt3740 features an open collector pgood signal. when the voltage at fb pin is less than 720mv, the pgood output is pulled low by a npn transistor. the 720mv threshold is independent of the voltage on xref pin. the small internal step-up converter provides a bias voltage about 7v higher than the input voltage v in for the drive of the top mosfet. this enables the lt3740 to work from an input voltage as low as 2.2v. the controller starts operation when the bias pin is about 7v higher than v in pin. the voltage supply for the bottom mosfet drive is provided through the bgdp pin. for v in lower than 7v, bgdp should be connected to bias to get enough drive bias. for v in higher than 7v, bgdp can be connected directly to v in to reduce power loss. grounding the shdn pin turns both the internal step-up converter and the controller off. the shdn pin can also be used to implement an optional soft-start function. start-up and shutdown during normal operation, when the feedback voltage is above 720mv, the lt3740 operates in forced continuous mode. when the feedback voltage is below 720mv, either during the start-up or because an external reference is applied, a zero current detect comparator is enabled to monitor the on-state bottom mosfet current. when the current reaches zero, both the top and bottom mosfets are turned off, resulting in discontinuous operation. during the time that both top and bottom mosfets are off, no current signal is fed into the lt3740. only the stabilizing ramp is fed into the pwm comparator to decide the next turn on of the top mosfet. the lt3740 uses the shdn pin to implement one of the two different startup schemes. as shown in the block diagram, the v c pin is clamped to shdn pin through a pnp transistor. if the shdn pin is slowly ramped up, the v c pin will track it up proportionally. as the v c pin voltage is compared to the current signal at comparator a1, this will, in turn, slowly ramp up the switching current. the tracking capability built into xref can be used to implement another startup scheme. if less than 0.8v is applied to xref, the lt3740 will use this voltage as the reference for regulation. slowly ramping up the voltage at xref forces the output to increase slowly, which limits the start-up current, as shown in typical performance characteristics. a sharp shdn signal is recommended to shut down the lt3740. if shdn slowly ramps down, the v c signal will be dragged low for a considerable period of time before shdn reaches its turn-off threshold. during this period of time, the output voltage could still be in regulation and the circuit operates in forced continuous mode. a low v c voltage will result in large bottom mosfet on-time, which may cause a reverse inductor current that pumps the energy from the output to the input. if there is another supply at the output or the output has a big capacitor, the input voltage could overshoot, and may cause overvoltage damage to certain devices.
lt3740 8 3740fc current sensing range inductor current is determined by measuring the voltage across a sense resistance C either the on-resistance of the bottom mosfet or an external sensing resistor. the maximum current sense threshold has three steps that are selected by the range pin. the current sense threshold voltage without slope compensation is shown in table 1. this is the value for high duty cycle operation. table 1. current sensing thresholds range pin current sensing threshold ground 50mv open 80mv v in 105mv slope compensation the lt3740 has a compensation slope to stabilize the constant-frequency valley mode operation. the slope compensation signal increases with the bottom gate duty cycle, which results in a current sense threshold voltage change with duty cycle as shown in the ? gure in typical performance characteristics. the three current limit levels correspond to three compensation slopes. the compensation slope needs to overcome the difference between the up and down slope of the inductor current to avoid sub-harmonic oscillation. maximum compensa- tion slope is required for high input voltages, where the duty cycle is small. the compensation slope can only be selected by the range pin. in the case of insuf? cient compensation slope, the inductor ripple current or the sensing resistance needs to be reduced. reverse current limit because the lt3740 operates in forced continuous mode when the feedback voltage is higher than 720mv, the inductor current can go negative on occasion, such as light load, shutting down with a slow shdn signal, large load step-down transient response, or the output voltage being pulled up by some other power supply. the lt3740 has a reverse current comparator to limit the reverse current. during the on-time of the bottom mosfet, when (v sn +)C(v sn C) reaches 40mv, the comparator is triggered and turns off the bottom mosfet. when operated under light load, the inductor current goes negative every cycle. the design of the inductor current ripple and the sensing resistor need to ensure that the reverse current comparator is not triggered during normal operation. power mosfet selection the lt3740 requires two external n-channel power mosfets, one for the top switch and one for the bottom switch. important parameters for the power mosfets are the breakdown voltage v (br)dss , threshold voltage v (gs)th , on-resistance r ds(on) , reverse transfer capacitance c rss and maximum current i ds(max) . when the bottom mosfet is used as the current sense element, particular attention must be paid to the initial varia- tion, the gate-source voltage effect and the temperature characteristics of its on-resistance. mosfet on-resistance decreases as the gate-source voltage increases. the change of bgdp voltage could affect the bottom mosfet gate voltage. refer to the mosfet datasheet for the mosfet on-resistance corresponding to certain gate voltage. mosfet on-resistance is typically speci? ed with a maximum value r ds(on) at 25c. in this case, additional margin is required to accommodate the rise in mosfet on-resistance with temperature: r ds(on) = r sense / t applications information
lt3740 9 3740fc applications information figure 1. mosfet r ds(on) vs. temperature the t term is a normalization factor (unity at 25c) accounting for the signi? cant variation in on-resistance with temperature, typically about 0.4%/c as shown in figure 1. for a maximum junction temperature of 100c, using a value t = 1.3 is reasonable. gate drives the top gate drive power is provided by bias which is about 7.8v higher than v in . the top gate voltage can be as high as 7.8v and can droop to about 5.5v if the on-time is long enough. the bottom gate drive power is provided by the bgdp pin. bgdp needs to be connected to 7v or higher to get enough gate drive voltage for logic-level threshold mosfets. bgdp can be connected to v in , bias or an external voltage supply. for input voltages lower than 7v, bgdp should be connected to bias to be able to use logic-level threshold mosfets. for v in higher than 7v, bgdp can be connected to v in to reduce power loss in the bottom gate drive. for high bgdp voltages, the internal clamp circuit limits the bottom gate drive voltage to about 8v to prevent the gate from overvoltage damage. for the case bgdp is connected to v in , if v in voltage ramp up slowly during startup, there will be a considerable period of time that bgdp is below 7v and the circuit is operating. the insuf? cient voltage on bgdp could cause malfunction t j C junction temperature (c) C50 0 r ds(on) C on resistance (normalized) 0.4 1.2 0.8 1.6 2.0 C25 0 50 25 75 3740 f01 100 125 150 v gs = 10v i d = 14a of the circuit. one of the solution circuits is shown in figure 2. the zener diode and the small mosfet limit the shdn voltage to be about 6v below v in . this shuts down the lt3740 for v in lower than 7v. if v in can ramp up to 7v quick enough, this circuit is not necessary. for v in higher than 14v, the high dv/dt at sw node and the strong drive of bgate can generate extra noise and affect the operation. a resistor r bg of 1-2 between bgate and the gate of the bottom mosfet as shown in figure 3 can effectively reduce the noise. the lt3740 uses adaptive dead time control to prevent the top and bottom mosfet shoot-through and minimize the dead time. when the internal top mosfet on signal comes, the lt3740 delays the turn on of tgate until bgate is off. when the internal bottom mosfet on signal comes, the lt3740 delays the turn on of bgate until the sw node swings down to ground. in the case of small or negative inductor current that sw node cannot swing below ground after tgate turns off, bgate will turn on 200ns after tgate is off. figure 2. circuit that prevents operation for v in < 7v figure 3. noise reduction for bottom mosfet v in shdn bgdp lt3740 2n7002ta 100k mmsz52312bs 3740 f02 sw pgnd bgate lt3740 r bg m2 3740 f03
lt3740 10 3740fc applications information choose mosfet sensing or resistor sensing the lt3740 can use either the bottom mosfet on- resistance or an external sensing resistor for current sensing. simplicity and high ef? ciency are the bene? ts of using bottom mosfet on-resistance. however, some mosfets have a wide on-resistance variation. as discussed previously, the gate-source voltage and the temperature also affect the mosfet on-resistance. these factors affect the accuracy of the inductor current limit. the inductor saturation current will need enough margin to cover the current limit variation. in the cases where the input voltage supply has suf? cient current limit, a wide current limit variation of the controller may be tolerated. as the load increases to reach the input supply current limit, the input voltage corrupts, and limits the total power in the circuit. to reduce the current limit variation, a more accurate external sensing resistor can be used between the bottom mosfet source and ground. connect sn + and sn C pins to the two terminals of the resistor. power dissipation the resulting power dissipation in the mosfets are: p top = d top ? i l 2 ? r ds(on) , top p bot = d bot ? i l 2 ? r ds(on) , bot if an external sensing resistor is used, the extra power dissipation in the sensing resistor is: p rs = d bot ? i l 2 ? rs the power losses in the bottom mosfet and external sensing resistor are greatest during an output short-circuit, where maximum inductor current and maximum bottom duty cycle occur. besides i 2 r power loss, there are transition losses and gate drive losses. the transition losses that increase with the input voltage and inductor current are mainly in the top mosfet. the losses can be estimated with a constant k = 1.7a C1 as: transition loss = k ? v in 2 ? i l ? c rss ? f s the gate drive losses increase with the gate drive power supply voltage, gate voltage and gate capacitance as shown below: p gd,top = v bias ? c gs,top ? v gs,top ? f s p gd,bot = v bgdp ? c gs,bot ? v gs,bot ? f s duty cycle limits at the start of each oscillator cycle, the top mosfet turns off and the bottom mosfet turns on with a 500ns duty cycle on the top mosfet. if the maximum duty cycle is reached, due to a dropping input voltage for example, the output voltage will droop out of regulation. lower ripple current reduces core losses in the inductor, esr losses in the output capacitors and output voltage ripple. the highest ef? ciency is obtained with a small ripple current. however, achieving this requires a large inductor. there is a trade off between component size and ef? ciency. a reasonable starting point is to choose a ripple current that is about 30% of i out(max) . the largest ripple current occurs at the highest v in . to guarantee that ripple current does not exceed a speci? ed maximum, the inductance should be chosen according to: l = 1? v out v in(max) ? ? ? ? ? ? ? v out f s ? i l(max) ? ? ? ? ? ?
lt3740 11 3740fc applications information once the value for l is known, the type of inductor must be selected. high ef? ciency converters generally cannot afford the core loss found in low cost powdered iron cores; instead use ferrite, molypermalloy or kool m ? cores. a variety of inductors designed for high current, low voltage applications are available from manufacturers such as sumida, panasonic, coiltronics, coilcraft and toko. schottky diode d1 selection the schottky diode d1 shown in figure 4 conducts dur- ing the dead time between the conduction of the power mosfet switches. it is intended to prevent the body diode of the bottom mosfet from turning on and storing charge during the dead time, which can cause a modest (about 1%) ef? ciency loss. the diode can be rated for about one half of the full load current since it is on for only a fraction of the duty cycle. in order for the diode to be effective, the inductance between it and the bottom mosfet must be as small as possible, mandating that these components be placed adjacently. another important bene? t of the schottky diode is that it reduces the sw node ringing at switching edges, which reduces the noise in the circuit and also makes the mosfets more reliable. c in and c out selection the input capacitance c in is required to ? lter the square wave current at the drain of the top mosfet. use a low esr capacitor sized to handle the maximum rms current. i rms i out(max) ? v out v in ? v in v out ? 1 this formula has a maximum at v in = 2v out , where: i rms = 1 2 ?i out(max) this simple worst-case condition is commonly used for design because even signi? cant deviations do not offer much relief. note that ripple current ratings from capacitor manufacturers are often based on only 2000 hours of life which makes it advisable to derate the capacitor. the selection of c out is primarily determined by the esr required to minimize voltage ripple and load step transients. the output ripple v out is approximately bounded by: v out < l l ?esr + 1 8?f s ?c out ? ? ? ? ? ? since i l increases with input voltage, the output ripple is highest at maximum input voltage. typically, once the esr requirement is satis? ed, the capacitance is adequate for ? ltering and has the necessary rms current rating. multiple capacitors placed in parallel may be needed to meet the esr and rms current handling requirements. dry tantalum, special polymer, aluminum electrolytic and ceramic capacitors are all available in surface mount packages. special polymer capacitors offer very low esr but have lower capacitance density than other types. tantalum capacitors have the highest capacitance density but it is important to only use types that have been surge tested for use in switching power supplies. aluminum electrolytic capacitors have signi? cantly higher esr, but can be used in cost-sensitive applications providing that consideration is given to ripple current ratings and long term reliability. ceramic capacitors have excellent low esr characteristics but can have a high voltage coef? cient and audible piezoelectric effects. the high q of ceramic capacitors with trace inductance can also lead to signi? cant ringing. when used as input capacitors, care must be taken to ensure that ringing from inrush currents and switching does not pose an overvoltage hazard to the power switches and controller. to dampen input voltage transients, add a small 5f to 50f aluminum electrolytic capacitor with an esr in the range of 0.5 to 2.
lt3740 12 3740fc applications information current limit the maximum inductor current is inherently limited in a current mode controller by the maximum sense voltage. in the lt3740, the maximum sense voltage is selected by the range pin. with valley current control, the maximum sense voltage and the sense resistance determine the maxi- mum allowed inductor valley current. the corresponding output current limit is: i limit = v sn(max) r s + i l 2 the current limit value should be checked to ensure that i limit(min) > i out(max) . the maximum sense voltage in- creases as duty cycle decreases. if mosfet on-resistance is used for current sensing, it is important to check for self-consistency between the assumed mosfet junction temperature and the resulting value of i limit which heats the mosfet switches. in the event of output short-circuit to ground, the lt3740 operates at maximum inductor current and minimum duty cycle. the actual inductor discharging voltage is the voltage drop on the parasitic resistors including bottom mosfet on-resistance, inductor esr, external sensing resistor if it is used and the actual short-circuit load resistance. because of the big variation of these parasitic resistances, the top mosfet on-time can vary considerably for the same input voltage. in the case of high input voltage and low parasitic resistance, pulse-skipping may happen. ef? ciency considerations the percent ef? ciency of a switching regulator is equal to the output power divided by the input power times 100%. it is often useful to analyze individual losses to determine what is limiting the ef? ciency and which change would produce the most improvement. although all dissipative elements in the circuit produce losses, four main sources account for most of the losses in lt3740 circuits: 1. dc i 2 r losses. these arise from the on-resistances of the mosfets, external sensing resistor, inductor and pc board traces and cause the ef? ciency to drop at high output currents. the average output current ? ows through the inductor, but is chopped between the top and bottom mosfets. if the two mosfets have approximately the same r ds(on) , then the resistance of one mosfet can simply be summed with the resistances of l and the board traces to obtain the dc i 2 r loss. for example, if r ds(on) = 0.01 and r l = 0.005, the loss will range from 15mw to 1.5w as the output current varies from 1a to 10a. 2. transition loss. this loss arises from the brief amount of time the top mosfet spends in the saturated region during switch node transitions. it depends upon the input voltage, load current, driver strength and mosfet capacitance, among other factors. the loss is signi? cant at high input voltages and can be estimated from: transition loss = (1.7a C1 ) ? v in 2 ? i out ? c rss ? f s 3. gate drive loss. the previous formula show the factors of this loss. for the top mosfet, nothing can be done other than choosing a small c gs mosfet without sacri? cing on-resistance. for the bottom mosfet, the gate drive loss can be reduced by choose the right bgdp voltage supply. 4. c in loss. the input capacitor has the dif? cult job of ? ltering the large rms input current to the regulator. it must have a very low esr to minimize the ac i 2 r loss and suf? cient capacitance to prevent the rms current from causing additional upstream losses in fuses or batteries. other losses, including c out esr loss, schottky diode d1 conduction loss during dead time and inductor core loss generally account for less than 2% additional loss. when making adjustments to improve ef? ciency, the input current is the best indicator of changes in ef? ciency. if a change is made and the input current decreases, then the ef? ciency has increased. if there is no change in input current, then there is no change in ef? ciency.
lt3740 13 3740fc applications information checking transient response the regulator loop response can be checked by looking at the load transient response. switching regulators take several cycles to respond to a step in load current. when a load step occurs, v out immediately shifts by an amount equal to i load *(esr), where esr is the effective series resistance of c out . i load also begins to charge or discharge c out generating a feedback error signal used by the regulator to return v out to its steady-state value. during this recovery time, v out can be monitored for overshoot or ringing that would indicate a stability problem. the v c pin external components shown in figure 2 will provide adequate compensation for most applications. for a detailed explanation of switching control loop theory see application note 76. step-up converter inductor selection the step-up converter in the lt3740 provides a bias voltage about 7v higher than the input voltage v in for the top mosfet drive and most of the internal controller circuitry. the step-up converter has a current limit of 400ma. an inductor ripple current from 100ma to 200ma is a reasonable design for the converter. for this consideration, a 22h or 47h inductor is recommended for most of the lt3740 applications. small size and high ef? ciency are the major concerns. inductors with low core losses and small dcr at 1mhz are good choices. some inductors in this category with small size are listed in table 2. table 2. recommended inductors for step-up converter part number dcr () current rating (ma) manufacturer lqh3c220 0.71 250 murata 814-237-1431 www.murata.com elt5kt-220 0.9 420 panasonic 714-373-7334 www.panasonic.com cdrh3d16-220 cr32-470 0.43 0.97 400 330 sumida 847-956-0666 www.sumida.com the step-up converter inductor current is the greatest when the input voltage is the lowest. larger cgs of the mosfets results in large inductor current. connecting the bgdp pin to the bias pin also greatly increases the inductor current. the saturation current of the inductor needs to cover the maximum input current. the step-up inductor current decreases as the input voltage increases. for high input voltages, the step-up converter will begin skipping pulses. although this will result in some low frequency ripple, the bias voltage remains regulated on an average basis, and the step-down controller opera- tion is not affected. for v in higher than 10v step-up inductor saturation current should be higher than 400ma. for v in lower than 10v, a lower current rating inductor could be used. the inductor rms current should be higher than 250ma, and the inductance should not be less than 10h at 400ma. step-up converter capacitor selection the small size of ceramic capacitors makes them ideal for the output of the lt3740 step-up converter. x5r and x7r types are recommended because they retain their capacitance over wider voltage and temperature ranges than other types such as y5v or z5u. a 1f capacitor is recommended for the output of the lt3740 step-up converter. table 3. recommended ceramic capacitor manufacturers manufacturer phone url taiyo yuden 408-573-4150 www.t-yuden.com murata 814-237-1431 www.murata.com kemet 408-986-0424 www.kemet.com design example as a design example, take a supply with the following speci? cations: v in = 7v to 20v (15v nominal), v out = 2.5v 5%, i out(max) = 10a. first, choose the inductor for about 30% ripple current at nominal v in : l = 2.5v (300khz) ? 0.3 ? 10a ?1? 2.5v 15v ? ? ? ? ? ? = 2.3 h
lt3740 14 3740fc applications information selecting a standard value of 2.0h results in a ripple current of: i l = 2.5v (300khz) ?(2 h) ?1? 2.5v 15v ? ? ? ? ? ? = 3.47a set range = v in . at minimum input voltage v in = 7v, the maximum current sensing voltage is 145mv. use an external sensing resistor of 12m. the inductor current valley will be clamped to 12a. the ripple current at v in = 7v is 2.68a, there is about 33% of margin for the 10a load current to cover the maximum current sensing voltage variation. for the case of using mosfet on-resistance for current sensing, choosing a si4840 (r ds(on) = 0.008 (nom) 0.0095 (max) for v gs = 7v, ja = 40c/w) yields a nominal sense voltage of: v sn(nom) = (10a)(1.3)(0.0095) =123mv to check if the current limit is acceptable, assume a junc- tion temperature of about 55c above a 70c ambient with 125c = 1.5: i limit = 145mv 1.5 ? 0.0095 + 2.68a 2 = 11.5a double check the assumed t j in the mosfet at v in = 7v with maximum load current: p bot = d bot ? il 2 ? r ds(on) , bot p bot = 1? 2.5v 7v ? ? ? ? ? ? ?10a () 2 ? 1.5 ? 0.0095 = 0.92w double check the assumed t j in the mosfet: t j = 70c + (0.92w)(40c/w) = 107c the power dissipation in the bottom mosfet increases with input voltage. for v in = 20v, p bot = 1? 2.5v 20v ? ? ? ? ? ? ?10a () 2 ? 1.5 ? 0.0095 = 1.25w double check the assumed t j in the mosfet: t j = 70c + (1.25w)(40c/w) = 120c choose a si4840 (c rss = 200pf) for the top mosfet and check its power dissipation at maximum load current with 100c = 1.3: p top = 2.5v 20v ?10a () 2 ? 1.3 ? 0.0095 + 17 ?(20v) 2 ? 10a ? 200pf ? 300khz = 0.15w + 0.41w = 0.56w t j = 70c + (0.56w)(40c/w) = 92c this analysis shows that careful attention to heat sinking will be necessary in this circuit. check the reverse current comparator margin. the maxi- mum ripple current happens at maximum input voltage: i l(max) = 2.5v 300khz ? 2 h ?1? 2.5v 20v ? ? ? ? ? ? = 3.65a at no load, the maximum reverse current voltage is: r s ? i l(max) 2 = 12m ? 3.65a 2 = 22mv
lt3740 15 3740fc applications information which is adequately lower than the 35mv reverse current comparator threshold. c in is chosen for an rms current rating of about 5a at 85c. the output capacitors are chosen for a low esr of 0.005 to minimize output voltage changes due to inductor ripple current and load steps. the ripple voltage will be only: v out(ripple) = i l ? (esr) = (3.47a)(0.005) = 17mv however, a 0a to 10a load step will cause an output change of up to: v out(step) = i load ? (esr) = (10a)(0.005)= 50mv an optional 100f ceramic output capacitor is included to minimize the effect of esl in the output ripple. for the step-up converter, at v in = 7v, step-up inductor current is about 27ma. choose a 22h inductor and a 1f output capacitor. the complete circuit is shown in figure 4. figure 4. design example: 2.5v/10a output swb v in shdn 100k 100k 1 f xref range pgood v c bgdp bias tgate sw pgnd bgate gnd lt3740 sn + sn C fb 3740 f04 l1 2.0h c b 1f v out 2.5v 10a v in 7v to 20v m1 si4840 m2 si4840 r s 12m 100f 6.3v 680f 4v s 2 c in 100f 35v l2 22h 100k 100pf 18pf 10k 21k d1 6cwq03fn
lt3740 16 3740fc applications information pc board layout considerations as with all switching regulators, careful attention must be paid to the pcb board layout and component placement. q place the power components close together with short and wide interconnecting trances. the power components consist of the top and bottom mosfets, the inductor, c in and c out . one way to approach this is to simply place them on the board ? rst. q similar attention should be paid to the power components that make up the boost converter. they should also be placed close together with short and wide traces. q always use a ground plane under the switching regulator to minimize interplane coupling. q minimize the parasitic inductance in the loop of c in , mosfets and d1 which carries large switching current. q use compact plane for switch node (sw) to improve cooling of the mosfets and to keep emi low. q use planes for v in and v out to maintain good voltage ? ltering and to keep power losses low. unused areas can be ? lled with copper and connect to any dc node (v in , v out , gnd) q place c b close to bias pin and input capacitor. q keep the high dv/dt nodes (sw, tg, bg, swb) away from sensitive small signal nodes.
lt3740 17 3740fc typical applications high ef? ciency step-down converter ef? ciency vs load current swb v in shdn xref range v c bgdp bias tgate sw sn + bgate gnd lt3740 sn C pgnd fb 3740 ta02a 3.4h 1f 0.47f v out 3.3v 10a v in 7v to 20v m1 hat2168h m2 hat2165h 100f s 3 20f 22pf 22h 16k 15k 10k 1500pf 22pf 80.6k 255k 2k 1 1 d1 b340a 1 load current (a) 0 efficiency (%) 90 94 92 98 96 8 3740 ta02b 88 86 84 82 80 2 4 6 10 v in = 7v v in = 15v v in = 20v v out = 3.3v
lt3740 18 3740fc 2.5v/10a typical applications efficiency swb v in shdn xref range v c bgdp bias tgate sw sn + bgate gnd lt3740 sn C pgnd fb 3740 ta03a 1.05h 1f 1f v out 2.5v v in 4v to 15v m1 hat2168h m2 hat2165h 100f s 3 22f s 2 47pf 22h 7.5k 10k 10k 680pf 22pf 46.4k 100k 5.1k 1 1 d1 b340a 1 load current (a) 0 efficiency (%) 86 94 88 90 92 96 3740 ta03b 84 82 80 46 2 8 10 v in = 4v v in = 15v v out = 2.5v
lt3740 19 3740fc information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. package description dhc package 16-lead plastic dfn (5mm 3mm) (reference ltc dwg # 05-08-1706) 3.00 p 0.10 (2 sides) 5.00 p 0.10 (2 sides) note: 1. drawing proposed to be made variation of version (wjed-1) in jedec package outline mo-229 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package 0.40 p 0.10 bottom viewexposed pad 1.65 p 0.10 (2 sides) 0.75 p 0.05 r = 0.115 typ r = 0.20 typ 4.40 p 0.10 (2 sides) 1 8 16 9 pin 1 top mark (see note 6) 0.200 ref 0.00 C 0.05 (dhc16) dfn 11 0 0.25 p 0.05 pin 1 notch 0.50 bsc 4.40 p 0.05 (2 sides) recommended solder pad pitch and dimensions 1.65 p 0.05 (2 sides) 2.20 p 0.05 0.50 bsc 0.65 p 0.05 3.50 p 0.05 package outline 0.25 p 0.05
lt3740 20 3740fc linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 o fax: (408) 434-0507 o www.linear.com ? linear technology corporation 2006 lt 0908 rev c ? printed in usa related parts typical application part number description comments ltc1778 no r sense , step-down synchronous dc/dc controller v in : 4v to 36v, fast transient responds, current mode, i out 20a ltc1876 2-phase, dual synchronous step-down switching controller current mode; 20a per channel lt3430/lt3431 monolithic 3a, 200khz/500khz step-down switching regulator v in : 5.5v to 60v, 0.1 saturation switch, 16-lead ssop package ltc3708 no r sense , dual, 2-phase, synchronous dc/dc controller v in : 4v to 36v, current mode, up/down tracking, synchronizable ltc3728l dual, 2-phase synchronous step-down controller v in : 4v to 36v, 550khz, pll: 250khz to 550khz ltc3778 wide operating range, no r sense step-down controller single channel, separate v on programming ltc3824 high voltage, wide input range, step-down controller with low i q v in : 4v to 60v, i q = 40a, 100% duty cycle, 2a p-channel gate drive, 10-pin msop high ef? ciency step-down converter swb v in shdn xref range v c bgdp bias tgate sw sn + bgate gnd lt3740 sn C pgnd fb 3740 ta04 3.4h 1f 0.47f v out 3.3v 10a v in 7v to 20v m1 hat2168h m2 hat2165h 100f s 3 20f 22pf 22h 16k 15k 10k 1500pf 22pf 80.6k 255k 2k 1 1 d1 b340a 1

▲Up To Search▲

Price & Availability of LT3740EDHC-TRPBF

	To Download LT3740EDHC-TRPBF Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .