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revisions ltr description date (yr-mo-da) approved a changes in accordance with nor 5962-r041-92 91-11-25 m. l. poelking b changes in accordance with nor 5962-r211-93 93-08-13 m. l. poelking c add device class level v. update boilerplate throughout. - ltg 97-07-17 t. m. hess d update boilerplate to mil-prf-38535 requirements. C ltg 01-06-14 thomas m. hess rev sheet rev cccdccdccccc sheet 15 16 17 18 19 20 21 22 23 24 25 26 rev status rev dcdddcccccccc c of sheets sheet 1234567891011121314 pmic n/a prepared by todd d. creek defense supply center columbus standard microcircuit drawing checked by ray monnin columbus, ohio 43216 http://www.d scc.dla.mil this drawing is available for use by all departments approved by don cool microcircuit, digital, cmos, bus controller remote terminal, and agencies of the department of defense drawing approval date 10 june 1988 monolithic silicon amsc n/a revision level d size a cage code 67268 5962-88628 sheet 1 of 26 dscc form 2233 apr 97 5962-e470-01 distribution statement a. approved for public release; distribution is unlimited.
standard microcircuit drawing size a 5962-88628 defense supply center columbus columbus, ohio 43216-5000 revision level c sheet 2 dscc form 2234 apr 97 1. scope 1.1 scope. this drawing documents has two product assurance class levels consisting of high reliability (device classes q and m) and space application (device class v). a choice of case outlines and lead finishes are available and are reflected in the part or identifying number (pin). when available, a choice of radiation hardness assurance (rha) levels are reflected in the pin. 1.2 pin. the pin is as shown in the following examples. for device classes m and q: 5962 - 88628 01 x x ?? ? ? ? ?? ? ? ? ? ? ? ? ? federal rha device case lead stock class designator type outline finish designator (see 1.2.1) (see 1.2.2) (see 1.2.4) (see 1.2.5) \ / \/ drawing number for device class v: 5962 h 88628 01 v x x ?? ?? ?? ?? ?? ?? ? ? ? ? ? ? federal rha device device case lead stock class designator type class outline finish designator (see 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5) \ / (see 1.2.3) \/ drawing number 1.2.1 rha designator. device classes q and v rha marked devices meet the mil-prf-38535 specified rha levels and are marked with the appropriate rha designator. device class m rha marked devices meet the mil-prf-38535, appendix a specified rha levels and are marked with the appropriate rha designator. a dash (-) indicates a non-rha device. 1.2.2 device type(s). the device type(s) identify the circuit function as follows: device type generic number circuit function 01 ut1553 bcrt bus controller remote terminal 1.2.3 device class designator. the device class designator is a single letter identifying the product assurance level as list ed below. since the device class designator has been added after the original issuance of this drawing, device classes m and q designators will not be included in the pin and will not be marked on the device. device class device requirements documentation m vendor self-certification to the requirements for mil-std-883 compliant, non-jan class level b microcircuits in accordance with mil-prf-38535, appendix a q or v certification and qualification to mil-prf-38535
standard microcircuit drawing size a 5962-88628 defense supply center columbus columbus, ohio 43216-5000 revision level d sheet 3 dscc form 2234 apr 97 1.2.4 case outline(s). the case outline(s) are as designated in mil-std-1835 and as follows: outline letter descriptive designator terminals package style t cqcc1-f132 132 leaded chip carrier with unformed leads x cmga15-p84 84 pin grid array y cqcc2-j84 84 leaded chip carrier with unformed leads z cqcc1-n84 84 square chip carrier 1.2.5 lead finish. the lead finish is as specified in mil-prf-38535 for device classes q and v or mil-prf-38535, appendix a for device class m. 1.3 absolute maximum ratings. 1 / supply voltage range ............................................................................. -0.3 v dc to +7.0 v dc dc input/dc output voltage range ......................................................... -0.3 v dc to (v cc ) +0.3 v dc storage temperature range .................................................................... -65 c to +150 c maximum power dissipation (p d ) 2/....................................................... 300 mw maximum junction temperature (t j )........................................................ +175 c thermal resistance, junction-to-case ( q jc ) ............................................ see mil-std-1835 latchup immunity (i lu ) ........................................................................... 150 ma output short-circuit current (i os ): a(0-15), d(0-15), dmar , dmack , stdintl , and hpint ............ 100 ma all other outputs ................................................................................. 200 ma 1.4 recommended operating conditions. supply voltage (v dd )............................................................................... 4.5 v dc to 5.5 v dc case operating temperature range (t c ) ................................................ -55 c to +125 c radiation features: total dose ......................................................................................... 3 1 x 10 6 rads (si) single event phenomenon (sep) effective linear energy threshold, no upsets or latchup (see 4.4.4.4) .......... 3 55 mev/(mg/cm 2 ) dose rate upset (20 ns pulse) ........................................................... 3/ dose rate latchup ............................................................................... 3/ dose rate survivability ....................................................................... 3/ neutron irradiated ............................................................................ > 1 x 10 14 1.5 digital logic testing for device classes q and v. fault coverage measurement of manufacturing logic tests (mil-std-883, test method 5012) ........................................ 86.5 percent 1/ stresses above the absolute maximum rating may cause permanent damage to the device. extended operation at the maximum levels may degrade performance and affect reliability. 2/ must withstand the added p d due to short circuit test, e. g., i os . 3/ when characterized as a result of the procuring activities request, the condition will be specified.
standard microcircuit drawing size a 5962-88628 defense supply center columbus columbus, ohio 43216-5000 revision level d sheet 5 dscc form 2234 apr 97 2. applicable documents 2.1 government specification, standards, and handbooks. the following specification, standards, and handbooks form a part of this drawing to the extent specified herein. unless otherwise specified, the issues of these documents are those liste d in the issue of the department of defense index of specifications and standards (dodiss) and supplement thereto, cited in the solicitation. specification military mil-prf-38535 - integrated circuits, manufacturing, general specification for. standards military mil-std-883 - test methods and procedures for microelectronics. mil-std-1835 - interface standard electronic conponent case outlines. handbooks military mil-hdbk-103 - list of standard microcircuit drawings. mil-hdbk-780 - standard microcircuit drawings. (unless otherwise indicated, copies of the specification, standards, and handbooks are available from the standardization document order desk, 700 robbins avenue, building 4d, philadelphia, pa 19111-5094.) 2.2 order of precedence. in the event of a conflict between the text of this drawing and the references cited herein, the tex t of this drawing takes precedence. nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. requirements 3.1 item requirements. the individual item requirements for device classes q and v shall be in accordance with mil-prf-38535 and as specified herein or as modified in the device manufacturer's quality management (qm) plan. the modification in the qm plan shall not affect the form, fit, or function as described herein. the individual item requirements for device class m shall be in accordance with mil-prf-38535, appendix a for non-jan class level b devices and as specified herein. 3.2 design, construction, and physical dimensions. the design, construction, and physical dimensions shall be as specified in mil-prf-38535 and herein for device classes q and v or mil-prf-38535, appendix a and herein for device class m. 3.2.1 case outline(s). the case outline(s) shall be in accordance with 1.2.4 herein. 3.2.2 terminal connections. the terminal connections shall be as specified on figure 1. 3.2.3 functional block diagram. the functional block diagram shall be as specified on figure 2. 3.2.4 test circuit and switching waveforms. the test circuit and switching waveforms shall be as specified on figure 3. 3.2.5 radiation exposure circuit. the radiation exposure circuit shall be as specified on figure 4. 3.3 electrical performance characteristics and postirradiation parameter limits. unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table i and shall apply over th e full case operating temperature range.
standard microcircuit drawing size a 5962-88628 defense supply center columbus columbus, ohio 43216-5000 revision level d sheet 5 dscc form 2234 apr 97 3.4 electrical test requirements. the electrical test requirements shall be the subgroups specified in table ii. the electri cal tests for each subgroup are defined in table i. 3.5 marking. the part shall be marked with the pin listed in 1.2 herein. in addition, the manufacturer's pin may also be marked as listed in mil-hdbk-103. for packages where marking of the entire smd pin number is not feasible due to space limitations, the manufacturer has the option of not marking the "5962-" on the device. for rha product using this option, the rha designator shall still be marked. marking for device classes q and v shall be in accordance with mil-prf-38535. marking for device class m shall be in accordance with mil-prf-38535, appendix a. 3.5.1 certification/compliance mark. the certification mark for device classes q and v shall be a "qml" or "q" as required in mil-prf-38535. the compliance mark for device class m shall be a "c" as required in mil-prf-38535, appendix a. 3.6 certificate of compliance. for device classes q and v, a certificate of compliance shall be required from a qml-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). for device class m, a certifica te of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in mil-hdbk-103 (see 6.6.2 herein). the certificate of compliance submitted to dscc-va prior to listing as an approved source of supply for this drawing shall affirm that the manufacturer's product meets, for device classes q and v, the requirements of mil-prf-38535 and herein or for device class m, the requirements of mil-prf-38535, appendix a and herein. 3.7 certificate of conformance. a certificate of conformance as required for device classes q and v in mil-prf-38535 or for device class m in mil-prf-38535, appendix a shall be provided with each lot of microcircuits delivered to this drawing. 3.8 notification of change for device class m. for device class m, notification to dscc-va of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change as defined in mil-prf-38535, appendix a. 3.9 verification and review for device class m. for device class m, dscc, dscc's agent, and the acquiring activity retain the option to review the manufacturer's facility and applicable required documentation. offshore documentation shall be made available onshore at the option of the reviewer.
standard microcircuit drawing size a 5962-88628 defense supply center columbus columbus, ohio 43216-5000 revision level c sheet 6 dscc form 2234 apr 97 table ia. electrical performance characteristics. test symbol conditions 4.5 v v dd 5.5 v 1/ -55 c t c +125 c unless otherwise specified group a subgroups device type limits unit min max low level input voltage ttl inputs v il 1, 2, 3 all 0.8 v high level input voltage ttl inputs 2/ v ih 1, 2, 3 all 2.0 v input leakage current: ttl inputs i in v in = v dd or v ss 1, 2, 3 all -1 1 m a m, d, l, r, f, g, h 1 all -10 10 inputs with pulldown resistors v in = v dd 1, 2, 3 all -1 1 m, d, l, r, f, g, h 1 all -10 10 inputs with pull-up resistors v in = v ss 1, 2, 3 all -550 -80 m, d, l, r, f, g, h 1 all -900 -150 low level output voltage ttl outputs v ol i ol = 3.2 ma 1, 2, 3 all 0.4 v high level output voltage ttl outputs v oh i oh = -400 m a 1, 2, 3 all 2.4 v three-state output leakage current ttl outputs i oz v out = v dd or v ss 1, 2, 3 all -10 10 m a short-circuit output current 3/ 4 / i os v dd = 5.5 v, v out = v dd 1, 2, 3 all 100 ma v dd = 5.5 v, v out = 0 v 1, 2, 3 all -100 ma quiescent current 5/ q idd 1, 2, 3 all 3 ma input capacitance 6/ c in see 4.4.1b 4 all 15 pf output capacitance 6/ c out 4 all 20 pf bidirect i/o capacitance 6/ c io 4 all 25 pf see footnotes at end of table.
standard microcircuit drawing size a 5962-88628 defense supply center columbus columbus, ohio 43216-5000 revision level c sheet 7 dscc form 2234 apr 97 table ia. electrical performance characteristics. - continued test symbol conditions -55 c t c +125 c v dd = 5.0 v 10% 1/ unless otherwise specified group a subgroups device type limits unit min max functional test see 4.4.1c 7, 8 dmag (l) to dmack (l) t phl1 see figure 3 7/ 9, 10, 11 all 0 45 ns mclk (h) to rrd (l) t iohl1 9, 10, 11 all 0 60 ns rwr (l) to data valid 8/ t oozl1 9, 10, 11 all 0 30 ns mclk (h) to mclkd2 (h) t plh1 9, 10, 11 all 0 40 ns mclk (h) to rwr (l) t iohl2 9, 10, 11 all 0 60 ns rd + cs (l) to data valid t phl2 9, 10, 11 all 0 60 ns rd (l) to rrd (l) t phl3 9, 10, 11 all 0 30 ns wr (l) to rwr (l) t phl4 9, 10, 11 all 0 30 ns memsci (l) to memsco (l) t phl5 9, 10, 11 all 0 30 ns see footnotes at end of table.
standard microcircuit drawing size a 5962-88628 defense supply center columbus columbus, ohio 43216-5000 revision level c sheet 8 dscc form 2234 apr 97 table ia. electrical performance characteristics. - continued 1/ devices supplied to this drawing are characterized at all levels m, d, l, r, f, g and h of irradiation. however, this de vice is only tested at the 'h' level. pre and post irradiation values are identical unless otherwise specified in table i. wh en performing post irradiation electrical measurements for any rha level, t a = +25 c. 2/ radiation hardened technology shall have a v ih pre-irradiation of 2.2 v. 3/ guaranteed to the limit specified in table i, if not tested. 4/ not more than one output may be shorted at a time for a maximum duration of one second. 5/ all inputs with internal pull-ups should be left floating. all other inputs should be tied high or low. 6/ the capacitance measurements shall be made between the indicated terminal and ground at a frequency of 1 mhz at t c of +25 c. the dc bias of the measuring instrument shall 0 0.1 v. the ac signal amplitude shall be less than 50 mv rms. 7/ switching tests are performed with v ih = v dd and v il = 0.0 v as input test conditions and output transition times are measured at 1.4 v. 8/ timing is not valid for rt timer field of message status word. the timer value may update during a dma memory write. table ib. sep test limits . 1 / 2 / 3 / device type t a = temperature 10 c 4/ memory pattern v cc = 4.5 v bias for latch- up test v cc =5.5 v no latch-up let 4/ effective let no upsets [mev/(mg/cm 2 )] maximum device cross section (cm 2 ) (let = 120) all +25 c 5/ 3 55 6.7 x 10 -5 80 note: devices that contain cross coupled resistance must be tested at the maximum rated t a 1/ for sep test conditions, see 4.4.4.4 herein. 2/ technology characterization and model verification supplemented by in-line data may be used in lieu of end-of-line testing. test plan must be approved by trb and qualifying activity. 3/ values will be added when they become available. rad hard devices have not yet been tested for sep. 4/ worst case temperature t a = +125 c. 5/ for memories only.
standard microcircuit drawing size a 5962-88628 defense supply center columbus columbus, ohio 43216-5000 revision level c sheet 9 dscc form 2234 apr 97 note: memwin is an internal test pin only and should be considered a floating pin and not for use. figure 1. terminal connections.
standard microcircuit drawing size a 5962-88628 defense supply center columbus columbus, ohio 43216-5000 revision level c sheet 10 dscc form 2234 apr 97 note: memwin is an internal test pin only and should be considered a floating pin and not for use. figure 1. terminal connections. - continued
standard microcircuit drawing size a 5962-88628 defense supply center columbus columbus, ohio 43216-5000 revision level c sheet 11 dscc form 2234 apr 97 case t terminal number terminal symbol terminal number terminal symbol terminal number terminal symbol terminal number terminal symbol terminal number terminal symbol 1v ss 28 nc 55 nc 82 v ss 109 nc 2 lock 29 rta1 56 a10 83 v dd 110 d10 3 taz 30 rta2 57 a11 84 nc 111 nc 4 tao 31 rta3 58 a12 85 mclk 112 d9 5 nc32rta459nc86aen113nc 6nc33v ss 60 a13 87 nc 114 d8 7 raz 34 v dd 61 a14 88 dmago 115 v dd 8 nc 35 rtpty 62 nc 89 stdintl 116 v ss 9 rao 36 a0 63 a15 90 stdintp 117 nc 10 tbz 37 a1 64 rwr 91 nc 118 d7 11 tbo 38 nc 65 rrd 92 hpint 119 d6 12 nc 39 nc 66 v dd 93 nc 120 d5 13rbz40a267v ss 94 mclkd2 121 nc 14 nc 41 a3 68 memcso 95 nc 122 d4 15 rbo 42 a4 69 tsctl 96 ssysf 123 nc 16 v ss 43 nc 70 dmar 97 test 124 d3 17 v dd 44 nc 71 nc 98 burst 125 d2 18clk45a572dmag99v ss 126 nc 19 nc 46 nc 73 nc 100 v dd 127 d1 20 extovr 47 a6 74 dmack 101 bcrtf 128 nc 21 nc 48 nc 75 memcsi 102 d15 129 d0 22 timeron 49 v ss 76 nc 103 d14 130 mrst 23 nc 50 v dd 77 wr 104 nc 131 bcrtsel 24 cha/b 51 a7 78 nc 105 d13 132 v dd 25 comstr 52 a8 79 rd 106 nc 26 nc 53 mc 80 nc 107 d12 27 rtao 54 a9 81 cs 108 d11 notes: the following terminals are active low: 20, 22, b of terminal 24, 25, 64, 65, 68, 69, 70, 72, 74, 75, 77, 79, 81, 88, 89 , 90, 92, 130. nc = no connect. figure 1. terminal connections. C continued
standard microcircuit drawing size a 5962-88628 defense supply center columbus columbus, ohio 43216-5000 revision level c sheet 12 dscc form 2234 apr 97 figure 2. functional block diagram.
standard microcircuit drawing size a 5962-88628 defense supply center columbus columbus, ohio 43216-5000 revision level c sheet 13 dscc form 2234 apr 97 address lines data lines power ground clock signals notes: 1. pin internally pulled up. 2. pin at high impedance when not asserted. 3. bidirectional pin. 4. case outline x lead identification in parenthesis, cases y and z are not in parenthesis. 5. memwin is an internal test pin only and should be considered a floating pin and not for use. figure 2. functional block diagram. - continued
standard microcircuit drawing size a 5962-88628 defense supply center columbus columbus, ohio 43216-5000 revision level c sheet 14 dscc form 2234 apr 97 figure 3. switching test circuit and waveforms.
standard microcircuit drawing size a 5962-88628 defense supply center columbus columbus, ohio 43216-5000 revision level c sheet 15 dscc form 2234 apr 97 figure 3. switching test circuit and waveforms. - continued
standard microcircuit drawing size a 5962-88628 defense supply center columbus columbus, ohio 43216-5000 revision level c sheet 16 dscc form 2234 apr 97 figure 3. switching test circuit and waveforms. - continued
standard microcircuit drawing size a 5962-88628 defense supply center columbus columbus, ohio 43216-5000 revision level c sheet 17 dscc form 2234 apr 97 open v dd = 5 v 0.5 v ground 13 (k3), 14 (l2), 17 (l4), 18 (k6), 25 (k7), 26 (j7), 27 (l8), 38 (h11), 39 (g9), 40 (g10), 41 (g11), 44 (e9), 45 (e11), 46 (e10), 47 (f11), 48 (d11), 49 (d10), 50 (c11), 51 (b11), 52 (c10), 53 (a11), 54 (b10), 55 (b9), 56 (a10), 58 (b8), 67 (b5), 68 (a6), 69 (a4), 70 (b4), 71 (a3), 73 (b3), 74 ( a1), 75 (b2), 76 (c2), 77 (b1), 78 (c1), 79 (d2), 80 (d1), 81 (f2), 82 (e2), 83 (e1) 10 (j2), 11 (l1), 12 (k2), 23 (l6), 24 (l7), 28 (k8), 43 (f9), 57 (a9), 59 (a8), 61 (b7), 64 (c6), 84 (e3) 1 (f3), 2 (f1), 3 (g1), 4 (g2) 5 (g3), 6 (h1), 7 (h2), 8 (j1), 9 (k1), 15 (l3), 16 (k4), 19 (k5), 20 (l5), 21 (j5), 22 (j6), 29 (l9), 30 (l10), 31 (k9), 32 (l11), 33 (k10), 34 (j10), 35 (k11), 36 (j11), 37 (h10), 42 (f10), 60 (c7), 62 (a7), 63 (b6), 65 (c5), 66 (a5), 72 (a2) pin grid array pin identification is in parenthesis. flat pack pin number is not in parenthesis. figure 4. radiation exposure circuit.
standard microcircuit drawing size a 5962-88628 defense supply center columbus columbus, ohio 43216-5000 revision level d sheet 18 dscc form 2234 apr 97 3.10 microcircuit group assignment for device class m. device class m devices covered by this drawing shall be in microcircuit group number 105 (see mil-prf-38535, appendix a). 4. quality assurance provisions 4.1 sampling and inspection. for device classes q and v, sampling and inspection procedures shall be in accordance with mil-prf-38535 or as modified in the device manufacturer's quality management (qm) plan. the modification in the qm plan shall not affect the form, fit, or function as described herein. for device class m, sampling and inspection procedures shall be in accordance with mil-prf-38535, appendix a. 4.2 screening. for device classes q and v, screening shall be in accordance with mil-prf-38535, and shall be conducted on all devices prior to qualification and technology conformance inspection. for device class m, screening shall be in accordance with method 5004 of mil-std-883, and shall be conducted on all devices prior to quality conformance inspection. 4.2.1 additional criteria for device class m. a. burn-in test, method 1015 of mil-std-883. (1) test condition a or d . the test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. the test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1015. (2) t a = +125 c, minimum. b. interim and final electrical test parameters shall be as specified in table ii herein. 4.2.2 additional criteria for device classes q and v. a. the burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturer's qm plan in accordance with mil-prf-38535. the burn-in test circuit shall be maintained under document revision level control of the device manufacturer's technology review board (trb) in accordance with mil- prf-38535 and shall be made available to the acquiring or preparing activity upon request. the test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1015 of mil-std-883. b. interim and final electrical test parameters shall be as specified in table ii herein. c. additional screening for device class v beyond the requirements of device class q shall be as specified in mil-prf- 38535, appendix b. 4.3 qualification inspection for device classes q and v. qualification inspection for device classes q and v shall be in accordance with mil-prf-38535. inspections to be performed shall be those specified in mil-prf-38535 and herein for groups a, b, c, d, and e inspections (see 4.4.1 through 4.4.4). 4.4 conformance inspection. technology conformance inspection for classes q and v shall be in accordance with mil- prf-38535 including groups a, b, c, d, and e inspections and as specified herein. quality conformance inspection for device class m shall be in accordance with mil-prf-38535, appendix a and as specified herein. inspections to be performed for device class m shall be those specified in method 5005 of mil-std-883 and herein for groups a, b, c, d, and e inspections (see 4.4.1 through 4.4.4).
standard microcircuit drawing size a 5962-88628 defense supply center columbus columbus, ohio 43216-5000 revision level c sheet 19 dscc form 2234 apr 97 4.4.1 group a inspection. a. tests shall be as specified in table ii herein. b. subgroup 4 (c in , c out , c i/o ) shall be measured only for the initial test and after process or design changes which may affect input capacitance. one pin of each input/output driver (buffer) type shall be tested on each sample device. c. for device class m, subgroups 7 and 8 tests shall be sufficient to verify the functionality of the device. for device classes q and v, subgroups 7 and 8 shall include verifying the functionality of the device; these tests shall have been fault graded in accordance with mil-std-883, test method 5012 (see 1.5 herein). table iia. electrical test requirements. test requirements subgroups (in accordance with mil-std-883, method 5005, table i) subgroups (in accordance with mil-prf-38535, table iii) device class m device class q device class v interim electrical parameters (see 4.2) - - - - - - - - - - - - final electrical parameters (see 4.2) 1/ 1, 2, 3, 7, 8, 9, 10, 11 1/ 1, 2, 3, 7, 8, 9, 10, 11 2/ 3 / 1, 2, 3, 7, 8, 9, 10, 11 group a test requirements (see 4.4) 1, 2, 3, 4, 7, 8, 9, 10, 11 1, 2, 3, 4, 7, 8, 9, 10, 11 1, 2, 3, 4, 7, 8, 9, 10, 11 group c end-point electrical parameters (see 4.4) 1, 2, 7, 8a 1, 2, 7, 8a 1, 2, 7, 8a 3/ group d end-point electrical parameters (see 4.4) 1, 2, 7 ,8a 1, 2, 7, 8a 1, 2, 7, 8a group e end-point electrical parameters (see 4.4) 1, 7, 9 1, 7, 9 1, 7, 9 1/ pda applies to subgroup 1. 2/ pda applies to subgroups 1 and 7. 3/ delta limits as specified in table iib herein shall be required when specified and the delta values shall be completed with reference to the zero hour electrical parameter. table iib. delta limits parameter condition limits i ddq t a = 25 c 10% of measured value or 35 m a whichever is greater note: if device is tested at or below 35 m a no deltas are required. delta's are performed at room temperature.
standard microcircuit drawing size a 5962-88628 defense supply center columbus columbus, ohio 43216-5000 revision level c sheet 20 dscc form 2234 apr 97 4.4.2 group c inspection. the group c inspection end-point electrical parameters shall be as specified in table ii herein. 4.4.2.1 additional criteria for device class m. steady-state life test conditions, method 1005 of mil-std-883: a. test condition a or d. the test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. the test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1005 of mil-std-883. b. t a = +125 c, minimum. c. test duration: 1,000 hours, except as permitted by method 1005 of mil-std-883. 4.4.2.2 additional criteria for device classes q and v. the steady-state life test duration, test condition and test temperat ure, or approved alternatives shall be as specified in the device manufacturer's qm plan in accordance with mil-prf-38535. the test circuit shall be maintained under document revision level control by the device manufacturer's trb in accordance with mil- prf-38535 and shall be made available to the acquiring or preparing activity upon request. the test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1005 of mil-std-883. 4.4.3 group d inspection. the group d inspection end-point electrical parameters shall be as specified in table ii herein. 4.4.4 group e inspection. group e inspection is required only for parts intended to be marked as radiation hardness assured (see 3.5 herein). a. end-point electrical parameters shall be as specified in table ii herein. b. for device classes q and v, the devices or test vehicle shall be subjected to radiation hardness assured tests as specified in mil-prf-38535 for the rha level being tested. for device class m, the devices shall be subjected to radiation hardness assured tests as specified in mil-prf-38535, appendix a for the rha level being tested. all device classes must meet the postirradiation end-point electrical parameter limits as defined in table i at t a = +25 c 5 c, after exposure, to the subgroups specified in table ii herein. c. when specified in the purchase order or contract, a copy of the rha delta limits shall be supplied. 4.4.4.1 total dose irradiation testing. total dose irradiation testing shall be performed in accordance with mil-std-883 method 1019 and as specified herein. 4.4.4.1.1 accelarated aging test. accelaerated aging tests shall be performed on all devices requiring a rha level greater than 5k rads (si). the post-anneal end-point electrical parameter limits shall be as specified in table i herein and shall be t he pre-irradiation end-point electrical parameter limit at 25 c 5 c. testing shall be performed at initial qualification and after any design or process changes which may affect the rha response of the device. 4.4.4.2 dose rate induced latchup testing. dose rate induced latchup testing shall be performed in accoradance with test method 1020 of mil-std-883 and as sprcified herein (see 1.4). tests shall be performed on devices, sec, or approved test structures at technology qualification and after any design or process changes which may effect the rha capability of the process. 4.4.4.3 dose rate upset testing. dose rate upset testing shall be performed in accoradance with test method 1021 of mil-std883 and herein (see 1.4). a. transient dose rate upset testing shall be performed at initial qualification and after any design or process changes which may effect the rha performance of the devices. test 10 devices with 0 defects unless otherwise specified. b. transient dose rate upset testing for class q and v devices shall be performed as specified by a trb approved radiation hardness assurance plan and mil-prf-38535.
standard microcircuit drawing size a 5962-88628 defense supply center columbus columbus, ohio 43216-5000 revision level d sheet 21 dscc form 2234 apr 97 4.4.4.4 single event phenomena (sep). sep testing shall be required on class v devices (see 1.4). sep testing shall be performed on the standard evaluation circuit (sec) or alternate sep test vehice as approved by the qualifying activity at initial qualification and after any design or process changes which may affect the upse or latchup characteristics. the recommended test conditions for sep are as follows: a. the ion beam angle of incidence shall be between normal to the die surface and 60 to the normal, inclusive (i.e. 0 angle 60 ). no shadowing of the ion beam due to fixturing or package related effects is allowed. b. the fluence shall be 3 100 errors or 3 10 6 ions/cm 2 . c. the flux shall be between 10 2 and 10 5 ions/cm 2 /s. the cross-section shall be verified to be flux independent by measuring the cross-section at two flux rates which differ by at least an order of magnitude. d. the particle range shall be 3 20 microns in silicon. e. the test temperature shall be +25 c and the maximum rated operating temperature 10 c. f. bias conditions shall be defined by the manufacturer for latchup measurements. g. test four devices with zero failures. h. for sep test limits, see table ib herein. 5. packaging 5.1 packaging requirements. the requirements for packaging shall be in accordance with mil-prf-38535 for device classes q and v or mil-prf-38535, appendix a for device class m. 6. notes 6.1 intended use. microcircuits conforming to this drawing are intended for use for government microcircuit applications (original equipment), design applications, and logistics purposes. 6.1.1 replaceability. microcircuits covered by this drawing will replace the same generic device covered by a contractor-prepared specification or drawing. 6.2 configuration control of smd's. all proposed changes to existing smd's will be coordinated with the users of record for the individual documents. this coordination will be accomplished using dd form 1692, engineering change proposal. 6.3 record of users. military and industrial users should inform defense supply center columbus when a system application requires configuration control and which smd's are applicable to that system. dscc will maintain a record of users and this list will be used for coordination and distribution of changes to the drawings. users of drawings covering microelectronic devices (fsc 5962) should contact dscc-va, telephone (614) 692-0544. 6.4 comments. comments on this drawing should be directed to dscc-va, columbus, ohio 43216-5000, or telephone (614) 692-0547.
standard microcircuit drawing size a 5962-88628 defense supply center columbus columbus, ohio 43216-5000 revision level c sheet 22 dscc form 2234 apr 97 6.5 abbreviations, symbols, and definitions. the abbreviations, symbols, and definitions used herein are defined in mil-prf- 38535 and mil-hdbk-1331 or as follows: name pin number type active description cases y, z case x a0 a1 a2 a3 a4 a5 a6 a7 a8 a9 a10 a11 a12 a13 a14 a15 d0 d1 d2 d3 d4 d5 d6 d7 34 35 36 37 38 39 40 41 44 45 46 47 48 49 50 51 9 8 7 6 5 4 3 2 j10 k11 j11 h10 h11 g9 g10 g11 e9 e11 e10 f11 d11 d10 c11 b11 k1 j1 h2 h1 g3 g2 g1 f1 i/o i/o i/o i/o out out out out out out out out out out out out i/o i/o i/o i/o i/o i/o i/o i/o bit 0 (lsb) of the address bus bit 1 of the address bus bit 2 of the address bus bit 3 of the address bus bit 4 of the address bus bit 5 of the address bus bit 6 of the address bus bit 7 of the address bus bit 8 of the address bus bit 9 of the address bus bit 10 of the address bus bit 11 of the address bus bit 12 of the address bus bit 13 of the address bus bit 14 of the address bus bit 15 of the address bus bit 0 (lsb) of the data bus bit 1 of the data bus bit 2 of the data bus bit 3 of the data bus bit 4 of the data bus bit 5 of the data bus bit 6 of the data bus bit 7 of the data bus
standard microcircuit drawing size a 5962-88628 defense supply center columbus columbus, ohio 43216-5000 revision level c sheet 23 dscc form 2234 apr 97 6.5 abbreviations, symbols, and definitions. continued name pin number type active description cases y, z case x d8 d9 d10 d11 d12 d13 d14 d15 dmar dmag dmago dmack cs rd wr memcso memcsi rrd rwr tsctl aen stdintl stdintp hpint clk 83 82 81 80 79 78 77 76 56 57 67 58 62 61 60 54 59 53 52 55 66 68 69 70 21 e1 e2 f2 d1 d2 c1 b1 c2 a10 a9 b5 b8 a7 b7 c7 b10 a8 a11 c10 b9 a5 a6 a4 b4 j5 i/o i/o i/o i/o i/o i/o i/o i/o out in out out in in in out in out out out in out out out in zl al al zl al al al al al al al al ah zl al zl bit 8 of the data bus bit 9 of the data bus bit 10 of the data bus bit 11 of the data bus bit 12 of the data bus bit 13 of the data bus bit 14 of the data bus bit 15 of the data bus dma request dma grant dma grant out dma acknowledge chip select read write memory chip select out memory chip select in ram read ram write three state control address enable standard interrupt level standard interrupt pulse high priority interrupt clock
standard microcircuit drawing size a 5962-88628 defense supply center columbus columbus, ohio 43216-5000 revision level c sheet 24 dscc form 2234 apr 97 6.5 abbreviations, symbols, and definitions. continued name pin number type active description cases y, z case x mclk mclkd2 taz tao tbz tbo raz rao rbz rbo timeron cha/ b mrst comstr bcrtsel rtao rta1 rta2 rta3 rta4 rtpty ssysf bcrtf burst memwin 65 71 13 14 17 18 15 16 19 20 25 26 10 27 11 28 29 30 31 32 33 72 75 74 73 c5 a3 k3 l2 l4 k6 l3 k4 k5 l5 k7 j7 j2 l8 l1 k8 l9 l10 k9 l11 k10 a2 b2 a1 b3 in out out out out out in in in in out out in out in in in in in in in in out out out al al al ah ah ah al memory clock memory clock divided by two transmit (channel) a z transmit (channel) a o transmit (channel) b z transmit (channel) b o receive (channel) a z receive (channel) a o receive (channel) b z receive (channel) b o (rt) timer on channel a/ b master reset (rt) command strobe bc/ rt select remote terminal address bit 0 (lsb) remote terminal address bit 1 remote terminal address bit 2 remote terminal address bit 3 remote terminal address bit 4 remote terminal (address) parity subsystem fail bcrt fail burst (dma cycle) memory (access) window note: memwin is an internal test pin only and should be considered a floating pin and not for use.
standard microcircuit drawing size a 5962-88628 defense supply center columbus columbus, ohio 43216-5000 revision level c sheet 25 dscc form 2234 apr 97 6.5 abbreviations, symbols, and definitions. continued name pin number type active description cases y, z case x lock extovr v dd v dd v dd v dd v ss v ss v ss v ss 12 24 23 43 64 84 1 22 42 63 k2 l7 l6 f9 c6 e3 f3 j6 f10 b6 in in pwr pwr pwr pwr gnd gnd gnd gnd ah al lock external override +5 v +5 v +5 v +5 v ground ground ground ground 1/ abbreviations: al = active low ah = active high zl = active low - inactive state is high impedance 2/ address and data busses are all active high and in the high impedance state when idle.
standard microcircuit drawing size a 5962-88628 defense supply center columbus columbus, ohio 43216-5000 revision level c sheet 26 dscc form 2234 apr 97 6.6 sources of supply. 6.6.1 sources of supply for device classes q and v. sources of supply for device classes q and v are listed in qml-38535. the vendors listed in qml-38535 have submitted a certificate of compliance (see 3.6 herein) to dscc-va and have agreed to this drawing. 6.6.2 approved sources of supply for device class m. approved sources of supply for class m are listed in mil-hdbk-103. the vendors listed in mil-hdbk-103 have agreed to this drawing and a certificate of compliance (see 3.6 herein) has been submitted to and accepted by dscc-va. 6.7 additional information. a copy of the following additional data shall be maintained and available from the device manufacturer: a. rha upset levels. b. test conditions (sep). c. number of upsets (sep). d. number of transients (sep). e. occurrence of latchup (sep).
standard microcircuit drawing bulletin date: 01-06-14 approved sources of supply for smd 5962-88628 are listed below for immediate acquisition information only and shall be added to mil-hdbk-103 and qml-38535 during the next revision. mil-hdbk-103 and qml-38535 will be revised to include the addition or deletion of sources. the vendors listed below have agreed to this drawing and a certificate of compliance has been submitted to and accepted by dscc-va. this bulletin is superseded by the next dated revision of mil-hdbk-103 and qml-38535. standard microcircuit drawing pin 1/ vendor cage number vendor similar pin 2/ 5962-8862801xa 5962-8862801xc 5962-8862801ya 5962-8862801yc 5962-8862801za 5962-8862801zc 5962-8862801ta 5962-8862801tc 65342 65342 65342 65342 65342 65342 65342 65342 ut1553bcrtga ut1553bcrtgc ut1553bcrtwa ut1553bcrtwc ut1553bcrtaa ut1553bcrtac ut1553bcrtfa ut1553bcrtfc 5962h8862801xa 5962h8862801xc 5962h8862801ya 5962h8862801yc 5962h8862801za 5962h8862801zc 5962h8862801ta 5962h8862801tc 65342 65342 65342 65342 65342 65342 65342 65342 ut1553bcrtgah ut1553bcrtgch ut1553bcrtwah ut1553bcrtwch ut1553bcrtaah ut1553bcrtach ut1553bcrtfah ut1553bcrtfch 5962h8862801vxa 5962h8862801vxc 5962h8862801vya 5962h8862801vyc 5962h8862801vza 5962h8862801vzc 5962H8862801VTA 5962h8862801vtc 65342 65342 65342 65342 65342 65342 65342 65342 ut1553bcrtvgah ut1553bcrtvgch ut1553bcrtvwah ut1553bcrtvwch ut1553bcrtvaah ut1553bcrtvach ut1553bcrtvfah ut1553bcrtvfch 1/ the lead finish shown for each pin representing a hermetic package is the most readily available from the manufacturer listed for that part. if the desired lead finish is not listed contact the vendor to determine its availability. 2/ caution . do not use this number for item acquisition. items acquired to this number may not satisfy the performance requirements of this drawing. 1 of 2
vendor cage vendor name number and address 65342 aeroflex utmc microelectronics system inc. 4350 centennial boulevard colorado springs, colorado 80907-3486 the information contained herein is disseminated for convenience only and the government assumes no liability whatsoever for any inaccuracies in the information bulletin. 2 of 2

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