august 2000 rev. 3 - eco #13124 1 pcmcia flash memory card feb series pc card products ? low cost linear flash card ? single 5 volt supply ?based on amd flash components - very low power without entering reset mode - allows standard access from low power mode ?fast read performance - 100ns or 150ns maximum access time ? x8 data interface ? high performance random writes - 10s typical word write time ? automated write and erase algorithms - amd command set ? 50a typical deep power-down ? 100,000 erase cycles per block ? 64k word symmetrical block architecture ? pc card standard type i form factor the feb econo flash card series offers a low cost eight bit linear flash solid state storage solution for code/data storage and embedded applications. packaged in pcmcia type i or a type i half-card housing, the feb card series is based on amd flash memories: am29f080 (8mb) or am29f016 (16mb) devices whose device codes are d5h and adh respectively. systems should be able to recognize both codes. the symmetrically blocked architecture and 5v operation provides a cost effective, high performance, nonvolatile storage solution. the pc card form factor offers an industry standard pinout and mechanical outline, allowing density upgrades without system design changes. the feb card series is designed as a simple x8 linear array of flash devices. the 2mb and 4mb density options may be built with either 8mb or 16mb components. both components have uniform 64kbyte sectors and use identical embedded automated write and erase algorithms. the 8 bit design provides very low power operation as only one component is active at a time. the amd based components allow for very low standby currents without entering reset mode. this allows for standard access time immediately from low power standby mode. eight bit flash memory card (amd based) 1, 2, and 4 megabyte supported components (max 4 x): am29f080 - max 4mb control logic device 0 device 1 device 2 device 3 address bus a0-a22 am29f016 - max 8mb a0-20(19) cs0 cs1 cs2 cs3 cs0 cs1 cs2 cs3 ce1# bvd1 bvd2 vpp1 vpp2 vs1 vs2 open open nc nc d0-d7 vcc cd1# cd2# gnd we# oe# vcc wait# block diagram features general description
august 2000 rev. 3 - eco #13124 2 pcmcia flash memory card feb series pc card products pin signal name i/o function active pin signal name i/o function active 1 gnd ground 35 gnd ground 2 dq3 i/o data bit 3 36 cd1# o card detect 1 low 3 dq4 i/o data bit 4 37 dq11 i/o data bit 11 n.c. 4 dq5 i/o data bit 5 38 dq12 i/o data bit 12 n.c. 5 dq6 i/o data bit 6 39 dq13 i/o data bit 13 n.c. 6 dq7 i/o data bit 7 40 dq14 i/o data bit 14 n.c. 7 ce1# i card enable 1 low 41 dq15 i data bit 15 n.c. 8 a10 i address bit 10 42 ce2# i card enable 2 n.c. 9 oe# i output enable low 43 vs1 o voltage sense 1 n.c. 10 a11 i address bit 11 44 rfu reserved 11 a9 i address bit 9 45 rfu reserved 12 a8 i address bit 8 46 a17 i address bit 17 13 a13 i address bit 13 47 a18 i address bit 18 14 a14 i address bit 14 48 a19 i address bit 19 1mb 2) 15 we# i write enable low 49 a20 i address bit 20 2mb 2) 16 rdy/bsy # o ready/busy n.c. 50 a21 i address bit 21 4mb 2) 17 vcc supply voltage 51 vcc supply voltage 18 vpp1 12vprog. voltage n.c. 52 vpp2 12v prog. voltage n.c. 19 a16 i address bit 16 53 a22 i address bit 22 8mb 2) 20 a15 i address bit 15 54 a23 i address bit 23 n.c. 21 a12 i address bit 12 55 a24 i address bit 24 n.c. 22 a7 i address bit 7 56 a25 i address bit 25 n.c. 23 a6 i address bit 6 57 vs2 o voltage sense 2 n.c. 24 a5 i address bit 5 58 rst i card reset n.c. 25 a4 i address bit 4 59 wait# o extended bus cycle n.c. 26 a3 i address bit 3 60 rfu reserved 27 a2 i address bit 2 61 reg# i attrib mem select n.c. 28 a1 i address bit 1 62 bvd2 o bat. volt. detect 2 29 a0 i address bit 0 63 bvd1 o bat. volt. detect 1 30 dq0 i/o data bit 0 64 dq8 i/o data bit 8 n.c. 31 dq1 i/o data bit 1 65 dq9 i/o data bit 9 n.c. 32 dq2 i/o data bit 2 66 dq10 o data bit 10 n.c. 33 wp o write potect 1) 67 cd2# o card detect 2 low 34 gnd ground 68 gnd ground mechanical 54.0mm 0.10 (2.126?) 10.0mm min (0.400?) 1.6mm 0.05 (0.063?) 1.0mm 0.05 (0.039?) 1.0mm 0.05 (0.039?) 3.3mm t1 (0.130?) t1=0.10mm interconnect area t1=0.20mm substrate area interconnect area 10.0mm min (0.400?) 3.0mm min 85.6mm 0.20 (3.370?) substrate area pinout notes: 1. connected to gnd - no write protection. 2. shows density for which specified address bit is msb. higher order addresses are not connected (i.e. for 4mb card a21 is msb, a22-a25 are n.c.).
august 2000 rev. 3 - eco #13124 3 pcmcia flash memory card feb series pc card products symbol type name and function a0 - a25 input address inputs: a0 through a25 enable direct addressing of up to 64mb of memory on the card. the memory will wrap at the card density boundary. the system should not try to access memory beyond the card density. the upper addresses are not connected. dq0 ? dq15 input/out data input/output: dq0 through dq15 constitute the bi-directional databus . dq0 - dq7 constitute the lower (even) byte. dq8 ? dq15 are not connected. dq7 is the msb. ce1#, ce2# input card enable 1 and 2: ce1# enables even byte accesses, ce2# enables odd byte accesses. ce2# is not connected. oe# input output enable: active low signal enabling read data from the memory card. we# input write enable: active low signal gating write data to the memory card. rdy/bsy# n.c. ready/busy output: indicates status of internally timed erase or program algorithms. a high output indicates that the card is ready to accept accesses. this signal is not connected. cd1#, cd2# output card detect 1 and 2: provide card insertion detection. these signals are connected to ground internally on the memory card. the host socket interface circuitry shall supply 10k-ohm or larger pull-up resistors on these signal pins. wp output write protect: this signal is pulled low internally. this signifies write protect = "off " for all cases. vpp1, vpp2 n.c. program/erase power supply: 12v. not connected for 5v only card. vcc card power supply: 5.0v gnd ground: for all internal circuitry. reg# n.c. attribute memory select: this signal is not connected - card does not have attribute memory. rst n.c. reset: active high signal for placing cards in power-on default state. reset can be used as a power-down signal for the memory array. wait# output wait: this signal is pulled high internally for compatibility. no wait states are generated. bvd1, bvd2 output battery voltage detect: these signals are pulled high to maintain sram card compatibility. vs1, vs2 output voltage sense: notifies the host socket of the card's vcc requirements. vs1 and vs2 are open to indicate a 5v card has been inserted. rfu reserved for future use n.c. no internal connection to card: pin may be driven or left floating function mode /reg / ce2 / ce1 /oe /we d15-d8 d7-d0 standby mode xxhxx high-z high-z read low byte access xxllh high-z even-b y te write low byte access xxlhl x even-b y te functional truth table card signal description
august 2000 rev. 3 - eco #13124 4 pcmcia flash memory card feb series pc card products symbol parameter 100 ns 150 ns min max min max unit t c (r) read cycle time 100 150 ns t a (a) address access time 100 150 ns t a (ce) card enable access time 100 150 ns t a (oe) output enable access time 50 75 ns t c w write cycle time 100 150 ns t w (we) write pulse width 60 80 ns vcc = 5v 5%, ta = 0 c to + 70 c note: ac timing diagrams and characteristics are guaranteed to meet or exceed pcmcia 2.1 specifications. symbol parameter notes min typ (1) max units test conditions t whqv1 t ehqv1 byte program time 2,4 7 1000 s t whqv2 t ehqv2 block program time 2 0.15 0.7 sec word program mode block erase time 2 1 15 sec vcc = 5v 5%, ta = 0 c to + 70 c notes: 1. typical: nominal voltages and ta = 25 c. 2. excludes system overhead. 3. valid for all speed options. 4. to maximize system performance rdy/bsy# signal should be polled. 5. chip erase time based on 8 mbit flash components. symbol parameter density (mbytes) notes typ 3 ) max units test conditions i ccr vcc read current 1,2,4,8 30 ma vcc = 5.25v tcycle = 100ns i ccw vcc program current 1,2,4,8 60 ma i cce vcc erase current 1,2,4,8 60 ma i ccs vcc standby current 1,2,4,8 2) 20 50 a vcc = 5.25v control signals = vcc reset = x notes: 1. all currents are rms values unless otherwise specified. 2. control signals: ce1#, ce2#, oe#, we#. 3. typical: vcc = 5v, t = +25 c. cmos test conditions: vil = vss 0.2v, vih = vcc 0.2v dc characteristics (1) ac characteristics (1) data write and erase performance (1 ,3)
august 2000 rev. 3 - eco #13124 5 pcmcia flash memory card feb series pc card products edi company name lot code / trace number date code part number product marking wed 7p008feb0500c15 c995 9915 note: some products are currently marked with our pre-merger company name/acronym (edi). during our transition period, some products will also be marked with our new company name/acronym (wed). starting october 2000 all pcmcia products will be marked only with the wed prefix. card capacity 008 8mb packaging option 00 standard, type 1 pc card p standard pcmcia r ruggedized pcmcia card family and version - see card family and version info. for details (next page) temperature range c commercial 0c to +70c i industrial -40c to +85c card access time 15 150ns 25 250ns card technology 7flash 8sram part numbering 7 p 008 feb05 00 c 15
august 2000 rev. 3 - eco #13124 6 pcmcia flash memory card feb series pc card products eight bit flash memory card 7p xxx feb yy 00 t zz where xxx: 001 1mb (03 only) 002 2mb (03, 05) 004 4mb (03, 05) 008 8mb (05 only) yy: 03 29f080 base 05 29f016 base t: c commercial i industrial m military temp zz: 10 100ns 15 150ns ordering information white electronic designs corporation one research drive, westborough, ma 01581, usa tel: (508) 366 5151 fax: (508) 836 4850 www.whiteedc.com revision history: rev level description date rev 0 initial release feb 2, 1998 rev 1 logo change may 27, 1999 rev 2 added page 5 june 1, 2000 page header change rev 3 corrected errors on pg. 4 august 1, 2000
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