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| ? motorola, inc., 2003. all rights reserved. 56f826 evaluation module hardware users manual order this document by DSP56F826EVMUM/d rev. 1, 06/06/2003 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . motorola table of contents iii preface audience . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ix organization. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ix suggested reading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ix notation conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . x definitions, acronyms, and abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . x references . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xi chapter 1 introduction 1.1 56f826evm architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1 1.2 56f826evm configuration jumpers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2 1.3 56f826evm connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4 chapter 2 technical summary 2.1 56f826 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2 2.2 program and data memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3 2.3 spi eeprom memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-4 2.4 rs-232 serial communications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-5 2.5 clock source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-6 2.6 operating mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-6 2.7 debug leds. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-7 2.8 debug support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-7 2.8.1 jtag connector. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-8 2.8.2 parallel jtag interface connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-9 2.9 external interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-10 2.10 reset. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2- 11 2.11 power supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-12 2.12 stereo codec . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-13 2.12.1 analog input/output. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-13 2.12.2 digital interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-14 table of contents f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . iv 56f826 evaluation module hardware users manual motorola 2.13 daughter card connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-15 2.13.1 memory daughter card expansion connector . . . . . . . . . . . . . . . . . . . . . . 2-16 2.13.2 peripheral daughter card expansion connector . . . . . . . . . . . . . . . . . . . . . 2-17 2.14 test points . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-18 appendix a 56f826evm schematics appendix b 56f826evm bill of material f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . motorola list of figures v 1-1 block diagram of the 56f826evm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2 1-2 56f826evm jumper reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3 1-3 connecting the 56f826evm cables . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4 2-1 schematic diagram of the external memory interface . . . . . . . . . . . . . . 2-3 2-2 spi eeprom memory block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 2-4 2-3 schematic diagram of the rs-232 interface . . . . . . . . . . . . . . . . . . . . . . 2-5 2-4 schematic diagram of the clock interface . . . . . . . . . . . . . . . . . . . . . . . . 2-6 2-5 schematic diagram of the debug led interface . . . . . . . . . . . . . . . . . . . 2-7 2-6 block diagram of the parallel jtag interface. . . . . . . . . . . . . . . . . . . . . 2-9 2-7 schematic diagram of the user interrupt interface . . . . . . . . . . . . . . . . 2-10 2-8 schematic diagram of the reset interface . . . . . . . . . . . . . . . . . . . . . 2-11 2-9 schematic diagram of the power supply . . . . . . . . . . . . . . . . . . . . . . . . 2-12 2-10 codec analog connections. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-14 2-11 cs4218 stereo audio codec . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-15 a-1 56f826 processor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . a-2 a-2 reset, mode, clock & irqs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . a-3 a-3 program & data sram memory . . . . . . . . . . . . . . . . . . . . . . . . a-4 a-4 spi serial 1m-bit serial eeprom memory . . . . . . . . . . . . . . . . . . . . . . a-5 a-5 sci port, rs-232 and connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . a-6 a-6 ssi 16-bit stereo codec . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . a-7 a-7 parallel jtag host target interface and jtag connector . . . . . . . . . . . a-8 a-8 daughter card expansion connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . a-9 a-9 power supplies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . a-10 a-10 bypass caps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . a-11 list of figures f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . vi 56f826 evaluation module hardware users manual motorola f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . motorola list of tables vii 1-1 56f826evm default jumper options . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3 2-1 spi port connector description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-4 2-2 rs-232 serial connector description. . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-5 2-3 operating mode selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-6 2-4 jtag connector description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-8 2-5 parallel jtag interface disable jumper selection. . . . . . . . . . . . . . . . . . 2-8 2-6 parallel jtag interface connector description . . . . . . . . . . . . . . . . . . . . 2-9 2-7 codec sample rate selector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-13 2-8 memory daughter card connector description. . . . . . . . . . . . . . . . . . . 2-16 2-9 peripheral daughter card connector description . . . . . . . . . . . . . . . . . 2-17 list of tables f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . viii 56f826 evaluation module hardware users manual motorola f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . motorola preface ix preface this reference manual describes in detail the hardware on the 56f826 evaluation module. audience this document is intended for application developers who are creating software for devices using the motorola 56f826 part. organization this manual is organized into two chapters and two appendixes. ? chapter 1, introduction - provides an overview of the 56f826evm and its features . ? chapter 2, technical summary - describes the 56f826evm hardware in detail. ? appendix a, 56f826evm schematics - contains the schematics of the 56f826evm. ? appendix b, 56f826evm bill of material - provides a list of the materials used on the 56f826evm board . suggested reading more documentation on the 56f826 and the 56f826evm kit may be found at url: http://www.motorola.com/semiconductors f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . x 56f826 evaluation module hardware users manual motorola notation conventions this manual uses the following notational conventions: definitions, acronyms, and abbreviations definitions, acronyms and abbreviations for terms used in this document are defined below for reference term or value symbol examples exceptions active high signals (logic one) no special symbol attached to the signal name a0 clko active low signals (logic zero) noted with an overbar in text and in most figures we oe in schematic drawings, active low signals may be noted by a backslash: /we hexadecimal values begin with a $ symbol $0ff0 $80 decimal values no special symbol attached to the number 10 34 binary values begin with the letter b attached to the number b1010 b0011 numbers considered positive unless specifically noted as a negative value 5 -10 voltage is often shown as positive: +3.3v blue text linkable on-line ...refer to figure 1-1 bold reference sources, paths, emphasis ...see: http://www.motorola.com/ ... codec coder/decoder, a part used to convert analog signals to digital (coder) and digital signals to analog (decoder) eeprom electrically erasable programmable read-only memory evm evaluation module, a hardware platform which allows a customer to evaluate the silicon and develop their application gpio general purpose input and output port; does not share pin functionality with any other peripheral on the chip and can only be set as an input, output or level-sensitive interrupt input ic integrated circuit f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . motorola preface xi references the following sources were used to produce this manual: [1] dsp56800 family manual , motorola, dsp56800fm/d [2] 56f826/827 users manual , motorola, dsp56f826-827um/d [3] 56f826 technical data , motorola, dsp56f826/d jtag joint test action group, a bus protocol/interface used for test and debug lqfp low-profile quad flat pack mpio multi-purpose input and output port; shares package pins with other peripherals on the chip and can function as a gpio once tm on-chip emulation, a debug bus and port created by motorola to enable designers to create a low-cost hardware interface for a professional-quality debug environment pcb printed circuit board pll phase locked loop ram random access memory rom read-only memory sci serial communications interface port spi serial peripheral interface port sram static random access memory ssi synchronous serial interface port ws wait state f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . xii 56f826 evaluation module hardware users manual motorola f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . motorola introduction 1-1 chapter 1 introduction the 56f826evm is used to demonstrate the abilities of the 56f826 and to provide a hardware tool allowing the development of applications that use the 56f826. the 56f826evm is an evaluation module board that includes a 56f826 part, 16-bit stereo codec, external memory and a daughter card expansion interface. the daughter card expansion connectors are for signal monitoring and user feature expandability. the 56f826evm is designed for the following purposes: ? allowing new users to become familiar with the features of the 56800 architecture. the tools and examples provided with the 56f826evm facilitate evaluation of the feature set and the benefits of the family. ? serving as a platform for real-time software development. the tool suite enables the user to develop and simulate routines, download the software to on-chip or on-board ram, run it, and debug it using a debugger via the jtag/once tm port. the breakpoint features of the once port enable the user to easily specify complex break conditions and to execute user-developed software at full-speed, until the break conditions are satisfied. the ability to examine and modify all user accessible registers, memory and peripherals through the once port greatly facilitates the task of the developer. ? serving as a platform for hardware development. the hardware platform enables the user to connect external hardware peripherals. the on-board peripherals can be disabled, allowing the user to reassign any and all of the hybrid controller's peripherals. the once port's unobtrusive design means that all of the memory on the board and on the chip are available to the user. 1.1 56f826evm architecture the 56f826evm facilitates the evaluation of various features present in the 56f826 part. the 56f826evm can be used to develop real-time software and hardware products based on the 56f826. the 56f826evm provides the features necessary for a user to write and debug software, demonstrate the functionality of that software and interface with the f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . 1-2 56f826 evaluation module hardware users manual motorola customer's application-specific device(s). the 56f826evm is flexible enough to allow a user to fully exploit the 56f826's features to optimize the performance of his product, as shown in figure 1-1 . figure 1-1. block diagram of the 56f826evm 1.2 56f826evm configuration jumpers seven jumper groups, (jg1-jg7), shown in figure 1-2 , are used to configure various features on the 56f826evm board. table 1-1 describes the default jumper group settings. 56f826 reset mode address, data & control jtag/once xtal/extal spi sci ssi gpio +2.5v, +3.3v & gnd peripheral daughter card connector reset logic mode logic program memory 64kx16-bit sram memory daughter card connector jtag connector parallel jtag interface 4.00mhz crystal dsub 25-pin data memory 64kx16-bit sram dsub 9-pin debug leds stereo 16-bit codec rs-232 interface spi eeprom 1m-bit power supply +2.5v, +3.3v & +5.0v irq interface irq amp stereo line out headphone jack stereo line in f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . 56f826evm configuration jumpers motorola introduction 1-3 figure 1-2. 56f826evm jumper reference table 1-1. 56f826evm default jumper options jumper group comment jumpers connections jg1 enable on-board parallel jtag host/target interface nc jg2 enable rs-232 output nc jg3 enable on-board sram 1C2 jg4 use on-board extal crystal input for oscillator 2C3 jg5 use on-board xtal crystal input for oscillator 1C2 jg6 selects devices mode 0 operation upon exit from reset 1-2 jg7 enable spi eeprom 1C2, 3C4, 5C6 & 7C8 jg6 dsp56f826evm j3 jtag u7 s/n p1 y1 u1 u2 s2 s3 s1 s4 p2 leds jg5 jg2 u5 reset irqb irqa 1 2 7 8 jg3 j2 p6 1 jg5 3 jg2 jg3 jg1 jg6 tb1 p3 p4 p5 jg4 j1 jg7 headphone line line in out jg1 jg4 3 1 jg7 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . 1-4 56f826 evaluation module hardware users manual motorola 1.3 56f826evm connections an interconnection diagram is shown in figure 1-3 for connecting the pc and the external +12.0v dc power supply or external +5.0v dc lab power supply to the 56f826evm board. perform the following steps to connect the 56f826evm cables: 1. connect the parallel extension cable to the parallel port of the host computer 2. connect the other end of the parallel extension cable to p1 on the 56f826evm board as shown in figure 1-3 . this provides the connection which allows the host computer to control the board. 3. make sure that the external +12.0v dc, 2.1a switching power supply or the external +5.0v dc, 1a lab power supply is not plugged into a +120v ac power source 4. connect the 2.1mm output power plug from the external switching power supply into p2 on the 56f826evm board, as shown in figure 1-3 . optionally, attach an external +5.0v dc lab power supply via the 2-pin terminal block, tb1. 5. apply power to the external power supply. the green power-on led, led7, will illuminate when power is applied correctly. figure 1-3. connecting the 56f826evm cables pc-compatible cable computer parallel extension 56f826evm external +12.0v power p1 p2 connect cable to parallel/printer port with 2.1mm, receptacle connector +5.0v lab supply tb1 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . motorola technical summary 2-1 chapter 2 technical summary the 56f826evm is designed as a versatile hybrid controller development card for developing real-time software and hardware products to support a new generation of applications in digital and wireless messaging, digital answering machines, feature phones, modems, and digital cameras. the power of the 16-bit 56f826 device, combined with the on-board 64k 16-bit external program static ram (sram), 64k 16-bit external data sram, rs-232 interface, stereo 16-bit codec interface, daughter card expansion interface and parallel jtag interface, makes the 56f826evm ideal for developing and implementing many audio and voice algorithms, as well as for learning the architecture and instruction set of the 56f826 processor. the main features of the 56f826evm, with board and schematic reference designators, include: ? 56f826evm 16-bit +2.5v/+3.3v hybrid controller operating at 80mhz [u1] ? external fast static ram (fsram) memory [u2], configured as: 64k 16 bits of program memory with 0 wait states at 70mhz 64k 16 bits of data memory with 0 wait states at 70mhz ? 1mbit serial eeprom [u4] ? 4.00mhz crystal oscillator for device frequency generation [y1] ? optional external oscillator frequency input connector [jg4 and jg5] ? joint test action group (jtag) port interface connector for an external debug host target interface [j3] ? on-board parallel jtag host target interface, with a connector for a pc printer port cable [p2] ? rs-232 interface for easy connection to a host processor [u3 and p3] ? 16-bit stereo codec interface [u5, p4 and p5] ? stereo headphone interface [u6 and p6] ? codec sample rate selector [s4] f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . 2-2 56f826 evaluation module hardware users manual motorola ? peripheral daughter card expansion connector, to allow the user to connect his own sci, ssi, spi or gpio-compatible peripheral to the hybrid controller[j2] ? memory daughter card expansion connector, to allow the user to connect his own memory or memory device to the hybrid controller[j1] ? on-board power regulation from an external +12v dc-supplied power input [p1] ? on-board power regulation from an optional +5v dc-supplied power input [tb1] ? light emitting diode (led) power indicator [led7] ? six on-board real-time user debugging leds [led1-6] ? manual reset push-button [s1] ? manual interrupt push-button for irqa [s2] ? manual interrupt push-button for irqb [s3] 2.1 56f826 the 56f826evm uses a motorola dsp56f826bu80 part, designated as u1 on the board and in the schematics. this part will operate at a maximum speed of 80mhz. a full description of the 56f826, including functionality and user information, is provided in these documents: ? 56f826 preliminary technical data sheet , (dsp56f826-827 um/d) : provides features list and specifications including signal descriptions, dc power requirements, ac timing requirements and available packaging. ? 56f826/827 16-bit digital signal processor users manual , (56f826um/ad): provides an overview description of the and detailed information about the on-chip components including the memory and i/o maps, peripheral functionality, and control/status register descriptions for each subsystem. ? dsp56f800family manual , (dsp56f800fm/d): provides a detailed description of the core processor, including internal status and control registers and a detailed description of the family instruction set. refer to these documents for detailed information about chip functionality and operation. they can be found on this url: http://www.motorola.com/semiconductors f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . program and data memory motorola technical summary 2-3 2.2 program and data memory the 56f826evm uses one bank of 128k 16-bit fast static ram (gsi gs72116, labeled u2) for external memory expansion; see the fsram schematic diagram in figure 2-1 . this physical memory bank is split into two logical memory banks of 64kx16-bits: one for program memory and the other for data memory. by using the hybrid controllers program strobe, ps , signal line along with the memory chips a0 signal line, half of the memory chip is selected when program memory accesses are requested and the other half of the memory chip is selected when data memory access are requested. this memory bank will operate with zero wait state accesses while the 56f826 is running at 70mhz. however, when running at 80mhz, the memory bank operates with four wait state accesses. this memory bank can be disabled by removing the jumper at jg3. figure 2-1. schematic diagram of the external memory interface 56f826 gs72116 a0-a15 ps d0-d15 rd wr a1-a16 a0 dq0-dq15 oe we ce 1 2 jg3 +3.3v jumper pin 1-2: enable sram jumper removed: disable sram f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . 2-4 56f826 evaluation module hardware users manual motorola 2.3 spi eeprom memory a 1mbit, +3.3v, spi, serial eeprom memory, atmel at45db011-sc, is provided on the 56f826evm; reference figure 2-2 . this memory connects directly to the spi port through a header on the 56f826. it can be used to load program code and data into the 56f826s internal or external memory spaces. a jumper block, jg7, is provided, which allows the user to disconnect the on-board spi eeprom from the spi port and to connect his own spi port peripheral. the header details are shown in table 2-1 . figure 2-2. spi eeprom memory block diagram . table 2-1. spi port connector description jg7 pin # signal pin # signal 1 ss/ gpio7 2 cs 3miso4 sdo 5mosi6 sdi 7sclk8 sck 56f826 mosi miso sclk gpiof7 serial eeprom sdi sdo sck cs eeprom enable (spi port connector) jg7 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . rs-232 serial communications motorola technical summary 2-5 2.4 rs-232 serial communications the 56f826evm provides an rs-232 interface by the use of an rs-232 level converter, (maxim max3245eeai, designated as u3). refer to the rs-232 schematic diagram in figure 2-3 . the rs-232 level converter transitions the sci uarts +3.3v signal levels to rs-232 compatible signal levels and connects to the hosts serial port via connector p3. flow control is not provided, but could be implemented using uncommitted gpio signals. the pinout of connector p3 is listed in table 2-2 . the rs-232 level converter/transceiver can be disabled by placing a jumper at jg2. figure 2-3. schematic diagram of the rs-232 interface . table 2-2. rs-232 serial connector description p3 pin # signal pin # signal 1 jumper to 6 & 4 6 jumper to 1 & 4 2 txd 7 jumper to 8 3 rxd 8 jumper to 7 4 jumper to 1 & 6 9 n/c 5gnd 56f826 rs-232 level converter interface txdo rxdo r1in t1out t1in r1out forceoff jg2 1 2 6 3 2 7 8 4 5 x 1 9 +3.3v jumper removed: enable rs-232 jumper pin 1-2: disable rs-232 p3 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . 2-6 56f826 evaluation module hardware users manual motorola 2.5 clock source the 56f826evm uses a 4.00mhz crystal, y1, connected to its external crystal inputs, extal and xtal. to achieve its 80mhz maximum operating frequency, the 56f826 uses its internal pll to multiply the input frequency by 20. an external oscillator source can be connected to the hybrid controller by using the oscillator bypass connectors, jg4 and jg5; see figure 2-4 . if the input frequency is above 4mhz, then the extal input should be jumpered to ground by adding a jumper between jg4 pins 2 and 3. the input frequency would then be injected on jg5s pin 2. if the hybrid controller needs to be synchronized to the codecs sample frequency, then the controllers input frequency should be jumpered using the 12.2280mhz codec frequency. if the input frequency is below 4mhz, then the input frequency can be injected on jg4s pin 2. figure 2-4. schematic diagram of the clock interface 2.6 operating mode the 56f826evm provides a boot-up mode selection jumper, jg6. this jumper is used to select the operating mode of the hybrid controleer as it exits reset. refer to the dsp56f826 users manual for a complete description of the chips operating modes. table 2-3 shows the two operating modes available on the 56f826. table 2-3. operating mode selection operating mode jg6 comment 0 1C2 bootstrap from internal memory 3 no jumper bootstrap from external memory 56f826 external oscillator headers jg4 3 2 1 1 2 3 extal xtal jg5 10m 4.00mhz 12.2880mhz f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . debug support motorola technical summary 2-7 2.7 debug leds six on-board light-emitting diodes (leds) are provided to allow real-time debugging for user programs. these leds will allow the programmer to monitor program execution without having to stop the program during debugging; refer to figure 2-5 . user led1 is controlled by port bs pb0 signal. user led2 is controlled by pb1. user led3 is controlled by pb2. user led4 is controlled by pb3. user led5 is controlled by pb4. user led6 is controlled by pb5. setting pb0, pb1, pb2, pb3, pb4 or pb5 to a logic one value will turn on the associated led. figure 2-5. schematic diagram of the debug led interface 2.8 debug support the 56f826evm provides an on-board parallel jtag host target interface and a jtag interface connector for external target interface support. two interface connectors are provided to support each of these debugging approaches. these two connectors are designated the jtag connector and the host parallel interface connector. 56f826 inverting buffer pb0 pb1 pb2 green led yellow led red led +3.3v green led yellow led red led pb3 pb4 pb5 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . 2-8 56f826 evaluation module hardware users manual motorola 2.8.1 jtag connector the jtag connector on the 56f826evm allows the connection of an external host target interface for downloading programs and working with the 56f826s registers. this connector is used to communicate with an external host target interface which passes information and data back and forth with a host processor running a debugger program. table 2-4 shows the pin-out for this connector. when this connector is used with an external host target interface, the parallel jtag interface should be disabled by placing a jumper in jumper block jg1. reference table 2-5 for this jumpers selection options. table 2-4. jtag connector description j3 pin # signal pin # signal 1 tdi 2 gnd 3 tdo 4 gnd 5 tck 6 gnd 7 nc 8 key 9 reset 10 tms 11 +3.3v 12 nc 13 nc 14 trst table 2-5. parallel jtag interface disable jumper selection jg1 comment no jumpers on-board parallel jtag interface enabled 1C2 disable on-board parallel jtag interface f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . debug support motorola technical summary 2-9 2.8.2 parallel jtag interface connector the parallel jtag interface connector, p2, allows the 56f826 to communicate with a parallel printer port on a windows pc; reference figure 2-6 . by using this connector, the user can download programs and work with the 56f826s registers. table 2-6 shows the pin-out for this connector. when using the parallel jtag interface, the jumper at jg1 should be removed, as shown in table 2-5 . figure 2-6. block diagram of the parallel jtag interface table 2-6. parallel jtag interface connector description p2 pin # signal pin # signal 1nc14nc 2 port_reset 15 port_ident 3port_tms16 nc 4 port_tck 17 nc 5 port_tdi 18 gnd 6port_ trst 19 gnd 7nc20gnd 8port_ident21 gnd p2 parallel jtag interface 56f826 tdi tdo p_trst tms tck p_reset out out out out out out in in in in in in en tdi tdo trst tms tck reset jg1 1 2 +3.3v jumper removed: enable jtag i/f jumper pin 1-2: disable jtag i/f db-25 connector f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . 2-10 56f826 evaluation module hardware users manual motorola 2.9 external interrupts two on-board push-button switches are provided for external interrupt generation, as shown in figure 2-7 . sw2 allows the user to generate a hardware interrupt for signal line irqa . sw3 allows the user to generate a hardware interrupt for signal line irqb . these two switches allow the user to generate interrupts for his user-specific programs. figure 2-7. schematic diagram of the user interrupt interface 9port_vcc22 gnd 10 nc 23 gnd 11 port_tdo 24 gnd 12 nc 25 gnd 13 port_connect table 2-6. parallel jtag interface connector description p2 pin # signal pin # signal 56f826 irqa irqb +3.3v +3.3v 10k 10k sw2 sw3 0.1f 0.1f f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . reset motorola technical summary 2-11 2.10 reset logic is provided on the 56f826 to generate an internal power-on reset. additional reset logic is provided to support the reset signals from the jtag connector, the parallel jtag interface and the user reset push-button; refer to figure 2-8 . figure 2-8. schematic diagram of the reset interface reset pushbutton manual reset jtag_tap_reset jtag_reset reset trst f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . 2-12 56f826 evaluation module hardware users manual motorola 2.11 power supply the main power input, +12.0v dc, to the 56f826evm is through a 2.1mm coax power jack. an optional +5.0v dc power supply input is available through a 2-pin terminal block, tb1. a 1.2a power supply is provided with the 56f826evm; however, less than 500ma is required by the evm. the remaining current is available for the users custom daughter card application, when connected to the daughter card interface. the power regulation on the 56f826evm provides +5.0v dc voltage regulation for the codecs analog circuits and to the additonal voltage regulation logic on the evm. the additional voltage regulation logic provides +2.5v dc voltage regulation for the hybrid controllers core and +3.3v dc voltage regulation for the controllers i/o, memory, parallel jtag interface and supporting logic; refer to figure 2-9 . power applied to the 56f826evm is indicated with a power-on led, referenced as led7. figure 2-9. schematic diagram of the power supply +5.0v dc analog +12.0v dc power condition codec 56f826 +3.3v regulator tb1 p1 +5.0v dc gnd +2.5v regulator 56f826evm parts 56f826 core +3.3 vdc +2.5v dc +5.0v regulator f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . stereo codec motorola technical summary 2-13 2.12 stereo codec a 16-bit audio quality stereo codec, crystal semiconductor cs4218, is connected to the 56f826s ssi port to support audio, voice and signal analysis applications. the codec is clocked with a 12.288mhz oscillator allowing the codec to operate between a sample frequency of 8khz and 48khz. the sample rate can be manually set using the appropriate switch positions on dip switch s4. this three position dip switch makes the sample rate selections detailed in table 2-7 possible. the codec supports +3.3v digital levels, eliminating the need for voltage level translation circuitry. additionally, a set of zero ohm resistors are provided on the evm to allow a user to disconnect the on-board codec from the ssi port and to connect his own codec to the ssi port; see figure 2-11 . the on-board codec has analog signal-conditioning logic, allowing direct connection to its line level input and line level output signals through two 1/8 stereo jacks; reference figure 2-10 . 2.12.1 analog input/output the 56f826evm uses jacks for line level stereo input, line level stereo output and stereo headphone output. a national semiconductor lm4880 provides the drive required for the use of headphones. this device offers a thd, which is superior to the cs4218s on-chip headphone drive circuitry by a factor of two. the basic analog codec connections are shown in figure 2-10 . table 2-7. codec sample rate selector sw 4 position 3 (mf6) sw 4 position 2 (mf7) sw 4 position 3 (mf8) sample rate on on on 48.00khz on on off 32.00khz on off on 24.00khz on off off 19.20khz off on on 16.00khz off on off 12.00khz off off on 9.60khz off off off 8.00khz f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . 2-14 56f826 evaluation module hardware users manual motorola figure 2-10. codec analog connections 2.12.2 digital interface the serial interface of the codec transfers digital audio data and control data into and out of the device. the ssi port, which consists of independent transmitter and receiver sections, is used for serial communication with the codec. on the hybrid controller side, the serial transmit data, std, pin is an output when data is being transmitted to the codec. the serial receive data, srd, pin is an input when data is being received from the codec. these two pins are connected to the codec serial data input, sdin, and serial data output, sdout, pins. the hybrid controllers transmit serial clock, stck, pin provides the serial bit rate clock for the ssi interface. it is connected to the codec serial port clock, sclk, pin. data is transmitted on the rising edge of sclk and is received on the falling edge of sclk. the hybrid controllers gpio port d bit 0 pin, pd0, is programmed to control the codecs active low reset, reset, signal. the serial transmit frame sync pin, stfs, is programmed to control the codecs frame sync, fsync, signal. fsync is sampled by sclk, with a rising edge indicating that a new frame is about to start. the fsync frequency is always the systems sample rate. it may be an input to the codec, or it may be an output from the codec in data mode. the basic codec digital connections are shown in figure 2-11 . the codecs mode is set by the three mode selection resistors, r96-r98. in the factory default setting of mode 4, the codec is set to be the master of the spi bus with its data word set at 32 bits per frame; i.e., 16 bits, left channel and 16 bits, right channel. the sample rate is selected on sample rate selector switch s4; reference table 2-7 for selection options. codec control information is sent over a separate serial port using: pd1 rin1 lin1 loutr line level input cs4218 lm4880 p4 p5 p6 a headphone output line level output a a loutl f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . daughter card connectors motorola technical summary 2-15 as the control chip select, ccs, signal; pd2 as the control data input, cdin, signal; and pd3 as the control clock, cclk, signal. figure 2-11. cs4218 stereo audio codec 2.13 daughter card connectors the evm board contains two daughter card expansion connectors. one connector, j1, contains the hybrid controllers external memory bus signals. the other connector, j2, contains the controllers peripheral port signals. codec enable logic 56f826 cs4218 sdin sdout sclk fsync reset std srd stck stfs pd0 ccs cdin cclk pd1 pd2 pd3 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . 2-16 56f826 evaluation module hardware users manual motorola 2.13.1 memory daughter card expansion connector the hybrid controllers external memory bus signals are connected to the memory daughter card expansion connector, j1. table 2-8 shows the port signal to pin assignments. table 2-8. memory daughter card connector description j1 pin # signal pin # signal 1a102a11 3a94ds 5a86a15 7a78a14 9gnd10gnd 11 wr 12 a13 13 d0 14 a12 15 d1 16 d8 17 d2 18 d9 19 gnd 20 gnd 21 d3 22 d10 23 d4 24 d11 25 d5 26 d12 27 d6 28 d13 29 gnd 30 gnd 31 d7 32 d14 33 ps 34 d15 35 a0 36 rd 37 a1 38 a6 39 gnd 40 gnd 41 a2 42 a5 43 a3 44 a4 45 gnd 46 gnd 47 +3.3v 48 +3.3v f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . daughter card connectors motorola technical summary 2-17 2.13.2 peripheral daughter card expansion connector the hybrid controllers peripheral port signals are connected to the peripheral daughter card expansion connector, j2. table 2-9 shows the port signal to pin assignments. 49 gnd 50 gnd 51 gnd table 2-9. peripheral daughter card connector description j2 pin # signal pin # signal 1 pb0 2 pb1 3 clko 4 pb2 5 ta06ta1 7 pb3 8 pb4 9ta210ta3 11 pb5 12 pb6 13 gnd 14 gnd 15 srd 16 pb7 17 srfs 18 pd0 19 sclk 20 pd1 21 gnd 22 gnd 23 mosi 24 pd2 25 miso 26 pd3 27 gnd 28 gnd 29 ss 30 pd4 31 srck 32 pd5 33 stfs 34 pd6 35 reset 36 pd7 37 gnd 38 gnd j1 pin # signal pin # signal f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . 2-18 56f826 evaluation module hardware users manual motorola 2.14 test points the 56f826evm board has a total of seven test points. three digital gnd test points are located in corners of the board. the +5.0va and agnd test points are located in the analog corner of the board. the +2.5v and +3.3v test points are located in the power supply section of the board. 39 std 40 rxd1 41 stck 42 txd1 43 irqb 44 rxd0 45 irqa 46 txd0 47 +3.3v 48 +3.3v 49 gnd 50 gnd 51 gnd table 2-9. peripheral daughter card connector description (continued) j2 pin # signal pin # signal f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . motorola 56f826evm schematics a-1 appendix a 56f826evm schematics f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . a-2 56f826 evaluation module hardware users manual motorola figure a-1. 56f826 processor a a b b c c d d e e 4 4 3 3 2 2 1 1 red led yellow led green led red led yellow led green led dspd design dsp56f826 processor and debug leds dsp5 6f826evm.dsn 1.2 110 sunday, april 08, 2001 b dsp standard produ cts division 2100 east elliot road tempe, arizona 85284 title document date: size designer: sheet of rev. number (480) 413-5090 fax: (480) 413-2510 d15 d1 d7 a10 d10 d2 a13 d5 d6 d4 d11 a12 a6 d14 a2 d3 d8 a7 a11 a0 a8 a15 d0 d12 a4 a9 a14 a3 a5 d9 d13 a1 tck tdi tms /de tcs pb0 pb1 pb2 pb3 pb4 pb5 a[0..15] d[0..15] miso sclk rxd0 txd1 std srfs mosi /ss txd0 rxd1 srd stfs stck srck /reset pb0 pb1 pb2 pb3 pb4 pb5 pb6 pb7 pd0 pd1 pd2 pd3 pd4 pd5 pd6 pd7 pb3 pb4 pb5 pb0 pb1 pb2 /wr /rd /ps /ds extal xtal clko /trst tms tdo tck tdi tcs /de /irqa /irqb ta0 ta1 ta2 ta3 xboot +3.3v +3.3v +2.5v +3.3v +2.5v r80 10k dnp r81 10k dnp r79 10k dnp r92 10k r93 10k r11 270 u11d mc74ac04ad 9 8 r13 270 u11e mc74ac04ad 11 10 r14 270 u11f mc74ac04ad 13 12 r3 270 u11a mc74ac04ad 1 2 r6 270 u11b mc74ac04ad 3 4 r9 270 u11c mc74ac04ad 5 6 r4 47k r5 47k r7 47k r8 47k r10 47k r12 47k led1 led2 led3 led4 led5 led6 u1 dsp56f826bu80 34 35 36 37 38 39 40 41 42 43 44 46 47 48 49 50 24 23 22 21 18 17 16 15 14 13 12 11 10 9 8 7 66 67 68 69 70 71 72 73 74 75 76 77 78 79 82 83 86 85 84 87 97 96 93 92 51 54 55 56 53 45 32 33 2 3 100 1 4 99 63 31 58 19 95 81 6 27 26 29 28 65 61 62 59 60 5 30 57 80 94 64 52 98 20 25 91 89 90 88 d0 d1 d2 d3 d4 d5 d6 d7 d8 d9 d10 d11 d12 d13 d14 d15 a0/pe0 a1/pe1 a2/pe2 a3/pe3 a4/pe4 a5/pe5 a6/pe6 a7/pe7 a8/pa0 a9/pa1 a10/pa2 a11/pa3 a12/pa4 a13/pa5 a14/pa6 a15/pa7 pb0 pb1 pb2 pb3 pb4 pb5 pb6 pb7 pd0 pd1 pd2 pd3 pd4 pd5 pd6 pd7 miso/pf6 mosi/pf5 sclk/pf4 ss/pf7 txd0/sclk0 rxd0/mosi0 txd1/miso0 rxd1/ss0 srd/pc0 std/pc3 stfs/pc4 stck/pc5 srck/pc2 reset irqa irqb tdi tdo tck tms trst tcs gnd1 gnd2 gnd3 gnd4 gnd5 gnd6 gnd7 wr rd ps ds clko extal xtal vdda vssa vdd1 vdd2 vdd3 vdd4 vddc1 vddc2 srfs/pc1 de vddc3 xboot ta0/pf0 ta2/pf2 ta1/pf1 ta3/pf3 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . motorola 56f826evm schematics a-3 figure a-2. reset, mode, clock & irqs a a b b c c d d e e 4 4 3 3 2 2 1 1 irqa pushbutton osc bypass irqb pushbutton reset pushbutton boot mode jumper int boot ext boot nc 1 - 2 12 3 ds1818 ext osc >8mhz dspd design reset, clock, boot mode & irqs dsp56f826evm.dsn 1.2 210 sunday, april 08, 2001 a dsp standard products division 2100 east elliot road tempe, arizona 85284 title docu ment date: size designer: sheet of rev. number (480) 413-5090 fax: (480) 413-2510 /por /por /irqa /irqb xboot 12.288mhz xtal extal +3.3v +3.3v +2.5v +3.3v jg4 1 2 3 y1 4.00mhz s1 s2 s3 r72 10k r71 10k r70 10k r1 10m jg6 1 2 u12 ds1818 dnp 2 1 3 vcc rst gnd c30 0.1uf c31 0.1uf c32 0.1uf jg5 1 2 3 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . a-4 56f826 evaluation module hardware users manual motorola figure a-3. program & data sram memory a a b b c c d d e e 4 4 3 3 2 2 1 1 64kx16-bit program and 64kx16-bit data memory sram ena ble jumper option jg3 sram enable sram disable 1-2 nc dspd design program and data sram memory dsp56f826evm.dsn 1.2 310 sunday, april 08, 2001 a dsp standard products division 2100 east elliot road tempe, arizona 85284 title docu ment date: size designer: sheet of rev. number (480) 413-5090 fax: (480) 413-2510 d5 d2 d13 d3 d7 d1 d15 d11 d4 d10 d6 d0 d12 d9 d8 d14 a11 a10 a1 a9 a15 a3 a7 a5 a14 a6 a13 a0 a12 a8 a2 a4 /rd /wr d[0..15] a[0..15] /ps +3.3v +3.3v u2 gs72116 tp-12 7 8 1 9 10 2 13 14 3 15 16 4 29 30 5 31 32 18 35 36 19 37 38 20 21 24 25 26 27 42 43 44 40 39 41 17 6 22 34 12 33 11 dq1 dq2 a4 dq3 dq4 a3 dq5 dq6 a2 dq7 dq8 a1 dq9 dq10 a0 dq11 dq12 a15 dq13 dq14 a14 dq15 dq16 a13 a12 a11 a10 a9 a8 a7 a6 a5 ub lb oe we ce a16 vss vss vdd vdd jg3 1 2 r67 10k r69 1k r68 1k f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . motorola 56f826evm schematics a-5 figure a-4. spi serial 1m-bit serial eeprom memory a a b b c c d d e e 4 4 3 3 2 2 1 1 eeprom enable dspd design spi serial 1m-bit eeprom memory dsp56f826evm.dsn 1.2 410 sunday, april 08, 2001 a dsp standard products division 2100 east elliot road tempe, arizona 85284 title docu ment date: size designer: sheet of rev. number (480) 413-5090 fax: (480) 413-2510 /res /wp /res /wp ee_so ee_si ee_sck /ee_cs /ss miso mosi sclk +3.3v +3.3v r90 10k r91 10k jg7 1 3 5 7 2 4 6 8 u4 at45db011-sc 1 8 4 6 3 5 7 2 si so cs vcc reset wp gnd sck f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . a-6 56f826 evaluation module hardware users manual motorola figure a-5. sci port, rs-232 and connector a a b b c c d d e e 4 4 3 3 2 2 1 1 rs-232 enable 1 - 2 n/c rs-232 enable rs-232 disable connector cts dsr dtr rxd txd rts dcd sci rs-232 ri gnd dspd design sci port, rs-232 and con nector dsp56f826evm.dsn 1.2 5 10 sunday, april 08, 2001 a dsp standard products division 2100 east elliot road tempe, arizona 85284 title docu ment date: size designer: sheet of rev. number (480) 413-5090 fax: (480) 413-2510 r4in r5in r2in r3in t3in /en t2in t2in t3in /en r3in r4in r5in r2in txd0 rxd0 +3.3v +3.3v +3.3v r61 1k r62 1k r60 1k r59 1k r56 1k r58 1k r55 1k jg2 1 2 r57 1k t11 1 t12 1 t13 1 t14 1 p3 5 9 4 8 3 7 2 6 1 t9 1 t8 1 t15 1 t10 1 u3 max324 5eeai 27 1 26 2 23 28 14 13 12 19 18 17 16 15 8 7 6 5 4 11 10 9 22 24 3 25 20 21 v+ c2+ vcc c2- forceon c1+ t1in t2in t3in r1out r2out r3out r4out r5out r5in r4in r3in r2in r1in t3out t2out t1out forceoff c1- v- gnd r2outb invalid r88 0 ohm r89 0 ohm c27 1.0uf c28 1.0uf c26 1.0uf c29 1.0uf f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . motorola 56f826evm schematics a-7 figure a-6. ssi 16-bit stereo codec a a b b c c d d e e 4 4 3 3 2 2 1 1 mf6 mf7 mf8 fs (khz) 000 00 00 0 00 0 0 1 1 11 1 1 1 1 1 111 48.00 32.00 24.00 19.20 16.00 12.00 9.60 8.00 serial mode 4 selected master, 32bits per frame line out stereo jack line-input stereo jack sample select headphone out stereo jack dspd design ssi 16-bit stereo codec dsp5 6f826evm.dsn 1.2 6 10 sunday, april 08, 2001 b dsp standard produ cts division 2100 east elliot road tempe, arizona 85284 title document date: size designer: sheet of rev. number (480) 413-5090 fax: (480) 413-2510 mf1 codec_fsync codec_sdout ring_in cdin /pdn tip_in codec_sclk 12.288mhz lout ring_out rout cclk codec_sdin mf5 /ccs /codec_reset /codec_reset /ccs cdin cclk codec_sclk codec_sdin codec_sdout codec_fsync /ccs mf5 mf1 mf8 mf7 mf6 mode3 mode2 mode1 /pdn mf6 mf7 mf8 mode3 mode2 mode1 shutdn lout rout shutdn bypass mf7 mf8 mf6 tip_out ring_phn tip_phn mode1 mode2 mode3 srd std stck stfs pd0 pd1 pd2 pd3 12.288mhz +5.0va +3.3v +3.3v +3.3v +3.3v +5.0va r31 5.62k 1% c17 0.47uf r34 39.2k 1% r32 5.62k 1% c21 0.47uf c10 470pf r33 5.62k 1% c15 0.0022uf r35 39.2k 1% c14 0.33uf c12 470pf c16 0.0022uf r30 5.62k 1% c18 0.47uf c8 0.33uf r53 0 ohm r54 0 ohm r52 0 ohm r48 0 ohm u7 12.288mhz osc 1 8 4 5 en vcc gnd out r41 1k r47 0 ohm r50 0 ohm r49 0 ohm r51 0 ohm r36 10k r37 10k r42 10k r86 1k r44 10k r45 10k r43 10k r85 10k r84 10k r83 10k r82 10k c9 0.1uf + c7 47uf 10vdc r87 10k c11 1uf 25v c13 1uf 25v c25 1uf 25v p4 1/8" 11 2 1 3 10 p5 1/8" 11 2 1 3 10 p6 1/8" 11 2 1 3 10 c20 1uf 25v c19 1uf 25v r39 20.0k 1% r38 20.0k 1% r46 20.0k 1% r40 20.0k 1% + c24 47uf 10vdc + c23 47uf 10vdc u6 lm4880m 2 6 1 7 8 4 5 3 in_a in_b out_a out_b vdd gnd shutdn bypass r96 0 ohm r97 0 ohm r98 0 ohm dnp s4 6 4 2 5 3 1 u5 cs4218-kq 24 35 25 41 28 26 32 23 40 30 7 39 29 38 33 37 36 34 15 16 9 10 20 22 21 19 14 18 17 42 43 wf8 swode3 wf7 clkin wf6 swode2 mf5 swode1 reset mf4 pdn ssync mf3 sclk mf2 sdout sdin mf1 refby refgnd rout lout rin2 lin2 lin1 rin1 refbuf vdda gnda vdd gnd f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . a-8 56f826 evaluation module hardware users manual motorola figure a-7. parallel jtag host target interface and jtag connector a a b b c c d d e e 4 4 3 3 2 2 1 1 parallel jtag interface key jtag connector on-board host target interface disable port_vcc port_de dspd design parallel jtag host target interface and jtag connector dsp5 6f826evm.dsn 1.2 710 sunday, april 08, 2001 b dsp standard produ cts division 2100 east elliot road tempe, arizona 85284 title document date: size designer: sheet of rev. number (480) 413-5090 fax: (480) 413-2510 /j_reset p_reset /j_trst /j_reset tdo p_reset tms tck tdi /j_trst tdo port_tdo port_tms /port_trst port_tck port_tdi port_connect port_reset port_ident /j_trst /j_reset /j_trst /por tdi tdo tck tms /reset /trst /por +3.3v +3.3v +3.3v +3.3v +3.3v r21 51 ohm r25 5.1k r24 5.1k j3 1 3 5 7 9 11 13 2 4 6 8 10 12 14 r26 47k r28 47k r15 270 r17 270 r16 270 r19 270 r18 270 r23 5.1k jg1 1 2 u8 mc74lcx244dw 18 16 14 12 9 7 5 3 19 1 2 4 6 8 11 13 15 17 20 10 1y1 1y2 1y3 1y4 2y1 2y2 2y3 2y4 2g 1g 1a1 1a2 1a3 1a4 2a1 2a2 2a3 2a4 vcc gnd t7 1 r20 5.1k p2 db25m 1 3 2 15 14 16 4 17 5 18 6 19 7 20 8 21 9 22 10 23 11 24 12 25 13 r22 51 ohm r29 47k u9a 74ac00 1 2 3 u9b 74ac00 4 5 6 u9c 74ac00 9 10 8 u9d 74ac00 12 13 11 r27 47k q1 2n2222a f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . motorola 56f826evm schematics a-9 figure a-8. daughter card expansion connectors a a b b c c d d e e 4 4 3 3 2 2 1 1 daughter address/data con nector daughter peripheral port con nector a16 a17 a18 a19 a20 /cs2 /cs3 /cs0 /cs1 dspd design daughter card expansion connectors dsp56f826evm.dsn 1.2 8 10 sunday, april 08, 2001 a dsp standard products division 2100 east elliot road tempe, arizona 85284 title docu ment date: size designer: sheet of rev. number (480) 413-5090 fax: (480) 413-2510 gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd gnd d0 d2 d4 d6 d8 d14 a0 a2 a6 a8 a14 /rd /wr d1 d3 d5 d7 d9 d13 d15 a5 a7 a9 a13 a15 /ps a1 /ds a10 a11 a12 a3 a4 d10 d11 d12 miso sclk txd1 srd srfs srck /reset /irqa pb2 pb0 pb4 pb6 pd6 pd4 pd0 pd2 mosi /ss rxd0 rxd1 std stfs stck /irqb clko pb1 pb3 pb5 pb7 pd1 pd3 pd5 pd7 txd0 ta0 ta2 ta1 ta3 +3.3v +3.3v +3.3v +3.3v j1 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 51 j2 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 51 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . a-10 56f826 evaluation module hardware users manual motorola figure a-9. power supplies a a b b c c d d e e 4 4 3 3 2 2 1 1 external power input 7-12vdc/ac 123 4 mc33269 5.0v, 3.3v & adj regulator power good led vout = 1.25( 1 + (rhigh/ rlow)) rhigh = 107 1% for 1.8v rhigh = 243 1% for 2.5v rlow rhigh input +5vdc + - dspd design power s upplies dsp56f826evm.dsn 1.2 910 sunday, april 08, 2001 a dsp standard products division 2100 east elliot road tempe, arizona 85284 title docu ment date: size designer: sheet of rev. number (480) 413-5090 fax: (480) 413-2510 +5.0v +5.0va +3.3v +3.3v vcc +2.5v +5.0v +5.0v c4 0.1uf c6 0.1uf u10 mc33269dt-3.3 3 2 4 1 vin vout vout gnd l1 ferrite bead l3 ferrite bead l2 ferrite bead + c5 47uf 10vdc r2 470 c55 0.1uf u13 mc33269dt-adj 3 2 4 1 vin vout vout gnd r94 243 1% r95 243 1% + c57 47uf 10vdc l4 ferrite bead + c56 47uf 10vdc tb1 1 2 led7 p1 1 3 2 u14 mc33269dt-5 3 2 4 1 vin vout vout gnd + c3 470uf 16vdc -+ d4 5 1 8 4 d3 fm4001 d1 fm4001 d2 fm4001 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . motorola 56f826evm schematics a-11 figure a-10. bypass caps a a b b c c d d e e 4 4 3 3 2 2 1 1 dsp56f826 74ac04 74ac00 gs72116 ds1818 max3245 at45db011 74lcx244 cs4218 osc lm4880 test points ground analog ground test point test point test point +5.0va +3.3v test point +2.5v dspd design bypass caps dsp56f826evm.dsn 1.2 10 10 sunday, april 08, 2001 a dsp standard products division 2100 east elliot road tempe, arizona 85284 title docu ment date: size designer: sheet of rev. number (480) 413-5090 fax: (480) 413-2510 +2.5v +3.3v +2.5v +2.5v +2.5v +2.5v +3.3v +3.3v +3.3v +3.3v +3.3v +3.3v +3.3v +3.3v +3.3v +3.3v +3.3v +3.3v +3.3v +3.3v +3.3v +5.0va +5.0va +3.3v +2.5v c41 0.01uf c42 0.1uf c39 0.01uf c35 0.01uf c37 0.01uf c33 0.01uf c36 0.1uf c34 0.1uf c38 0.1uf c40 0.1uf c49 0.01uf dnp c45 0.01uf c43 0.01uf c46 0.1uf c44 0.1uf c48 0.1uf c50 0.1uf c51 0.1uf c52 0.01uf c53 0.1uf c54 0.01uf c22 0.1uf tp3 1 tp4 1 tp5 1 tp2 1 tp1 1 tp6 1 tp7 1 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . a-12 56f826 evaluation module hardware users manual motorola f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . motorola 56f826evm bill of material b-1 appendix b 56f826evm bill of material qty description ref. designators vendor part # integrated circuits 1 dsp56f826bu80 u1 motorola, dsp56f826bu80 1 gs72116 u2 gsi, gs72116tp-12 1 max3245 u3 maxim, max3245eeai 1 at45db011 u4 atmel, at45db011-sc 1 cs4218 u5 crystal semiconductor, cs4218-kq 1 lm4880 u6 national semiconductor, lm4880m 1 12.288mhz osc u7 epson, sg-531p-12.288mc 1 74lcx244 u8 on semiconductor, mc74lcx244adw 1 74ac00 u9 fairchild, 74ac00sc 1 +3.3v voltage regulator u10 on semiconductor, mc33269dt-3.3 1 74ac04 u11 on semiconductor, mc74ac04ad 1 +2.5v voltage regulator u13 on semiconductor, mc33269dt-adj 1 +5.0v voltage regulator u14 on semiconductor, mc33269dt-5 resistors 110m ? r1 smec, rc73l2a10mohmjt 1470 ? r2 smec, rc73l2a470ohmjt 11 270 ? r3, r6, r9, r11, r13 - r19 smec, rc73l2a270ohmjt 10 47k ? r4, r5, r7, r8, r10, r12, r26 - r29 smec, rc73l2a47kohmjt 45.1k ? r20, r23, r24, r25 smec, rc73l2a5.1kohmjt 251 ? r21, r22 smec, rc73l2a51ohmjt 4 5.62k ?, 1% r30 - r33 smec, rc73l2a5.62kohmft f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . b-2 56f826 evaluation module hardware users manual motorola resistors (continued) 239.2k ?, 1% r34, r35 smec, rc73l2a39.2kohmft 19 10k ? r36, r37, r42 - r45, r67, r70 - r72, r82 - r85, r87, r90 - r93 smec, rc73l2a10kohmjt 420.0k ?, 1% r38 - r40, r46 smec, rc73l20.0kohmft 12 1k ? r41, r55 - r62, r68, r69, r86 smec, rc73l2a1kohmjt 12 0 ? r47 - r54, r88, r89, r96, r97 smec, rc73jp2a 2 243 ?, 1% r94, r95 smec, rc73l243ohmft inductors 4 1.0mh ferrite bead l1, l2, l3, l4 panasonic, exc-elsa35v leds 2 red led led1, led4 hewlett-packard, hsms-c650 2 yellow led led2, led5 hewlett-packard, hsmy-c650 3 green led led3, led6, led7 hewlett-packard, hsmg-c650 diode 2 s2b-fm401 d1, d2, d3 vishay, dl4001dict 1 1a bridge rectifier d4 general semiconductor, df02s qty description ref. designators vendor part # f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . motorola 56f826evm bill of material b-3 capacitors 1470 f, 16v dc c3 elma, rv-16v471mh10r 19 0.1 f c4, c6, c9, c22, c30 - c32, c34, c36, c38, c40, c42, c44, c46, c48, c50, c51, c53, c55 smec, mcce104k2nr-t1 647 f, 16v dc c5, c7, c23, c24, c56, c57 elma, rv2-16v470m-r 20.33 f c8, c14 smec, mcce334k3nr-t1 2 470pf c10, c12 smec, mcce471j2no-t1 91.0 f, 25v dc c11, c13, c19, c20, c25 - c29 smec, mcce105k3nr-t1 2 0.0022 f c15, c16 smec, mcce222k2nr-t1 30.47 f c17, c18, c21 smec, mcce474k3nr-t1 90.01 f c33, c35, c37, c39, c41, c43, c45, c52, c54 smec, mcce103k2nr-t1 qty description ref. designator vendor part # jumpers 41 2 bergstick jg1, jg2, jg3, jg6 samtec, tsw-102-07-s-s 23 1 bergstick jg4, jg5 samtec, tsw-103-07-s-s 14 2 bergstick jg7 samtec, tsw-104-07-s-d test points 71 1 bergstick tp1 - tp7 samtec, tsw-101-07-s-s crystals 1 4.00mhz crystal y1 cts, ats04asm-t connectors 1 2.1mm coax power connector p1 switchcraft, rapc-722 1 db25m connector p2 amphenol, 617-c025p-aj121 qty description ref. designators vendor part # f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . b-4 56f826 evaluation module hardware users manual motorola 1 de9s connector p3 amphenol, 617-c009s-aj120 3 1/8 stereo jack p4 - p6 switchcraft, 35rapc4bhn2 2 51-pin hd connector j1, j2 berg, 91930-21151 1 7 x 2 bergstick j3 samtec, tsw-107-07-s-d 1 2-pin terminal block tb1 on-shore technology, ed500/2ds switches 3 spst pushbutton s1 - s3 panasonic, evq-pad05r 1 3-position dip sw s4 cts, 209-3lpst transistors 1 2n2222a q1 zetex, fmmt2222act miscellaneous 8 shunt sh1Csh8 samtec, snt-100-bl-t 4 rubber feet rf1Crf4 3m, sj5018blkc qty description ref. designator vendor part # f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . motorola index i numerics 1.2a power supply 2-12 16-bit +2.5v/+3.3v hybrid processor 2-1 16-bit stereo codec interface 2-1 1mbit serial eeprom 2-1 4.00mhz crystal oscillator 2-1 56f826 technical data xi 56f826/827 users manual xi 64kx16 bits of data memory 2-1 64kx16 bits of program memory 2-1 c codec x coder/decoder codec x connectors peripheral expansion 2-16 d data memory 2-3 daughter card expansion interface 2-1 debugging 2-7 dsp56800 family manual xi e eeprom eeprom x electrically erasable programmable read-only memory x evaluation module x evm evm x f fsram 2-1 , 2-3 g general purpose input and output x gpio 2-2 gpio x h host parallel interface connector 2-7 host target interface 2-7 i ic ic x integrated circuit x j jg1 1-3 joint test action group xi jtag 1-1 , 2-1 connector 2-8 jtag xi jtag port interface 2-1 jumper group 1-3 jg2 1-3 jg3 1-3 jg4 1-3 jg5 1-3 jg6 1-3 jg7 1-3 l low-profile quad flat pack xi lqfp lqfp xi m mpio mpio xi multi-purpose input and output port xi o on-board power regulation 2-2 once once xi once(tm) 1-1 index f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . ii 56f826 evaluation module users manual motorola on-chip emulation xi operating mode 2-6 optional external oscillator frequency input 2-1 p parallel jtag host target interface 2-1 pcb pcb xi peripheral connectors 2-15 phase locked loop xi pll pll xi printed circuit board xi program memory 2-3 r ram ram xi random access memory xi read-only memory xi real-time debugging 2-7 rom rom xi rs-232 interface 2-5 level converter 2-5 schematic diagram 2-5 rs-232 interface 2-1 rs-232 serial communications 2-5 s sci 2-2 sci xi serial communications interface xi serial peripheral interface xi spi 2-2 spi xi sram external data 2-1 external program 2-1 sram xi ssi 2-2 ssi xi static random access memory xi stereo 16-bit codec interface 2-1 stereo headphone interface 2-1 synchronous serial interface xi w wait state xi ws ws xi f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . motorola index iii f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . iv 56f826 evaluation module users manual motorola f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . dsp56826evmum/d motorola and the stylized m logo are registered in the us patent & trademark office. all other product or service names are the property of their respective owners. ? motorola, inc. 2003. how to reach us: usa/europe/locations not listed: motorola literature distribution; p.o. box 5405, denver, colorado 80217. 1C303C675C2140 or 1C800C441C2447 japan: motorola japan ltd.; sps, technical information center, 3C20C1, minamiCazabu. minatoCku, tokyo 106C8573 japan. 81C3C3440C3569 asia/pacific: motorola semiconductors h.k. ltd.; silicon harbour centre, 2 dai king street, tai po industrial estate, tai po, n.t., hong kon g. 852C26668334 technical information center: 1C800C521C6274 home page: http://www.motorola.com/semiconductors/ motorola reserves the right to make changes without further notice to any products herein. motorola makes no warranty, represen tation or guarantee regarding the suitability of its products for any particular purpose, nor does motorola assume any liability arising out of the application o r use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. typical param eters which may be provided in motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all oper ating parameters, including typicals must be validated for each customer application by customers technical experts. motorola does not convey any licens e under its patent rights nor the rights of others. motorola products are not designed, intended, or authorized for use as components in systems intended for sur gical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the motorola product cou ld create a situation where personal injury or death may occur. should buyer purchase or use motorola products for any such unintended or unauthorized application, buyer s hall indemnify and hold motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expens es, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized u se, even if such claim alleges that motorola was negligent regarding the design or manufacture of the part. motorola and b are registered trademarks of motorola, inc. motorola, inc. is an equal opportunity/affirmative action employer. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . . |
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