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  final publication# 06780 rev: i amendment/ +2 issue date: july 1997 am27c1024 1 megabit (65,536 x 16-bit) cmos eprom distinctive characteristics n fast access time 55 ns maximum access time n low power consumption 100 m a typical cmos standby current n jedec-approved pinouts 40-pin dip/pdip 44-pin plcc n single +5 v power supply n 10% power supply tolerance available n 100% flashrite programming typical programming time of 8 seconds n latch-up protected to 100 ma from ? v to v cc + 1 v n high noise immunity n versatile features for simple interfacing both cmos and ttl input/output compatibility two line control functions general description the am27c1024 is a 1 mbit ultraviolet erasable program- mable read-only memory. it is organized as 64k words by 16 bits per word, operates from a single +5 v supply, has a static standby mode, and features fast single address location programming. products are available in win- dowed ceramic dip packages as well as plastic one time programmable (otp) pdip and plcc packages. typically, any byte can be accessed in less than 70 ns, allowing operation with high-performance microproces- sors without any wait states. the am27c1024 offers separate output enable (oe ) and chip enable (ce ) controls, thus eliminating bus contention in a multiple bus microprocessor system. amds cmos process technology provides high speed, low power, and high noise immunity. typical power consumption is only 125 mw in active mode, and 100 m w in standby mode. all signals are ttl levels, including programming sig- nals. bit locations may be programmed singly, in blocks, or at random. the am27c1024 supports amds flashrite programming algorithm (100 m s pulses) re- sulting in a typical programming time of 8 seconds. block diagram v ss output enable chip enable and prog logic y decoder x decoder ce oe output buffers y gating 1,048,576-bit cell matrix a0?15 address inputs data outputs dq0?q15 06780i-1 v cc v pp pgm
2 am27c1024 product selector guide connection diagrams top view dip plcc note: 1. jedec nomenclature is in parenthesis. pin designations a0?15 = address inputs ce (e ) = chip enable dq0?q15 = data inputs/outputs oe (g ) = output enable input pgm (p ) = program enable input v cc =v cc supply voltage v pp = program voltage input v ss = ground nc = no internal connection du = no external connection (do not use) logic symbol family part no: am27c1024 ordering part no: v cc = 5.0 v 5% v cc = 5.0 v 10% -55 -255 -55 -70 -90 -120 -150 -200 max access time (ns) 55 70 90 120 150 200 250 ce (e ) access (ns) 55 70 90 120 150 200 250 oe (g ) access (ns) 40 40 40 50 65 75 75 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 v cc pmg (p) a16 a15 a14 a13 a12 a11 a10 a9 v ss a8 a7 a6 a5 a4 a3 a2 a1 a0 v pp ce (e) dq15 dq14 dq13 dq12 dq11 dq10 dq9 dq8 v ss dq7 dq6 dq5 dq4 dq3 dq2 dq1 dq0 oe (g) 06780i-2 1 44 43 42 5 4 3 2 641 40 7 8 9 10 11 12 13 14 15 16 17 23 24 25 26 19 20 21 22 18 27 28 39 38 37 36 35 34 33 32 31 30 29 dq12 dq11 dq10 dq9 dq8 v ss nc dq7 dq6 dq5 dq4 a13 a12 a11 a10 a9 v ss nc a8 a7 a6 a5 dq13 dq14 dq15 ce ( e ) v pp du v cc pgm ( p ) nc a15 a14 dq3 dq2 dq1 dq0 oe ( g ) du a0 a1 a2 a3 a4 06780i-3 16 16 dq0?q15 a0?15 ce (e ) pmg (p ) oe (g )/v pp 06780i-4
am27c1024 3 ordering information uv eprom products amd standard products are available in several packages and operating ranges. the order number (valid combination) is formed by a combination of: valid combinations valid combinations list con?urations planned to be sup- ported in volume for this device. consult the local amd sales of?e to con?m availability of speci? valid combinations and to check on newly released combinations. temperature range c = commercial (0 c to +70 c) i = industrial (?0 c to +85 c) e = extended (?5 c to +125 c) package type d = 40-pin ceramic dip (cdv040) device number/description am27c1024 1 megabit (65,536 x 16-bit) cmos uv eprom am27c1024 -55 d c optional processing blank = standard processing b = burn-in speed option see product selector guide and valid combinations b 5 voltage tolerance 5=v cc 5%, 55 ns only see product selector guide and valid combinations valid combinations am27c1024-55 v cc = 5.0 v 5% dc5, dc5b, di5, di5b am27c1024-55 v cc = 5.0 v 10% dc, dcb, di, dib am27c1024-70 am27c1024-90 am27c1024-120 dc, dcb, de, deb, di, dib am27c1024-150 am27c1024-200 am27c1024-255 v cc = 5.0 v 5% dc, dcb, di, dib
4 am27c1024 ordering information otp eprom products amd standard products are available in several packages and operating ranges. the order number (valid combination) is formed by a combination of: valid combinations valid combinations list con?urations planned to be sup- ported in volume for this device. consult the local amd sales of?e to con?m availability of speci? valid combinations and to check on newly released combinations. temperature range c = commercial (0 c to +70 c) i = industrial (?0 c to +85 c) package type p = 40-pin plastic dip (pd 040) j = 44-pin square plastic leaded chip carrier (pl 044) device number/description am27c1024 2 megabit (131,072 x 16-bit) cmos otp eprom am27c1024 -55 j c optional processing blank = standard processing speed option see product selector guide and valid combinations voltage tolerance 5=v cc 5%, -55 ns only see product selector guide and valid combinations 5 valid combinations am27c1024-55 v cc = 5.0 v 5% pc5, pi5, jc5, ji5 am27c1024-55 v cc = 5.0 v 10% pc, pi, jc, ji am27c1024-70 am27c1024-90 am27c1024-120 am27c1024-150 am27c1024-200 am27c1024-255 v cc = 5.0 v 5%
am27c1024 5 functional description erasing the am27c1024 in order to clear all locations of their programmed con- tents, it is necessary to expose the am27c1024 to an ultraviolet light source. a dosage of 15 w seconds/cm 2 is required to completely erase an am27c1024. this dosage can be obtained by exposure to an ultraviolet lamp?avelength of 2537 (?)?ith intensity of 12,000 m w/cm 2 for 15 to 20 minutes. the am27c1024 should be directly under and about one inch from the source and all ?ters should be removed from the uv light source prior to erasure. it is important to note that the am27c1024 and similar devices will erase with light sources having wavelengths shorter than 4000 ?. although erasure times will be much longer than with uv sources at 2537 ?, exposure to ?orescent light and sunlight will eventually erase the am27c1024 and exposure to them should be prevented to realize maximum system reliability. if used in such an environment, the package window should be covered by an opaque label or substance. programming the am27c1024 upon delivery or after each erasure the am27c1024 has all 1,048,576 bits in the ?ne or high state. ?eros are loaded into the am27c1024 through the procedure of programming. the programming mode is entered when 12.75 v 0.25v is applied to the v pp pin and ce and pgm are atv il . for programming, the data to be programmed is applied 16 bits in parallel to the data output pins. the flashrite algorithm reduces programming time by using 100 m s programming pulses and by giving each address only as many pulses as is necessary in order to reliably program the data. after each pulse is applied to a given address, the data in that address is veri?d. if the data does not verify, additional pulses are given until it veri?s or the maximum is reached. this process is re- peated while sequencing through each address of the am27c1024. this part of the algorithm is done at v cc = 6.25 v to assure that each eprom bit is programmed to a sufciently high threshold voltage. after the ?al ad- dress is completed, the entire eprom memory is veri- ?d at v cc = v pp = 5.25 v. please refer to section 6 for programming ?w chart and characteristics. program inhibit programming of multiple am27c1024 in parallel with different data is also easily accomplished. except for ce , all like inputs of the parallel am27c1024 may be common. a ttl low-level program pulse applied to an am27c1024 ce input with v pp = 12.75 v 0.25 v, and pgm low will program that am27c1024. a high-level ce input inhibits the other am27c1024 devices from being programmed. program verify a verify should be performed on the programmed bits to determine that they were correctly programmed. the verify should be performed with oe and ce at v il , pgm at v ih and v pp between 12.75 v 0.25 v. auto select mode the auto select mode allows the reading out of a binary code from an eprom that will identify its manufacturer and type. this mode is intended for use by programming equipment for the purpose of automatically matching the device to be programmed with its corresponding pro- gramming algorithm. this mode is functional in the 25 c 5 c ambient temperature range that is required when programming the am27c1024. to activate this mode, the programming equipment must force 12.0 v 0.5 v open address the a9 of the am27c1024. two identi?r bytes may then be se- quenced from the device outputs by toggling address line a0 from v il to v ih . all other address lines must be held at v il during auto select mode. byte 0 (a0 = v il ) represents the manufacturer code, and byte 1 (a0 = v ih ), the device code. for the am27c1024, these two identi?r bytes are given in the mode select table. all identi?rs for manufacturer and device codes will possess odd parity, with the msb (dq7) de?ed as the parity bit. read mode the am27c1024 has two control functions, both of which must be logically satis?d in order to obtain data at the outputs. chip enable (ce ) is the power control and should be used for device selection. output enable (oe ) is the output control and should be used to gate data to the output pins, independent of device selection. assuming that addresses are stable, address access time (t acc ) is equal to the delay from ce to output (t ce ). data is available at the outputs t oe after the falling edge of oe , assuming that ce has been low and addresses have been stable for at least t acc ? oe . standby mode the am27c1024 has a cmos standby mode which re- duces the maximum v cc current to 100 m a. it is placed in cmos-standby when ce is at v cc 0.3 v. the am27c1024 also has a ttl-standby mode which re- duces the maximum v cc current to 1.0 ma. it is placed in ttl-standby when ce is at v ih . when in standby mode, the outputs are in a high-impedance state, inde- pendent of the oe input.
6 am27c1024 output or-tieing to accommodate multiple memory connections, a two-line control function is provided to allow for: n low memory power dissipation n assurance that output bus contention will not occur it is recommended that ce be decoded and used as the primary device-selecting function, while oe be made a common connection to all devices in the array and connected to the read line from the system con- trol bus. this assures that all deselected memory de- vices are in low-power standby mode and that the output pins are only active when data is desired from a particular memory device. system applications during the switch between active and standby condi- tions, transient current peaks are produced on the ris- ing and falling edges of chip enable. the magnitude of these transient current peaks is dependent on the out- put capacitance loading of the device. at a minimum, a 0.1 m f ceramic capacitor (high frequency, low inherent inductance) should be used on each device between v cc and v ss to minimize transient effects. in addition, to overcome the voltage drop caused by the inductive effects of the printed circuit board traces on eprom ar- rays, a 4.7 m f bulk electrolytic capacitor should be used between v cc and v ss for each eight devices. the loca- tion of the capacitor should be close to where the power supply is connected to the array. mode select table notes: 1. v h = 12.0 v 0.5 v 2. x = either v ih or v il 3. a1?8 = a10?15 = v il 4. see dc programming characteristics for v pp voltage during programming. ce oe pgm a0 a9 v pp outputs read v il v il xxxxd out output disable x v ih xxxx hi-z standby (ttl) v ih xxxxx hi-z standby (cmos) v cc 0.3 v xxxxx hi-z program v il xv il xxv pp d in program verify v il v il v ih xxv pp d out program inhibit v ih xxxxv pp hi-z autoselect (note 3) manufacturer code v il v il v ih v il v h x 01h device code v il v il v ih v ih v h x 8ch mode pins
am27c1024 7 absolute maximum ratings storage temperature otp products. . . . . . . . . . . . . . . . . . ?5 c to +125 c all other products . . . . . . . . . . . . . . ?5 c to +150 c ambient temperature with power applied. . . . . . . . . . . . . . ?5 c to +125 c voltage with respect to v ss all pins except a9,v pp ,v cc . . . .?.6 v to v cc + 0.6 v a9 and v pp (note 2). . . . . . . . . . . . . ?.6 v to +13.5 v v cc (note 1). . . . . . . . . . . . . . . . . . . . ?.6 v to +7.0 v notes: 1. minimum dc voltage on input or i/o pins is ?.5 v. during voltage transitions, the inputs may overshoot v ss to ?.0 v for periods of up to 20 ns. maximum dc voltage on input and i/o pins is v cc + 0.5 v. during voltage transitions, input and i/o pins may overshoot to v cc + 2.0 v for periods up to 20ns. 2. minimum dc input voltage on a9 pin is ?.5 v. during volt- age transitions, a9 and v pp may overshoot v ss to ?.0 v for periods of up to 20 ns. a9 and v cc must not exceed +13.5 v for any period of time. stresses above those listed under ?bsolute maximum rat- ings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the opera- tional sections of this speci?ation is not implied. exposure of the device to absolute maximum rating conditions for ex- tended periods may affect device reliability. operating ranges commercial (c) devices ambient temperature (t a ). . . . . . . . . . . .0 c to +70 c industrial (i) devices ambient temperature (t a ). . . . . . . . . .?0 c to +85 c extended (e) devices ambient temperature (t a ). . . . . . . . .?5 c to +125 c supply read voltages v cc for am27c1024-55, 255 . . . . +4.75 v to +5.25 v v cc for am27c1024 (all others) . +4.50 v to +5.50 v operating ranges define those limits between which the func- tionality of the device is guaranteed.
8 am27c1024 dc characteristics over operating range unless otherwise speci?d (notes 1, 2, and 4) notes: 1. v cc must be applied simultaneously or before v pp , and removed simultaneously or after v pp . 2. caution : the am27c1024 must not be removed from (or inserted into) a socket when v cc or v pp is applied. 3. i cc1 is tested with oe = v ih to simulate open outputs. 4. minimum dc input voltage is ?.5 v. during transitions, the inputs may overshoot to ?.0 v for periods less than 20 ns. maximum dc voltage on output pins is v cc + 0.5 v, which may overshoot to v cc + 2.0 v for periods less than 20 ns. figure 1. typical supply current vs. frequency v cc = 5.5 v, t = 25 c figure 2. typical supply current vs. frequency v cc = 5.5 v, t = 25 c parameter symbol parameter description test conditions min max unit v oh output high voltage i oh = ?00 ma 2.4 v v ol output low voltage i ol = 2.1 ma 0.45 v v ih input high voltage 2.0 v cc + 0.5 v v il input low voltage ?.5 +0.8 v i li input load current v in = 0 v to +v cc c/i devices 1.0 m a e devices 5.0 i lo output leakage current v out = 0 v to +v cc 5.0 m a i cc1 v cc active current (note 3) ce = v il , f = 10 mhz i out = 0 ma c/i devices 50 ma e devices 60 i cc2 v cc ttl standby current ce = v ih 1.0 ma i cc3 v cc cmos standby current ce = v cc 0.3 v 100 m a i pp1 v pp current during (read) ce = oe = v il , v pp = v cc 100 m a ?5 ?0 ?5 0 25 50 75 100 125 150 40 35 30 25 20 frequency in mhz 06780i-5 12345678910 40 35 30 25 20 temperature in c supply current in ma supply current in ma
am27c1024 9 capacitance notes: 1. this parameter is only sampled and not 100% tested. 2. t a = +25 c, f = 1 mhz. ac characteristics notes: 1. caution: do not remove the am27c1024 from (or insert it into) a socket or board that has v pp or v cc applied. 2. v cc must be applied simultaneously or before v pp , and removed simultaneously or after v pp . 3. this parameter is sampled and not 100% tested. 4. switching characteristics are over operating range, unless otherwise speci?d. 5. test conditions for am27c1024-55: output load: 1 ttl gate and c l = 30 pf input rise and fall times: 20 ns input pulse levels: 0.0 v to 3.0 v timing measurement reference level inputs and outputs: 1.5 v test conditions for all others: output load: 1 ttl gate and c l = 100 pf input rise and fall times: 20 ns input pulse levels: 0.45 v to 2.4 v timing measurement reference level inputs and outputs: 0.8 and 2.0 v parameter symbol parameter description test conditions cdv040 pd 040 pl 044 unit typ max typ max typ max c in input capacitance v in = 0 912712810pf c out output capacitance v out = 0 121411141114pf parameter symbols description test setup am27c1024 unit jedec standard -55 -70 -90 -120 -150 -200 -255 t avqv t acc address to output delay ce , oe = v il max 55 70 90 120 150 200 250 ns t elqv t ce chip enable to output delay oe = v il max 55 70 90 120 150 200 250 ns t glqv t oe output enable to output delay ce = v il max 40 40 45 50 65 75 75 ns t ehqz t ghqz t df (note 3) chip enable to output high z or output enable to output high z to output float, whichever occurs ?st max 30 30 40 50 50 50 50 ns t axqx t oh output hold time from addresses, ce or oe , whichever occurs ?st min0000000ns
10 am27c1024 switching test circuit test conditions switching test waveform 2.7 k w diodes = in3064 or equivalent c l 6.2 k w 5.0 v in3064 or equivalent notes: for -55: c l = 30 pf including jig capacitance for all others: c l = 100 pf including jig capacitance device under test 06780i-8 2.4 v 0.45 v input output test points 2.0 v 2.0 v 0.8 v 0.8 v 06780i-9 3 v 0 v input output 1.5 v 1.5 v test points ac testing (except for -55 devices): inputs are driven at 2.4 v for a logic ? and 0.45 v for a logic ?? input pulse rise and fall times are 20 ns. ac testing for -55 devices: inputs are driven at 3.0 v for a logic ? and 0 v for a logic ?? input pulse rise and fall times are 20 ns.
am27c1024 11 key to switching waveforms switching waveforms notes: 1. oe may be delayed up to t acc ?t oe after the falling edge of the addresses without impact on t acc. 2. df is speci?d from oe or ce , whichever occurs ?st. must be steady may change from h to l may change from l to h does not apply don? care, any change permitted will be steady will be changing from h to l will be changing from l to h changing, state unknown center line is high- impedance ?ff state waveform inputs outputs ks000010 addresses ce oe output 06780i-10 addresses valid high z high z t ce valid output 2.4 0.45 2.0 0.8 2.0 0.8 t acc (note 1) t oe t df (note 2) t oh
12 am27c1024 revision summary for am27c1024 distinctive characteristics: the fastest speed grade available is now 55 ns. product selector guide: added 55 ns column. ordering information, uv eprom products: the 55 ns part number is now listed in the example. the nomenclature now has a method of clearly desig- nating the voltage operating range and speed grade. ordering information, otp eprom products: changed the part number example from -70 to -55. the nomenclature now has a method of clearly designating the voltage operating range and speed grade. operating ranges: changed supply read voltages listings to match those in the product selector guide. ac characteristics: added column for 55 ns speed grade, rearranged notes, moved text from table title to note 4, renamed table. switching test circuit: added 55 ns to the c l note on 30 pf test condition. switching test waveform: added the 3 v test waveform.


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