product selection guide parameter 27c010l-90 27c010l-12 27c010l-15 27c010l-17 27c010l-20 address access time (max) 90 ns 120 ns 150 ns 170 ns 200 ns chip select time (max) 90 ns 120 ns 150 ns 170 ns 200 ns output enable time (max) 35 ns 35 ns 40 ns 40 ns 40 ns WS27C010L top view chip carrier cerdip pin configuration 4-25 military 128k x 8 cmos eprom key features high performance cmos desc smd no. 5962-89614 ? 90 ns access time compatible with jedec 27010 and fast programming 27c010 eproms epi processing jedec standard pin configuration ? latch-up immunity to 200 ma ? 32 pin cerdip package ? esd protection exceeds 2000 volts ? 32 pin leadless chip carrier (cllcc) general description the WS27C010L is a performance oriented 1 meg uv erasable electrically programmable read only memory organized as 128k words x 8 bits/word. it is manufactured using an advanced cmos technology which enables it to operate at data access times as fast as 120 nsecs. the memory was designed utilizing wsi's patented self-aligned split gate eprom cell, resulting in a low power device with a very cost effective die size. the WS27C010L 1 meg eprom provides extensive code store capacity for microprocessor, dsp, and microcontroller-based systems. its 120 nsec access time over the full military temperature range provides the potential of no-wait state operation. and where this parameter is important, the WS27C010L provides the user with a very fast 35 nsec t oe output enable time. the WS27C010L is offered in both a 32 pin 600 mil cerdip, and a 32 pad ceramic leadless chip carrier (cllcc) for surface mount applications. its standard jedec eprom pinouts provide for automatic upgrade density paths for existing 128k and 256k eprom users. a 14 a 13 a 8 a 9 a 11 oe a 10 ce o 7 a 7 a 6 a 5 a 4 a 3 a 2 a 1 a 0 o 0 a 12 a 15 a 16 v pp v cc pgm nc o 1 o 2 o 3 o 4 o 5 o 6 1 432 32 31 30 29 28 27 26 25 24 23 22 21 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 gnd v cc pgm nc a 14 a 13 a 8 a 9 a 11 oe a 10 ce o 7 o 6 o 5 o 4 o 3 v pp a 16 a 15 a 12 a 7 a 6 a 5 a 4 a 3 a 2 a 1 a 0 o 0 o 1 o 2 gnd 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 return to main menu
a c read chara cteristics over operating range with v pp = v cc . symbol parameter -90 -12 -15 -17 -20 units min max min max min max min max min max t acc address to output delay 90 120 150 170 200 t ce ce to output delay 90 120 150 170 200 t oe oe to output delay 35 35 40 40 40 t df output disable to output float (note 3) 35 35 40 40 40 ns output hold from t oh addresses, ce or oe, 0 0 0 0 0 whichever occurred first (note 3) dc read chara cteristics over operating range. (see above) symbol parameter test conditions min max units v il input low voltage ?.5 0.8 v v ih input high voltage 2.0 v cc + 1 v v ol output low voltage i ol = 2.1 ma 0.4 v v oh output high voltage i oh = 400 a 3.5 v i sb1 v cc standby current (cmos) ce = v cc 0.3 v (note 2) 100 a i sb2 v cc standby current ce = v ih 1 ma i cc v cc active current ( t tl) ce = oe = v il f = 5 mhz 50 ma (note 1) f = 8 mhz 60 ma i pp v pp supply current v pp = v cc 100 a v pp v pp read voltage v cc ?.4 v cc v i li input leakage current v in = 5.5 v or gnd ?0 10 a i lo output leakage current v out = 5.5 v or gnd ?0 10 a WS27C010L 4-26 opera ting range range temperature v cc military 55 c to +125 c +5v 10% absolute maximum ra tings* storage temperature ............................ 65 to + 150 c voltage on any pin with respect to ground .................................... 0.6v to +7v v pp with respect to ground ................... 0.6v to + 14v v cc supply voltage with respect to ground .................................... 0.6v to +7v esd protection .................................................. > 2000v notes: 1. the supply current is the sum of i cc and i pp . the maximum current value is with outputs o 0 to o 7 unloaded. 2. cmos inputs: v il = gnd 0.3v, v ih = v cc 0.3 v. * notice: stresses above those listed under "absolute maximum ratings" may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods of time may affect device reliability. note: 3. this parameter is only sampled and is not 100% tested. output float is defined as the point where data is no longer driven ? see timing diagram.
symbol parameter conditions ty p (6) max units c i n input capacitance v i n = 0v 4 6 pf c out output capacitance v out = 0v 8 12 pf c vpp v pp capacitance v pp = 0 v 18 25 pf 4-27 WS27C010L a c read timing dia gram t acc t oh address valid valid output addresses v i h v i l t oe t df t ce ce oe v i h v i h v i l v i h v i l v i l high z high z (5) (4) (4) output cap a cit anc e (5) t a = 2 5 c, f = 1 mhz 100 pf (including scope and jig capacitance) 820 w 2.01 v d.u.t. a.c. testing input/output w a veform test lo ad (high impedance test systems) 2.4 0.4 2.0 0.8 2.0 0.8 test points note: 7. provide adequate decoupling capacitance as close as possible to this device to achieve the published a.c. and d.c. parameters. a 0.1 microfarad capacitor in parallel with a 0.01 microfarad capacitor connected between v cc and ground is recommended. inadequate decoupling may result in access time degradation or other transient performance failures. notes: 5. this parameter is only sampled and is not 100% tested. 6. typical values are for t a = 25 c and nominal supply voltages. a.c. testing inputs are driven at 2.4 v for a logic "1" and 0.4 v for a logic "0." timing measurements are made at 2.0 v for a logic "1" and 0.8 v for a logic "0". note: 4. oe may be delayed up to t ce ? t oe after the falling edge of ce without impact on t ce .
pr ogramming informa tion dc chara cteristics ( t a = 25 5 c, v cc = 6.25 0.25 v, v pp = 12.75 0.25 v. see notes 8, 9 and 10) symbols parameter min max units i li input leakage current (v in = v cc or gnd) ?0 10 a i pp v pp supply current during 60 ma programming pulse (ce = pgm = v i l ) i cc v cc supply current 50 ma v il input low voltage 0.1 0.8 v v ih input high voltage 2.0 v cc + 0.3 v v ol output low voltage during verify (i ol = 2.1 ma) 0.4 v v oh output high voltage during verify (i oh = 400 a) 3.5 v symbols parameter min typ max units t as address setup time 2 s t oes output enable setup time 2 s t os data setup time 2 s t ah address hold time 0 s t oh data hold time 2 s t df chip disable to output float delay 0 55 ns t oe data valid from output enable 55 ns t v s / t ces v pp setup time/ce setup time 2 s t pw pgm pulse width 0.1 3 4 ms WS27C010L 4-28 notes: 8. v cc must be applied either coincidentally or before v pp and removed either coincidentally or after v pp . 9. v pp must not be greater than 14 volts including overshoot. during ce = pgm = v il , v pp must not be switched from 5 volts to 12.75 volts or vice-versa. 10. during power up the pgm pin must be brought high ( 3 v ih ) either coincident with or before power is applied to v pp . a c chara cteristics (t a = 25 5 c, v cc = 6.25 0.25 v, v pp = 12.75 0.25 v) pr ogramming w a veform address stable addresses v pp v pp v cc v i h v i l ce data t as t pw t os t oh t oe t ah t df t vs t ces t oes data out data in stable oe pgm v i h v i l v i h v i l valid high z
ordering information operating wsi part number temperature manufacturing range procedure WS27C010L-12cmb * 120 32 pad cllcc c2 military mil-std-883c WS27C010L-12dmb * 120 32 pin cerdip, 0.6" d4 military mil-std-883c WS27C010L-15cmb 150 32 pad cllcc c2 military mil-std-883c WS27C010L-15dmb 150 32 pin cerdip, 0.6" d4 military mil-std-883c WS27C010L-17cmb * 170 32 pad cllcc c2 military mil-std-883c WS27C010L-17dmb * 170 32 pin cerdip, 0.6" d4 military mil-std-883c WS27C010L-20cmb * 200 32 pad cllcc c2 military mil-std-883c WS27C010L-20dmb * 200 32 pin cerdip, 0.6" d4 military mil-std-883c 4-29 WS27C010L note: 14. the actual part marking will not include the initials "ws." *smd product. see page 4-2 for smd number. programming/algorithms/erasure/programmers refer to page 5-1 the WS27C010L is programmed using algorithm e shown on page 5-11. (this product can also be programmed by using national semiconductor's 27c010 programming algorithm.) speed package package (ns) type drawing mode pins ce oe pgm a 9 a 0 v pp v cc outputs read v il v il x (11) x x x 5.0 v d out output disable x v ih xxxx 5.0 v high z standby v ih xxxxx 5.0 v high z programming v il v ih v il xxv pp (12) 6.0 v d in program verify v il v il v ih xxv pp (12) 6.0 v d out program inhibit v ih xxxxv pp (12) 5.0 v high z signature manufacturer (13) v il v il xv h (12) v il x 5.0 v 23 h device (13) v il v il xv h (12) v ih x 5.0 v c1 h mode selection the modes of operation of the WS27C010L are listed below. a single 5 v power supply is required in the read mode. all inputs are ttl levels except for v pp and a 9 for device signature. notes: 11. x can be v il or v ih . 12. v h = v pp = 12.75 0.25 v. 13. a 1 ?a 8 , a 10 ?a 16 = v il . return to main menu
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