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1 sy88773v micrel, inc. m9999-110905 hbwhelp@micrel.com or (408) 955-1690 the sy88773v low-power, limiting post amplifier is designed for use in fiber optic receivers. the device connects to typical transimpedance amplifiers (tias). the linear signal output from tias can contain significant amounts of noise and may vary in amplitude over time. the sy88773v quantizes these signals and outputs typically 800mv pp voltage-limited waveforms. the sy88773v operates from a single +3.3v 10% or +5v 10% power supply, over an industrial temperature range of ?0 c to +85 c. with its wide bandwidth and high gain, signals with data rates up to 3.2gbps and as small as 10mv pp can be amplified to drive devices with cml inputs or ac-coupled pecl inputs. the sy88773v incorporates a loss-of-signal (los), open- collector ttl output with internal 4.75k ? pull-up resistor. a programmable, loss-of-signal level set pin (loslvl) sets the sensitivity of the input amplitude detection. los asserts high if the input amplitude falls below the threshold set by loslvl and de-asserts low otherwise. los can be fed back to the enable (/en) input to maintain output stability under a loss-of-signal condition. /en de-asserts the true output signal without removing the input signal. typically 4.6db los hysteresis is provided to prevent chattering. please see micrel? website at www.micrel.com for a complete selection of optical module ics. the following table summarizes the differences between devices in micrel? latest family of limiting amplifiers. all support documentation can be found on micrel? web site at www.micrel.com. integrated 50 ? los active low part number input termination or sd or high enable sy88773v no los low sy88823v no sd high sy88843v yes sd high sy88973v yes los low table 1. limiting amplifiers selection guide description multi-rate up to 3.2gbps operation wide gain-bandwidth product 38db differential gain 2ghz 3db bandwidth low noise 50 ? cml data outputs 800mv pp output swing 60ps edge rates 5ps (rms) typ. random jitter 15ps (pp) typ. deterministic jitter chatter-free, loss-of-signal (los) output 4.6db electrical hysteresis oc-ttl output with internal 4.75k ? pull-up resistor programmable los sensitivity using single external resistor integrated input bias reference ttl /en input allows feedback from los wide operating range single 3.3v 10% or 5v 10% power supply ?0 c to +85 c industrial temperature range available in tiny 10-pin epad-msop and 16-pin mlf packages features 3.3v/5v 3.2gbps cml low-power limiting post amplifier with ttl los sy88773v applications 1.25gbps and 2.5gbps gigabit ethernet 1.062gbps and 2.125gbps fibre channel 155mbps, 622gbps, 1.25gbps, and 2.5gbps sonet/ sdh gigabit interface converter (gbic) small form factor (sff) and small form factor pluggable (sfp) transceivers parallel 10g ethernet high-gain line driver and line receiver rev.: c amendment: /0 issue date: november 2005 micro leadframe and mlf are trademarks of amkor technology typical performance 3.3v, 25 c, 10mv pp input @3.2gbps 2 31 1 prbs, r load = 50 ? to v cc time (50ps/div.) output swing (75mv/div.)
2 sy88773v micrel, inc. m9999-110905 hbwhelp@micrel.com or (408) 955-1690 functional block diagram limiting amplifer cml buffer gnd level detect /en los din /din ref loslvl dout /dout oc-ttl buffer 2.8k ? 4.75k ? vcc vcc ref generator ttl buffer 25k ? vcc
3 sy88773v micrel, inc. m9999-110905 hbwhelp@micrel.com or (408) 955-1690 pin number pin number (msop) (mlf ) pin name type pin function 1 15 /en ttl input: enable: de-asserts true data output when high. default is high. incorporates 25k ? pull-up to vcc. 2, 3 1, 4 din, /din differential differential data input. inputs must be biased to meet data input common-mode range. 4 6 ref reference voltage: bypass with 0.01 f low esr capacitor from ref to vcc to stabilize loslvl and ref. 5 14 loslvl input: loss-of-signal level set: a resistor from this pin to vcc default is sets the threshold for the data input amplitude at which the maximum sensitivity. los output will be asserted. 6 2, 3, 10, 11 gnd ground device ground. exposed pad must be soldered exposed pad exposed pad (or equivalent) to the same potential as the ground pins. 7 7 los open collector loss-of-signal: asserts high when the data input ttl output with amplitude falls below the threshold set by loslvl. internal 4.75k ? pull-up resistor 8, 9 9, 12 dout, /dout differential differential data output. cml output 10 5, 8, 13, 16 vcc power supply positive power supply. bypass with 0.1 f ?? 0.01 f low esr capacitors. 0.01 f capacitors should be as close as possible to vcc pins. pin description 1 2 3 4 12 11 10 9 16 15 14 13 5678 din gnd gnd /din dout gnd gnd /dout vcc loslvl /en vcc vcc los ref vcc 16-pin mlf (mlf-16) 1 /en din /din ref loslvl 10 vcc dout /dout los gnd 9 8 7 6 2 3 4 5 10-pin epad-msop (k10-2) package/ordering information ordering information (1) package operating package lead part number type range marking finish sy88773vki k10-2 industrial 773v sn-pb sy88773vkitr (2) k10-2 industrial 773v sn-pb sy88773vmi mlf-16 industrial 773v sn-pb sy88773vmitr (2) mlf-16 industrial 773v sn-pb sy88773vey (3) k10-2 industrial 773v with pb-free pb-free bar-line indicator matte-sn sy88773veytr (2, 3) k10-2 industrial 773v with pb-free pb-free bar-line indicator matte-sn sy88773vmg (3) mlf-16 industrial 773v with pb-free pb-free bar-line indicator nipdau sy88773vmgtr (2, 3) mlf-16 industrial 773v with pb-free pb-free bar-line indicator nipdau notes: 1. contact factory for die availability. dice are guaranteed at t a = 25 c, dc electricals only. 2. tape and reel. 3. pb-free package is recommended for new designs.
4 sy88773v micrel, inc. m9999-110905 hbwhelp@micrel.com or (408) 955-1690 absolute maximum ratings (1) supply voltage (v cc ) ....................................... 0v to +7.0v /en, loslvl voltage ............................................0 to v cc ref current ............................................................... 1ma los current ............................................................... 5ma dout, /dout current ............................................. 25ma din, /din current ..................................................... 10ma storage temperature (t s ) ....................... 65 c to +150 c lead temperature (soldering, 20 sec.) ................... +260 c operating ratings (2) supply voltage (v cc ) .............................. +3.0v to +3.6v or ............................................................ +4.5v to +5.5v ambient temperature (t a ) ......................... 40 c to +85 c junction temperature (t j ) ....................... 40 c to +120 c package thermal resistance (3) mlf ja (still-air) ..................................................... 61 c/w jb ................................................................................... 38 c/w epad-msop ja (still-air) ..................................................... 38 c/w jb ................................................................................... 22 c/w v cc = 3.0v to 3.6v or 4.5v to 5.5v, t a = 40 c to +85 c; typical values at v cc = 3.3v, t a = 25 c. symbol parameter condition min typ max units i cc power supply current 3.3v, note 4 28 42 ma 5v, note 4 30 45 ma power supply current 3.3v, note 5 45 62 ma 5v, note 5 47 65 ma v ref ref voltage v cc 1.3 v v loslvl loslvl voltage range v ref v cc v v oh dout, /dout high voltage note 6 v cc 0.020 v cc 0.005 v cc v v ol dout, /dout low voltage 3.3v, note 6 v cc 0.475 v cc 0.400 v cc 0.350 v 5v, note 6 v cc 0.510 v cc 0.400 v cc 0.350 v v offset differential output offset note 6 80 mv z o single-ended output impedance 40 50 60 ? v ihcmr input common mode range note 7 gnd+2.15 v cc v dc electrical characteristics v cc = 3.0v to 3.6v or 4.5v to 5.5v, t a = 40 c to +85 c. symbol parameter condition min typ max units v oh los output high level sourcing 100 a 2.4 v cc v v ol los output low level sinking 2ma 0.5 v v ih /en input high voltage 2.0 v v il /en input low voltage 0.8 v i ih /en input high current v in = 2.7v 20 a v in = v cc 100 a i il /en input low current v in = 0.5v 0.3 ma notes: 1. permanent device damage may occur if absolute maximum ratings are exceeded. this is a stress rating only and functional opera tion is not implied at conditions other than those detailed in the operational sections of this data sheet. exposure to absolute maximum ratlng con ditions for extended periods may affect device reliability. 2. the data sheet limits are not guaranteed if the device is operated beyond the operating ratings. 3. thermal performance assumes the use of 4-layer pcb. exposed pad must be soldered (or equivalent) to the device's most negativ e potential on the pcb. 4. excludes current of cml output stage. see detailed description. 5. total device current with no output load. 6. output levels are based on a 50 ? to v cc load impedance. if the load impedance is different, the output level will be changed. amplifier is in limiting mode. 7. the v ihcmr range is referenced to the most positive side of the differential input signal. ttl dc electrical characteristics
5 sy88773v micrel, inc. m9999-110905 hbwhelp@micrel.com or (408) 955-1690 v cc = 3.0v to 3.6v or 4.5v to 5.5v, t a = 40 c to +85 c, r load = 50 ? to v cc ; typical values at v cc = 3.3v, t a = 25 c. symbol parameter condition min typ max units psrr power supply rejection ratio 35 db t r ,t f output rise/fall time note 8 60 120 ps (20% to 80%) t jitter deterministic note 9 15 ps pp random 5ps rms v id differential input voltage swing 10 1800 mv pp v od differential output voltage swing 3.3v, note 8 700 800 950 mv pp 5v, note 8 700 800 1020 mv pp hys los hysteresis note 10 2 4.6 8 db t off los release time 0.1 0.5 s t on los assert time 0.2 0.5 s v sr los sensitivity range note 11 10 35 mv pp b 3db 3db bandwidth 2.0 ghz a v(diff) differential voltage gain 32 38 db s 21 single-ended small-signal gain 26 32 db notes: 8. amplifier in limiting mode. input is a 200mhz square wave, t r < 300ps. 9. deterministic jitter measured using 2.488gbps k28.5 pattern, v id = 10mv pp . random jitter measured using 2.488gbps k28.7 pattern, v id = 10mv pp . 10. electrical signal. 11. this is the detectable range of input amplitudes that can assert los. the input amplitude to de-assert los is 2 8db higher than the assert amplitude. see typical operating characteristics for graphs showing how to choose a particular v loslvl or r loslvl for a particular los assert, and its associated de-assert, amplitude. if increased los sensitivity and hysteresis are required, an application note entitled notes on sensitivity and hysteresis in micrel post amplifiers is available at http://www.micrel.com/product-info/app_hints+notes.shtml. ac electrical characteristics
6 sy88773v micrel, inc. m9999-110905 hbwhelp@micrel.com or (408) 955-1690 typical operating characteristics 1 10 100 0 0.2 0.4 0.6 0.8 1.0 1.2 v id (mv pp ) v cc v loslvl (v) v id to assert/de-assert los vs. v loslvl 1 10 100 0.1 1 10 100 v id (mv pp ) r loslvl (k ? ) v id to assert/de-assert los vs. r loslvl 0 5 10 15 20 25 30 35 40 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 s21 (db) frequency (ghz) single-ended small-signal gain vs. frequency 25 30 35 40 45 50 55 60 -40 -15 10 35 60 85 current (ma) temperature ( c) power supply current vs. temperature 700 720 740 760 780 800 820 840 860 880 900 -40 -15 10 35 60 85 v od (mv pp ) temperature ( c) differential output voltage swing vs. temperature (amplifier in limiting mode) 0 100 200 300 400 500 600 700 800 900 0 5 10 15 20 25 30 35 40 45 50 v od (mv pp ) v id (mv pp ) differential output voltage swing vs. differential input voltage swing v cc = 3.3v, t a = 25 c, r load = 50 ? to v cc , unless otherwise stated. 10mv pp input @3.2gbps 2 31 1 prbs time (50ps/div.) output swing (75mv/div.) 1.8v pp input @3.2gbps 2 31 1 prbs time (50ps/div.) output swing (75mv/div.)
7 sy88773v micrel, inc. m9999-110905 hbwhelp@micrel.com or (408) 955-1690 detailed description the sy88773v low-power, limiting post amplifier operates from a single +3.3v or +5v power supply, over temperatures from 40 c to +85 c. signals with data rates up to 3.2gbps and as small as 10mv pp can be amplified. figure 1 shows the allowed input voltage swing. the sy88773v generates an los output, providing feedback to /en for output stability. loslvl sets the sensitivity of the input amplitude detection. input amplifier/buffer the sy88773v input is designed for v ref as its nominal dc bias point. if ac-coupling to the sy88773v, ref can be used as the dc bias point by externally connecting the inputs through appropriate termination resistors to ref. if dc-coupling to the sy88773v, ensure the upstream device s output swing meets the sy88773v s common mode range. figure 2 shows a simplified schematic of the input structure. the high-sensitivity of the input amplifier detects and amplifies signals as small as 10mv pp . the input amplifier allows input signals as large as 1800mv pp . input signals are linearly amplified with a typically 38db differential voltage gain. since it is a limiting amplifier, the sy88773v outputs typically 800mv pp voltage-limited waveforms for input signals that are greater than 10mv pp . applications requiring the sy88773v to operate with high-gain should have the upstream tia placed as close as possible to the sy88773v s input pins to ensure the device s best performance. output buffer the sy88773v s cml output buffer is designed to drive 50 ? lines. the output buffer requires appropriate termination for proper operation. an external 50 ? resistor to vcc or equivalent for each output pin provides appropriate output buffer termination. figure 3 shows a simplified schematic of the output structure and includes an appropriate termination method. of course, driving a downstream device with a cml input that is internally terminated with 50 ? to vcc eliminates the need for external termination. as noted in the previous section, the amplifier outputs, typically 800mv pp , waveforms across 25 ? total loads. the output buffer, thus, switches typically 16ma tail-current. figure 4 shows the power supply current measurement which excludes the 16ma tail-current. loss-of-signal the sy88773v incorporates a chatter-free, los open- collector ttl output with internal 4.75k ? pull-up resistor as shown in figure 5. los is used to determine that the input amplitude is too small to be considered a valid input. los asserts high if the input amplitude falls below the threshold set by loslvl and de-asserts low otherwise. los can be fed back to the enable (/en) input to maintain output stability under a loss-of-signal condition. /en de-asserts low the true output signal without removing the input signals. typically, 4.6db los hysteresis is provided to prevent chattering. loss-of-signal level set a programmable, loss-of-signal level set pin sets the threshold of the input amplitude detection. connecting an external resistor between vcc and loslvl sets the voltage at loslvl. this voltage ranges from v cc to v ref . the external resistor creates a voltage divider between vcc and ref as shown in figure 6. if desired, an appropriate external voltage may be applied rather than using a resistor. the relationship between v loslvl and r loslvl is given by: vv r r+ loslvl cc loslvl loslvl = 13 28 . . where voltages are in volts and resistances are in k ? . the smaller the external resistor, which implies a smaller voltage difference from loslvl to vcc, the lower the los sensitivity. hence, larger input amplitude is required to de- assert los. the typical operating characteristics section contains graphs showing the relationship between the input amplitude detection sensitivity and v loslvl or r loslvl . hysteresis the sy88773v provides typically 4.6db los electrical hysteresis. by definition, a power ratio measured in db is 10log(power ratio). power is calculated as v 2 in /r for an electrical signal. hence, the same ratio can be stated as 20log(voltage ratio). while in linear mode, the electrical voltage input changes linearly with the optical power and, hence, the ratios change linearly. therefore, the optical hysteresis in db is half the electrical hysteresis in db given in the datasheet. the sy88773v provides typically 2.3db los optical hysteresis. as the sy88773v is an electrical device, this datasheet refers to hysteresis in electrical terms. with 4.6db los hysteresis, a voltage factor of 1.7 is required to de-assert los. hysteresis and sensitivity improvement if increased los sensitivity and hysteresis are required, an application note entitled notes on sensitivity and hysteresis in micrel post amplifiers is available at http:// www.micrel.com/product-info/app_hints+notes.shtml.
8 sy88773v micrel, inc. m9999-110905 hbwhelp@micrel.com or (408) 955-1690 data+ 5mv (min.) 900mv (max.) 10mv pp (min.) 1800mv pp (max.) data (data+) (data ) v is (mv) v id (mv pp ) figure 1. v is and v id definition gnd v cc esd structure / din din figure 2. input structure 50 ? gnd vcc 16ma /dout ac-coupling capacitors z 0 = 50 ? z 0 = 50 ? vcc 50 ? 50 ? 50 ? esd structure dout 0.1 f figure 3. output structure 50 ? gnd 16ma 50 ? vcc 16ma i cc esd structure figure 4. power supply current measurement los 4.75k ? v cc figure 5. los output structure r loslvl loslvl vcc ref 2.8k ? figure 6. loslvl setting circuit
9 sy88773v micrel, inc. m9999-110905 hbwhelp@micrel.com or (408) 955-1690 typical applications circuit v cc /en gnd to cdr sy88773v 100k ? 0.1 f from transimpedance amp. d out /dout v cc loslvl din /din 0.1 f 0.1 f 0.1 f 0.1 f los 50 ? 50 ? ref part number function data sheet link sy88773v 3.3v/5v 3.2gbps cml low-power, http://www.micrel.com/_pdf/hbw/sy88773v.pdf limiting post amplifier w/ ttl los sy88823v 3.3v/5v 3.2gbps cml low-power, http://www.micrel.com/_pdf/hbw/sy88823v.pdf limiting post amplifier w/ ttl sd sy88843v 3.3v/5v 3.2gbps cml low-power, http://www.micrel.com/_pdf/hbw/sy88843v.pdf limiting post amplifier w/ ttl sd sy88973v 3.3v/5v 3.2gbps cml low-power, http://www.micrel.com/_pdf/hbw/sy88973v.pdf limiting post amplifier w/ ttl los application notes notes on sensitivity and hysteresis http://www.micrel.com/product-info/app_hints+notes.shtml in micrel post amplifiers related product and support documentation
10 sy88773v micrel, inc. m9999-110905 hbwhelp@micrel.com or (408) 955-1690 10 lead epad-msop (k10-2) rev.01 +0.05 -0.05 +0.002 -0.002 +0.08 -0.08 +0.003 -0.003 +0.15 -0.15 +0.004 -0.004 +0.008 -0.008 +0.003 -0.003 +0.07 -0.08 +0.003 -0.003 +0.10 -0.10 +0.004 -0.004 +0.15 -0.15 +0.006 -0.006
11 sy88773v micrel, inc. m9999-110905 hbwhelp@micrel.com or (408) 955-1690 16-pin micro leadframe (mlf-16) micrel, inc. 2180 fortune drive san jose, ca 95131 usa tel + 1 (408) 944-0800 fax + 1 (408) 474-1000 web http://www.micrel.com the information furnished by micrel in this data sheet is believed to be accurate and reliable. however, no responsibility is a ssumed by micrel for its use. micrel reserves the right to change circuitry and specifications at any time without notification to the customer. micrel products are not designed or authorized for use as components in life support appliances, devices or systems where malfu nction of a product can reasonably be expected to result in personal injury. life support devices or systems are devices or systems that (a) are intend ed for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant inj ury to the user. a purchaser s use or sale of micrel products for use in life support appliances, devices or systems is at purchaser s own risk and purchaser agrees to fully indemnify micrel for any damages resulting from such use or sale. ? 2005 micrel, incorporated. package ep- exposed pad die compside island heat dissipation heavy copper plane heavy copper plane v ee v ee heat dissipation pcb thermal consideration for 16-pin mlf package (always solder, or equivalent, the exposed pad to the pcb) package notes: 1. package meets level 2 qualification. 2. all parts are dry-packaged before shipment. 3. exposed pads must be soldered to a ground for proper thermal management.

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