? 2004 california micro devices corp. all rights reserved. 01/14/04 430 n. mccarthy blvd., milpitas, ca 95035-5112 tel: 408.263.3214 fax: 408.263.7846 www.calmicro.com 1 cmpwr101 250ma smartor tm regulator with v aux switch features ? automatic detection of v cc input supply glitch-free output during supply transitions built-in hysteresis during supply selection 250ma output maximum load current fully integrated v aux switch overload current protection short circuit current protection operates from either v cc or v aux 8-pin soic package lead-free version available applications pci adapter cards network interface cards (nics) dual power systems systems with standby capabilities product description the california micro devices? smartor tm cmpwr101 is a low dropout regulator that delivers up to 250ma of load current at a fixed 3.3v output. an internal threshold level (typically 4.1v) is used to pre- vent the regulator from being operated below dropout voltage. the device continuously monitors the input supply and will automatically disable the regulator when v cc falls below the threshold level. when the regulator is disabled, a low impedance, fully integrated switch is enabled which allows the output to be directly powered from an auxiliary 3.3v supply. when v cc is restored to a level above the select threshold, the low impedance switch is disabled and the regulator is once again enabled. all the necessary control circuitry needed to provide a smooth and automatic transition between the supplies has been incorporated. this allows v cc to be dynami- cally switched without loss of output voltage. an output logic signal, drive, is active low whenever the internal regulator is disabled. the cmpwr101 is housed in a 8-pin soic package and is available with optional lead-free finishing. simplified electrical schematic typical application circuit + v cc gnd v out - + enable - v ref 4.1v v deselect 0.2 ? v aux 3.3v drive v aux v out gnd v out cmpwr101 v cc 4 f 5v v cc v aux 3.3v c out + gnd 1 f c in + 3.3v/250ma drive drive
? 2004 california micro devices corp. all rights reserved. 2 430 n. mccarthy blvd., milpitas, ca 95035-5112 tel: 408.263.3214 fax: 408.263.7846 www.calmicro.com 01/14/04 cmpwr101 pin descriptions pin(s) name description 1v cc v cc is the power source for the internal regulator and is monitored continuously by an internal controller circuit. whenever v cc exceeds v ccsel (4.25v typically), the internal regulator will be enabled and deliver a fixed 3.3v at v out . when v cc falls below v ccdes (4.10v typically), the regulator will be disabled. internal loading on this pin is typically 0.6ma when the regulator is enabled, which reduces to 0.1ma whenever the regulator is dis- abled. if v cc falls below the voltage on the v aux pin, the v cc loading will further reduce to only a few microamperes. during a v cc power-up or power-down sequence, there will be an effective step increase in v cc line current when the regulator is enabled/disabled. this line current transient will cause a voltage disturbance at the v cc pin. the magnitude of the disturbance will be directly proportional to the effective power supply source impedance being delivered to the v cc input. a built-in hysteresis voltage of 150mv has been incorporated to minimize any chatter during supply changeover. it is recommended that the power supply connected to the v cc input should have a source resistance of less than 0.25 ? to minimize the event of chatter during the enabling/disabling of the regula- tor. if the v cc pin is within a few inches of the main input filter, a capacitor may not be necessary. otherwise an input filter capacitor in the range of 1f to 10f will help to lower the effective source impedance. 2 - 3 v aux v aux is the auxiliary power source. when selected, (v cc < v ccdes ), the auxiliary supply is directly con- nected to v out , via the low impedance (0.3 ? typically) fully integrated switch. the internal loading on this pin is typically less than 10a and will increase to 100a if v cc falls below the voltage on v aux . when v aux = 0v, the v ccdes voltage is inhibited which prevents the regulator from being disabled. 4 gnd gnd is the negative reference for all voltages. the current that flows in the ground connection is very low (typically 0.6ma) and has minimal variation over all load conditions. 5 nc nc is an unconnected pin which is electrically isolated from the internal circuitry 6 - 7 v out v out is the regulator output voltage connection used to power the load. an output capacitor of 4.7f is used to provide the necessary phase compensation, thereby preventing oscillation. the capacitor also helps to minimize the peak output disturbance during power supply changeover. 8 drive drive is a cmos output logic signal (active low) referenced to the v cc supply. this output is taken low whenever the internal regulator is not enabled. this output is intended only as a control signal for exter- nal circuitry. package / pinout diagram note: this drawing is not to scale. 8-pin soic 1 2 3 4 8 7 6 5 v cc v aux v aux gnd drive v out v out nc top view
? 2004 california micro devices corp. all rights reserved. 01/14/04 430 n. mccarthy blvd., milpitas, ca 95035-5112 tel: 408.263.3214 fax: 408.263.7846 www.calmicro.com 3 cmpwr101 ordering information note 1: parts are shipped in tape & reel form unless otherwise specified. specifications note 1: the power rating is based on a printed circuit board heat spreading capability equivalent to 2 square inches of copper c on- nected to the gnd pins. typical multi-layer boards using power plane construction will provide this heat spreading ability without the need for additional dedicated copper area. (please consult with factory for thermal evaluation assistance). part numbering information pins package standard finish lead-free finish ordering part number 1 part marking ordering part number 1 part marking 8 power soic cmpwr101s cmpwr101s CMPWR101R CMPWR101R absolute maximum ratings parameter rating units esd protection (hbm) + 2000 v pin input voltages v cc v aux drive [gnd - 0.5] to +6.0 [gnd - 0.5] to +4.0 [gnd - 0.5] to [v cc + 0.5] v v storage temperature range -40 to +150 c operating temperature range ambient junction 0 to +70 0 to +125 c c power dissipation (see note 1) 0.5 w standard operating conditions parameter valu e units v cc 5.0 + 0.5 v v aux 3.3 + 0.3 v ambient operating temperature range 0 to +70 c load current 0 to 250 ma c ext 4.7 + 20% f
? 2004 california micro devices corp. all rights reserved. 4 430 n. mccarthy blvd., milpitas, ca 95035-5112 tel: 408.263.3214 fax: 408.263.7846 www.calmicro.com 01/14/04 cmpwr101 note 1: operating characteristics are over standard operating conditions unless otherwise specified. note 2: the hysteresis defines the maximum level of acceptable disturbance on v cc during switching. it is recommended that the v cc source impedance be kept below 0.25 ? to ensure the switching disturbance remains below the hysteresis during select/deselect transitions. an input capacitor may be required to help minimize the switching transient. electrical operating characteristics (see note 1) symbol parameter conditions min typ max units v out regulator output voltage 0ma < i load < 250ma 3.135 3.300 3.465 v i lim regulator current limit 275 ma v ccsel v cc select voltage regulator enabled 4.30 4.45 v v ccdes v cc deselect voltage regulator disabled 3.90 4.10 v v cchyst hysteresis voltage see note 2 0.20 v v r load load regulation v cc =5v, 5ma < i load < 250ma 20 mv v r line line regulation xx i load = 5ma; 4.5v < v cc < to 5.5v 2 mv r sw v aux switch resistance v ccdes > v cc , v aux = 3.3v 0.25 0.40 ? i rcc v cc reverse leakage v aux = 3.3v, v cc = 0v 2 50 a i raux v aux reverse leakage v aux = 0v, v cc = 5v 2 50 a i gnd ground current v cc < v ccdes , i load = 0ma v cc > v ccsel , i load = 0ma v cc > v ccsel , i load = 250ma 0.20 0.60 0.70 0.40 1.00 1.20 ma ma ma i aux v aux supply current v aux > v cc v cc > v aux 0.20 0.02 0.40 0.10 ma ma r oh drive pull-up resistance r pullup to v cc , v cc > v ccsel 4.0 8.0 k ? r ol drive pull-down resistance r pulldown to gnd, v ccdes > v cc 0.1 0.4 k ?
? 2004 california micro devices corp. all rights reserved. 01/14/04 430 n. mccarthy blvd., milpitas, ca 95035-5112 tel: 408.263.3214 fax: 408.263.7846 www.calmicro.com 5 cmpwr101 performance information cmpwr101 typical dc characteristics (nominal conditions unless specified otherwise) figure 1. supply current vs voltage (v aux = 3.3v) figure 2. switch resistance vs supply voltage 0.20 0.22 0.24 0.26 0.28 0.30 0.32 0.34 2.7 3.0 3.3 3.6 auxiliary supply voltage (v) resistance ( ? ) figure 3. ground current vs output load fi gure 4. line regulation (1% and 100% rated load) figure 5. load regulation figure 6. dropout voltage with load current 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0 100 200 300 load current (ma) ground current (ma) 3.10 3.15 3.20 3.25 3.30 3.35 3.40 3.0 3.5 4.0 4.5 5.0 5.5 supply voltage (v) 5ma load 250ma load regulator output (v) 3.25 3.26 3.27 3.28 3.29 3.30 3.31 3.32 3.33 0 100 200 300 400 load current (ma) v out (v) 0.0 0.2 0.4 0.6 0.8 1.0 1.2 0 100 200 300 400 load current (ma) v out (v) 0123456 v cc supply voltage (v) 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 v cc supply current (a)
? 2004 california micro devices corp. all rights reserved. 6 430 n. mccarthy blvd., milpitas, ca 95035-5112 tel: 408.263.3214 fax: 408.263.7846 www.calmicro.com 01/14/04 cmpwr101 performance information (cont?d) cmpwr101 transient characteristics (nominal conditions unless specified otherwise) (v cc source resistance set to 0.2 ? ) figure 7. v cc cold start power up (v aux = 0v) 500mv drive (200ma load) (v aux = 0v) v cc v out m 2ms 1v ch2 5v 3 ch3 1v tek run: 25ks/s sample ch1 4.66v drive (200ma load) (v aux = 0v) v cc v out 1v ch2 5v 3 ch3 1v tek run: 25ks/s sample ch1 m 2ms figure 8. v cc complete power down (v aux = 0v) 2.5v drive v cc (offset = 4.3v) v out (offset = 3.3v) 100mv ch2 5v 3 2 ch3 100mv 2.5ms/s tek 1 acqs ch1 m 20? figure 9. v cc power up (v aux = 3.3v) figure 10. v cc power down (v aux = 3.3v) 2.5v drive v cc (offset = 4.3v) v out (offset = 3.3v) 100mv ch2 5v 3 2 ch3 100mv 2.5ms/s tek 1 acqs ch3 m 20? figure 11. load transient (10% to 90%) step response figure 12. line transient (1vpp) step response 2.08v v cc (offset = 3.3v) 25ma to 225ma load step 20mv ch2 2 2v 5ms/s tek 3 acqs ch2 m 20? 5.01v v cc (offset = 5.0v) v out (offset = 3.3v) (5ma load) 1v step(4.5v to 5.5v) 20mv ch2 2 500mv 1ms/s tek 1 acqs ch2 m 100?
? 2004 california micro devices corp. all rights reserved. 01/14/04 430 n. mccarthy blvd., milpitas, ca 95035-5112 tel: 408.263.3214 fax: 408.263.7846 www.calmicro.com 7 cmpwr101 performance information (cont ? d) cmpwr101 typical thermal characteristics the overall junction to ambient thermal resistance ( ja ) for device power dissipation (p d ) consists prima- rily of two paths in series. the first path is the junction to the case ( jc ) which is defined by the package style, and the second path is case to ambient ( ca ) thermal resistance which is dependent on board layout. the final operating junction temperature for any set of con- ditions can be estimated by the following thermal equa- tion: t junc = t amb + p d ( jc ) + p d ( ca ) = t amb + p d ( ja ) the cmpwr101 uses a standard soic package. when this package is mounted on a double-sided printed circuit board with two square inches of copper allocated for "heat spreading", the resulting ja is 85 c/w. based on a maximum power dissipation of 0.43w (1.7v x 250ma) with an ambient of 70 c, the resulting junction temperature will be: t junc = t amb + p d ( ja ) = 70 c + 0.43w (80 c/w) = 70 c + 37 c = 103 c thermal characteristics were measured using a double- sided board with two square inches of copper area con- nected to the gnd pin for "heat spreading". measurements showing performance up to junction temperature of 125 c were performed under light load conditions (5ma). this allows the ambient temperature to be representative of the internal junction tempera- ture. note: the use of multi-layer board construction with separate ground and power planes will further enhance the overall thermal performance. in the event of no copper area being dedicated for heat spreading, a multi-layer board construction, using only the minimum size pad layout, will provide the cmpwr101 with an overall ja of 100 c/w which allows up to 500mw to be safely dissipated. 3.284 3.286 3.288 3.290 3.292 3.294 3.296 3.298 3.300 20 30 40 50 60 70 ambient temperature ( ? c) full load output voltage (v) figure 13. regulator v out vs t amb (250ma load) 4.08 4.10 4.12 4.14 4.16 4.18 25 50 75 100 125 junction temperature ( ? c) deselect voltage level (v) figure 14. deselect threshold vs t junct 0.20 0,22 0.24 0.26 0.28 0.30 0.32 0.34 0.36 20 30 40 50 60 70 ambient temperature ( ? c) resistance ( ? ) figure 15. switch resistance vs ambient temperature
? 2004 california micro devices corp. all rights reserved. 8 430 n. mccarthy blvd., milpitas, ca 95035-5112 tel: 408.263.3214 fax: 408.263.7846 www.calmicro.com 01/14/04 cmpwr101 mechanical details soic-8 mechanical specifications dimensions for cmpwr101 devices packaged in 8-pin soic packages are presented below. for complete information on the soic-8 package, see the california micro devices soic package informa- tion document. * this is an approximate number which may vary. package dimensions for soic-8 package dimensions package soic pins 8 dimensions millimeters inches min max min max a 1.35 1.75 0.053 0.069 a 1 0.10 0.25 0.004 0.010 b 0.33 0.51 0.013 0.020 c 0.19 0.25 0.007 0.010 d 4.80 5.00 0.189 0.197 e 3.80 4.19 0.150 0.165 e 1.27 bsc 0.050 bsc h 5.80 6.20 0.228 0.244 l 0.40 1.27 0.016 0.050 # per tube 100 pieces* # per tape and reel 2500 pieces controlling dimension: inches mechanical package diagrams e d h top view l end view c e b a a 1 seating plane side view 1234 8765 pin 1 marking
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