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  hv220/HV20220/hv20320 low charge injection 8-channel high voltage analog switches features hvcmos ? technology for high performance very low quiescent power dissipation C 10 a output on-resistance typically 22 ohms low parasitic capacitances dc to 10mhz analog signal frequency -60db typical output off isolation at 5mhz cmos logic circuitry for low power excellent noise immunity on-chip shift register, latch and clear logic circuitry flexible high voltage supplies a pplications medical ultrasound imaging piezoelectric transducer drivers general description these devices are low charge injection 8-channel high-voltage analog switch integrated circuits (ics) intended for use in applications requiring high voltage switching controlled by low voltage control signals, such as ultrasound imaging and print- ers. input data is shifted into an 8-bit shift register which can then be retained in an 8-bit latch. to reduce any possible clock feed-through noise, latch enable bar (le) should be left high until all bits are clocked in. using hvcmos technology, these switches combine high voltage bilateral dmos switches and low power cmos logic to provide efficient control of high voltage analog signals. these ics are suitable for various combinations of high voltage supplies, e.g., v pp /v nn : +50v/C150v, or +100v/C100v.b block diagram d le cl le cl d le cl d le cl d le cl d le cl d le cl d le cl d le cl level shifters output switches latches sw0 sw1 sw2 sw3 sw4 sw5 sw6 sw7 v pp v nn v dd d out d in clk 8-bit shift register
2 hv220/HV20220/hv20320 ordering information device package options 28-lead plcc 48-lead lqfp/tqfp (1.4mm) 25-ball fpbga hv220 - - hv220ga hv220ga-g HV20220 HV20220pj HV20220fg - HV20220pj-g HV20220fg-g hv20320 hv20320pj -- hv20320pj-g -g indicates the part is rohs compliant (green) absolute maximum ratings parameter value v dd logic power supply voltage -0.5v to +15v v pp - v nn supply voltage 220v v pp positive high voltage supply -0.5v to v nn +200v v nn negative high voltage supply +0.5v to -200v logic input voltages -0.5v to v dd +0.3v analog signal range v nn to v pp peak analog signal current/channel 3.0a storage temperature -65 o c to +150 o c power dissipation: 28-lead plcc 48-lead lqfp/ tqfp(1.4mm) 25-ball fpbga 1.2w 1.0w 1.0w operating conditions symbol parameter value v dd logic power supply voltage 1,3 4.5v to 13.2v v pp positive high voltage supply 1,3 40v to v nn +200v v nn negative high voltage supply 1,3 -40v to -160v v ih high level input voltage v dd -1.5v to v dd v il low-level input voltage 0v to 1.5v v sig analog signal voltage peak-to-peak v nn +10v to v pp -10v 2 t a operating free air temperature 0 o c to 70 o c absolute maximum ratings are those values beyond which damage to the device may occur. functional operation under these conditions is not implied. continuous operation of the device at the absolute rating level may affect device reliability. all voltages are referenced to device ground. notes: 1. power up/down sequence is arbtrary except gnd must be powered -up ? rst and powered down last. 2. v sig must be v nn v sig v pp or ? oating during power up/down transition. 3. rise and fall times of power supplies v dd , v pp , and v nn should not be less than 1.0msec. product marking HV20220 fg yy = year sealed ww = week sealed l = lot number c = country of origin* a = assembler id* = green packaging *may be part of top marking top marking bottom marking yyww HV20220fg lllllllll cccccccc aaa HV20220 pj hv20320 pj HV20220 ga yy = year sealed ww = week sealed l = lot number c = country of origin* a = assembler id* = green packaging *may be part of top marking top marking bottom marking yyww HV20220pj llllllllll ccccccccccc aaa yy = year sealed ww = week sealed l = lot number c = country of origin* a = assembler id* = green packaging *may be part of top marking top marking bottom marking yyww hv20320pj llllllllll ccccccccccc aaa yy = year sealed ww = week sealed l = lot number = green packaging yyww hv220ga lllllllll top marking
3 hv220/HV20220/hv20320 dc electrical characteristics (over operating conditions unless otherwise speci? ed ) r ons small signal switch on-resistance - 30 - 26 38 - 48 i sig = 5ma v pp = +40v v nn = -160v - 25 - 22 27 - 32 i sig = 200ma - 25 - 22 27 - 30 i sig = 5ma v pp = +100v v nn = -100v - 18 - 18 24 - 27 i sig = 200ma - 23 - 20 25 - 30 i sig = 5ma v pp = +160v v nn = -40v - 22 - 16 25 - 27 i sig = 200ma r ons small signal switch on-resistance matching - 20 - 5.0 20 - 20 % i sig = 5.0ma, v pp = +100v, v nn = - 100v r onl large signal switch on-resistance ---15---v sig = v pp -10v, i sig = 1.0a i sol switch off leakage per switch - 5.0 - 1.0 10 - 15 a v sig = v pp -10v, v nn +10v v os dc offset switch off - 300 - 100 300 - 300 mv r l = 100 dc offset switch on - 500 - 100 500 - 500 mv r l = 100k i ppq quiescent v pp supply current - - - 10 50 - - a all switches off i nnq quiescent v nn supply current - - - -10 -50 - - a all switches off i ppq quiescent v pp supply current - - - 10 50 - - a all switches on, i sw = 5.0ma i nnq quiescent v nn supply current - - - -10 -50 - - a all switches on, i sw = 5.0ma i sw switch output peak current - 3.0 - 3.0 2.0 - 2.0 a v sig duty cycly < 0.1% f sw output switching frequency - - - - 50 - - khz duty cycle = 50% i pp supply current - 6.5 - - 7.0 - 8.0 ma v pp = +40v v nn = -160v all output switches are turning on and off at 50khz with no load - 4.0 - - 5.0 - 5.5 v pp = +100v v nn = -100v - 4.0 - - 5.0 - 5.5 v pp = +160v v nn = -40v i nn supply curent - 6.5 - - 7.0 - 8.0 ma v pp = +40v v nn = -160v - 4.0 - - 5.0 - 5.5 v pp = +100v v nn = -100v - 4.0 - - 5.0 - 5.5 v pp = +160v v nn = -40v i dd logic supply average current - 4.0 - - 4.0 - 4.0 ma f clk = 5.0mhz, v dd = 5.0v i ddq logic supply quiescent current - 10 - - 10 - 10 a --- i sor data out source current 0.45 - 0.45 0.70 - 0.40 - ma v out = v dd -0.7v i sink data out sink current 0.45 - 0.45 0.70 - 0.40 - ma v out = 0.7v c in logic input capacitance - 10 - - 10 - 10 pf --- sym parameter 0 o c +25 o c +70 o c units conditions min max min typ max min max
4 hv220/HV20220/hv20320 sym parameter 0 o c +25 o c +70 o c units conditions min max min typ max min max ac electrical characteristics (over recommended operating conditions: v dd = 5.0v, unless otherwise speci? ed) t sd set up time before le rises 150 150 150 ns --- t wle time width of le 150 150 150 ns --- t do clock delay time to data out 150 150 150 ns --- t wcl time width of cl 150 150 150 ns --- t su set up time data to clock 15 15 8.0 20 ns --- t h hold time data from clock 35 35 35 ns --- f clk clock frequency 5.0 5.0 5.0 mhz 50% duty cycle, f data = f clk /2 t r , t f clock rise and fall times 50 50 50 ns --- t on turn on time 5.0 5.0 5.0 s v sig = v pp -10v, r load = 10k t off turn off time 5.0 5.0 5.0 s v sig = v pp -10v, r load = 10k dv/dt maximun v sig slew rate 20 20 20 v/ns v pp = +160v, v nn = -40v 20 20 20 v pp = +100v, v nn = -100v 20 20 20 v pp = +40v, v nn = -160v k o off isolation -30 -30 -33 -30 db f = 5.0mhz, 1k/15pf load -58 -58 -58 f = 5.0mhz, 50 load k cr switch crosstalk -60 -60 -70 -60 db f = 5.0mhz, 50 load i id output switch isolation diode current 300 300 300 ma 300ns pulse width, 2.0% duty cycle c sg(off) off capacitance sw to gnd 5.0 17 5.0 12 17 5.0 17 pf 0v, f = 1.0mhz c sg(on) on capacitance sw to gnd 25 50 25 38 50 25 50 pf 0v, f = 1.0mhz +v spk output voltage spike - - - - 150 - - mv v pp = +40v, v nn = -160v, r load = 50 -v spk - - - - 150 - - +v spk - - - - 150 - - v pp = +100v, v nn = -100v, r load = 50 -v spk - - - - 150 - - +v spk - - - - 150 - - v pp = +160v, v nn = -40v, r load = 50 -v spk - - - - 150 - - qc charge injection - - - 820 - - - pc v pp = +40v, v nn = -160v, v sig = 0v - - - 600 - - - v pp = +100v, v nn = -100v, v sig = 0v - - - 350 - - - v pp = +160v, v nn = -40v, v sig = 0v
5 hv220/HV20220/hv20320 logic timing waveforms data in clock data out d n + 1 n n - 1 d d 50% 50% 50% 50% 50% 50% 50% 50% 50% out (typ) v off on clr t wcl 90% 10% t off dd sd on t tt t t h wle su t le truth table d0 d1 d2 d3 d4 d5 d6 d7 le clr sw0 sw1 sw2 sw3 sw4 sw5 sw6 sw7 l l l off hllon l l l off hllon l l l off hllon l l l off hllon l l l off hll on l l l off hll on l l l off hll on l l l off hll on x x x x x x x x h l hold previous state x x x x x x x x x h all switches off notes: 1. the eight switches operate independently. 2. serial data is clocked in on the l to h transition of the clk. 3. the switches go to a state retaining their present condition at the rising edge of le. when le is low the shift register da ta ? ow through the latch. 4. d out is high when data in the shift register 7 is high. 5. shift register clocking has no effect on the switch states if le is high. 6. the clr clear input overrides all other inputs.
6 hv220/HV20220/hv20320 test circuits switch off leakage i sol v pp 5v v nn v pp v nn v dd gnd v nn +10v v pp -10v dc of fset on/off v pp 5v v nn v pp v nn v dd gnd v out 100k ? r l t on /t off t est circuit v pp 5v v nn v pp v nn v dd gnd v pp -10v r l 10k ? v out isolation diode current i id v pp 5v v nn v pp v nn v dd gnd v nn v sig crosstalk k cr = 20log v out v in v in = 10 v p-p @5mhz nc 50 ? v pp 5v v nn v pp v nn v dd gnd 50 ? charge injection v pp 5v v nn v pp v nn v dd gnd v sig v out 1000pf q = 1000pf x v out v out output v oltage spike v pp 5v v nn v pp v nn v dd gnd v out 1k ? r l 50 ? +v spk -v spk off isolation k o = 20log v out v in v in = 10 v p-p @5mhz v pp 5v v nn v pp v nn v dd gnd r l v out
7 hv220/HV20220/hv20320 typical performance curves clk frequency (khz) t do vs. ambient temperature t a ambient temp t a ( c) t o d ) s n ( r n o ) s m h o ( ambient temperature ( o c) r n o a m 5 @ ) s m h o ( off-isolation vs. signal voltage frequency v dd = 5.0v, v pp /v nn = 100v ) b d ( n o i t a l o s i - f f o -80.0 -75.0 -70.0 -65.0 -60.0 -55.0 -50.0 1.0 10.0 r on vs. ambient temperature t a v dd = 5.0v, v pp /v nn = 100v r on vs. v pp /v nn v pp /v nn = 100v i pp /i nn vs. output switching frequency i p p i / n n ) a m ( t n e r r u c e g a r e v a output switching frequency (khz) v dd = 5.0v v dd = 5.0v, v pp /v nn = 100v i d d c t n e r r u ) a m ( i dd vs clock frequency v dd = 5.0v, v pp /v nn = 100v, t a = 0 c to 70 c 3.0 2.0 1.0 0.0 10 1000 10000 100 signal voltage frequency (mhz) v pp v nn t a = 0 o c t a = 25 o c t a = 70 o c t a = 125 o c t a = 70 c t a = 0 c -50 -25 0 25 50 75 100 125 150 0 10.0 20.0 30.0 40.0 i sw = 5ma i sw = 200ma 40v 60v 80v 100v 120v 140v 160v 0 10.0 20.0 30.0 40.0 50.0 -160v -140v -120v -100v -80v -60v -40v t a = 125 c t a = 85 c t a = 25 c t a = 0 c -50 -25 0 25 50 75 100 125 0 20 40 60 80 100 v dd = 5.0 v v dd = 13.5 v 0 255075100 125 150 0 1 2 3 4 5
8 hv220/HV20220/hv20320 pin description (hv220ga) ball location function a3 sw1 b2 sw2 b3 sw1 b4 sw0 b5 sw0 b6 v nn c1 sw3 c2 sw3 c3 sw2 c4 v pp c5 gnd c6 d in c7 v dd d1 sw4 d2 sw4 d3 sw5 d4 sw7 d5 le d6 clk e2 sw5 e3 sw6 e4 sw7 e5 d out e6 clr f3 sw6 pin description (HV20220pj) pin function pin function 1 sw3 15 n/c 2 sw3 16 d in 3 sw2 17 clk 4 sw2 18 le 5 sw1 19 cl 6 sw1 20 d out 7 sw0 21 sw7 8 sw0 22 sw7 9v pp 23 sw6 10 v nn 24 sw6 11 n/c 25 sw5 12 gnd 26 sw5 13 v dd 27 sw4 14 n/c 28 sw4 pin function pin function 1 sw3 15 n/c 2 sw3 16 d in 3 sw2 17 clk 4 sw2 18 le 5 sw1 19 cl 6 sw1 20 d out 7 sw0 21 sw7 8 sw0 22 sw7 9 n/c 23 sw6 10 v pp 24 sw6 11 n/c 25 sw5 12 v nn 26 sw5 13 gnd 27 sw4 14 v dd 28 sw4 pin description (hv20320pj) pin function pin function 1 sw5 25 v nn 2 n/c 26 n/c 3 sw4 27 n/c 4 n/c 28 gnd 5 sw4 29 v dd 6 n/c 30 n/c 7 n/c 31 n/c 8 sw3 32 n/c 9 n/c 33 d in 10 sw3 34 clk 11 n/c 35 le 12 sw2 36 clr 13 n/c 37 d out 14 sw2 38 n/c 15 n/c 39 sw7 16 sw1 40 n/c 17 n/c 41 sw7 18 sw1 42 n/c 19 n/c 43 sw6 20 sw0 44 n/c 21 n/c 45 sw6 22 sw0 46 n/c 23 n/c 47 sw5 24 v pp 48 n/c pin description (48-lead fg)
9 hv220/HV20220/hv20320 48-lead lqfp package outline (fg) 7x7mm body, 1.4mm height (min), 0.50mm pitch symbol a a1 a2 b d d1 e e1 e l l1 l2 dimension (mm) min 1.40 0.05 1.35 0.17 8.80 6.80 8.80 6.80 0.50 bsc 0.45 1.00 ref 0.25 bsc 0 o nom - - 1.40 0.22 9.00 7.00 9.00 7.00 0.60 3.5 o max 1.60 0.15 1.45 0.27 9.20 7.20 9.20 7.20 0.75 7 o jedec registration ms-026, variation bbc, issue d, jan. 2001. drawings not to scale. 1 seating plane gauge plane l l1 l2 view b view b seating plane top view d d1 e e1 b e side view a2 a a1 note 1 (index area d1/4 x e1/4) 48 note 1: a pin 1 identi? er must be located in the index area indicated. the pin 1 identi? er may be either a mold, or an embedded metal or marked feature.
10 hv220/HV20220/hv20320 hv220ga 25-ball fpbga (ga) top view bottom view enlarged side view note: all dimensions are in millimeters
11 hv220/HV20220/hv20320 (the package drawing(s) in this data sheet may not re? ect the most current speci? cations. for the latest package outline information go to http://www.supertex.com/packaging.html .) doc.# dsfp - hv220_HV20220_hv20320 c073107 28-lead plcc package outline (pj) symbol a a1 a2 b d d1 e e1 e dimension (inches) min .165 .090 .062 .013 .485 .450 .485 .450 .050 bsc nom .172 .105 - - .490 .453 .490 .453 max .180 .120 .083 .021 .495 .456 .495 .456 jedec registration ms-018, variation ab, issue a, june, 1993. drawings not to scale . note 1: a pin 1 identi? er must be located in the index area indicated.the pin 1 identi? er may be either a mold, or an embedded metal or marked feature. .150 max .048/.042 x 45 o 1 .075 max 4 26 d d1 e1 e top view side view view b a a2 a1 seating plane e note 1 (index area) .056/.042 x 45 o .020 max 3 places base plane .020 min 28 b view b b1


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