application note rear mirrors multiplexing using l9946 by l. valsecchi & s. vergani the multiplex concept in this section a brief introduction to the basic multiplex (mux) concepts is given. generally speaking, a mux is composed by a number of units connected through a serial bus. there is a set of meaningful serial messages and each unit can recognise a subset of messages relevant to it. once a relevant message is received, the unit performs an action according to the information contained in the message. usually an acknow- ledge technique is used, so that a bidirectional in- formation flow between units can be established. it is possible to draw a rough distinction between mux systems based on the communication strat- egy. in increasing complexity order, a mux can be classified as follows. 1) master-slave: one unit is qualified as master unit, and it is the only one that can autonomously start a transmis- sion. the other units (slaves) can transmit only af- ter the reception of a message out of a defined set. 2) quasi multi-master: as before, one unit acts like a master, but some slave units can start an autonomous transmission to the master. this happens usually when a sig- nificant event has occurred (e.g. a key has been pressed).however, the slave units cannot com- municate each other directly. the messages flow is under the total control of the master unit. 3) multi-master: every units can commuicate each other, and there is no more a well defined master unit.in fact, the control, at a given time, is owned by the unit currently autonomously transmitting. the format of the serial messages, as well as the characteristics of the physical interface of the bus line are defined by a series of rules called the protocol specification. these rules also define in details the behaviour of the transmitting and receiving units when a situation of bus con- tention (i.e. when two units try to access the bus simultaneously) occurs. the iso (international organization for stand- ardization) has standarized, at various levels, three protocols called can, van, j1850. this means that documents exist as a reference to achieve the compatibility between two systems using the same protocol. in fact, especially for slow speed data bus, cus- tom protocols have been developed. there are definite advantages in using a mux system in the automotive field. first, the number of wires required to perform the same functions is dramatically reduced. for example,with the mux approach, to connect a keyboard unit to other units such as window lift motor control, rear mirror control etc., only three (or four if a differential bus is used) wires are required, independently of the number of keys or motors used. this leads to a reduction of costs of the harness of the vehicle. flexibility is another feature common to well de- signed multiplex systems. the multiplex architecture allows a high degree of freedom in the choice of the physical location of the units inside the vehicle. for example, as long as the serial bus line is provided, a control key- board can be placed indifferently in the door or on the dashboard without changing the vehicle wir- ing. furthermore, if a certain computational power (i.e. a microcontroller) is located in the peripheral units, the functional behaviour of the whole sys- tem can be defined by software so that upgrad- ing and modification can be accomplished without changing the hardware. also, a sophisticated diagnostic strategy can be implemented. usually one or more units collect di- agnostic information that can be read by a tester connected to the system when a car technical as- sistance is required. such a tester generally in- cludes a menu driven diagnosis procedure, lead- AN455/0392 the application of the l9946 device in a real-world automotive multiplex system is described. af- ter a brief introduction to the multiplex concept, the hardware and software key points are dis- cussed. it turns out that l9946 is very well suited for this kind of relatively complex applications. 1/9
ing to easier fault detection and thus to shorter re- pair time. rear mirrors multiplex system introduction the application described here is an example of how the l9946 can be used as a mirror controller in a mux system. to explain in all the details a mux system design is beyond the scope of this application note. how- ever, the key points in hardware and software de- sign will be discussed in depth. general description this mux is composed by a keyboard unit, a left mirror unit and a right mirror unit. the electronics is intended to be placed inside the external rear mirror case, and inside the physical keyboard. to achieve this, when possi- ble, devices available in small so package have been chosen. in this way, using surface mounting technique, very compact pcb layout can be ob- tained. the three units are connected through a differen- tial bus. including power supply line and ground return, only four connection wires are required, obtaining a substantial saving compared to the traditional solution, that requires eight wires. the system block diagram is shown in fig. 1. the functions implemented are: - mirror plate movements - open / fold - wiper the commands available are activated by 6 push buttons located in the keyboard unit. an additional three-way selector allows to switch between the left or the right mirror. when this se- lector is in its central position, the only function available is a simultaneusly mirror open/fold movement. mirror unit description the block diagram of the mirror unit is shown in fig. 2. the schematic diagram of the mirror unit is shown in fig. 3. the only difference between the left and right mir- ror unit is the position of a jumper that configures the address of the unit. figure 1: system block diagram figure 2: mirror unit block diagram application note 2/9
figure 3: mirror unit schematic diagram. application note 3/9
in the following sections the main functional blocks are described. protections the units must be protected against a number of possible anomalous voltages on the power supply line coming from the battery. this anomalous conditions are: 1) reverse battery 2) load dump 3) short negative spikes voltage regulator (l4949) this device provides the five volts necessary for the microcontroller and to the bus line interface. it also provides to the microcontroller the correct power on reset signal. microcontroller (st6210) the microcontroller (uc) choosen for this applica- tion is the st6210 (1k8 eprpom, 64 bytes ram).this is a 20 pin device, available in so20 package. the st6 family is intended for low-me- dium complexity applications. the heaviest task for the uc in this, or similar, ap- plication is the protocol handling, i.e. the recep- tion and the transmission of the serial messages on the bus. due to the low computational power and speed of this uc, the protocol was chosen to be relatively slow (3.3 kbits/sec) and the bit encoding was cho- sen in such a way that the decoding algorithm is tailored to optimize the hardware uc resource us- age. in this case the uc also drives the l9946 and pro- tects it against overcurrent and/or overtempera- ture reading back the dignostic signals dg1 and dg2. mirror actuator (l9946) the l9946 in this application is used to drive the four mirror motors: two for the plate movements, one for the open/fold movement and one for the wiper motor. in this particular application the wiper can be driven by the high-side driver thanks to a mechanical solution built into the mir- ror that performs automatically the wiper alterna- tive movement. bus line interface this is the circuitry that realize the physical inter- face between the unit and the bus line. since the functioning of the whole system relies on the cor- rectness of the exchanged messages, the bus line interface must be designed very carefully. a complete discussion of the needed design criteria is far beyond the scope of this application note. a list of desirable features is: a) high noise rejection b) line faults (short to gnd or vcc, wire cut) detection and real time recover. c) high rf noise immunity d) low rf emission the solution implemented here is a differential bus line driven by two complementary mos devices. the passive components around the mos polarize and protect the devices against shorts, spikes and negative voltages applied to the bus lines. capacitances placed on the bus lines filter out rf noise, also reducing the bandwidth of the bus chan- nel in order to avoid too sharp edges during bus transitions, i.e. rf emission and subsequently pos- sible interferencies with other equipment (dash- board instrumentation, car radios etc.) the three comparators in the rx section allow a full fault detection and recovery. this means that transmission and reception can continue also if one line is shorted to gnd or v cc or cut. figure 4: keyboard unit block diagram application note 4/9
figure 5: keyboard unit schematic diagram. application note 5/9
keyboard unit description the block diagram and the schematic diagram of the keyboard unit are shown respectively in fig. 4 and fig. 5. many blocks in the architecture of this unit are very similar or identical to those used in the mirror unit. this blocks are protections, voltage regulator and the bus line interface. the uc used is the same adopted in the mirror units. a 4 x 2 matrix-organized keypad is connected to the unit. the schematic diagram of the physical keyboard is shown in fig. 6. since the physical keyboard rows and columns are directly connected to the uc pins, it must be placed very close to the electronics to avoid in- duced noise. a software debouncing strategy has been implemented so that a key transition is vali- dated only if the new state has been stable for at least fifty milliseconds. software description introduction two different programs have been written, one for the mirror units and one for the keyboard unit. the software was developed using the st6 hard- ware emulator, and the st6 macroassembler and linker. the mirror unit and keyboard unit pro- grams are respectively about 1340 and 1280 bytes long. the main difficult in this software de- velopment was to overcome the uc limitations (using some software tricks) without affecting the overall program's readability. figure 6: keyboard schematic diagram. application note 6/9
mirror unit's software description the software developed for this unit can be di- vided, at the functional level, into 3 main sections. 1) protocol handler section this routines perform the serial bus message re- ception and transmission. the reception procedure starts when a valid som (see bus protocol description para- graph) is detected. the reception ends success- fully when the following conditions are obeyed: a)ten correct bits (i.e. with the right timing between two edges) are decoded. b)the received checksum field matches the checksum calculated upon the preceding eight received bits. if an error occurs, the reception is aborted and the unit starts to wait for a new valid som. the transmission routine starts when the unit must send a message on the bus line. the st6 timer is used to obtain the desired time between the edges. 2) messages decoding and actuations this section performs the message decoding and the actual driving of the l9946. once a correct message is received, the mirror unit compares the received address field with its own address. if they are equal, the data field of the message is decoded and the corresponding action or series of actions are undertaken. the data fields recognized by the mirror units and their meaning are: 01110 : wiper on 10000 : wiper off 01010 : fold/open 00010 : up movement 00100 : down movement 00110 : left movement 01000 : right movement 10010 : stop motors immediately after the action has started, the mir- ror unit transmits an acknowledge message to the master unit (i.e. the keyboard unit). this message is the echo of the acknowledged reception. 3 ) l9946 protection the l9946 dg1 and dg2 pins are connected to uc interrupts lines so that a fast switch off is exe- cuted when an overcurrent or an overtemperature occurs in the device. keyboard unit software description in the sotfware for this unit the protocol handler section is the same code used in the mirror units. the keyboard units acts like the master of the system. the matrix keyboard is scanned every five milli- seconds. if no key status variation is detected, every fifty milliseconds a stop message is sent to the slave units as a polling. the slave units should answer to this messages. if this is not the case, the master unit knows that one or both slaves are disconnected or broken. when a key is pressed, a debouncing procedure is started. if the pressure remains at least for fifty millisecond the corresponding command mes- sage is sent to the unit selected by the position of the three-way selector. if this selector is in its central position, only the fold/open command is enabled, and the sub- sequent command is sent to both slave units. the keyboard unit keep sending the command until the key is released. then, the normal no-op- eration polling is executed. bus protocol description 1. general the information between the units is passed in messages transmitted serially on the bus con- nected to all the units. when the bus is in the idle state, i.e. no message is transmitted, its state is called opassive stateo. it is driven in the oactive stateo by a transmitting unit at the start of a message for the ostart of mes- sageo time.the state is passive for the first (most significant bit) information time, active for the next bit time and so on until the message is finished (terminated) in the passive state. the value of the bit is determined by the time elapsed between two consecutive transition of the bus state. this bit encoding is called vpwm (variable pulse width modulation). 2. message symbol waveforms the following sections show the nominal timing requirements of the vpwm message simbols generated by the software protocol handler as they appear on one wire of the bus. on the other bus wire the signal is inverted. 2.1. start of message this symbol appears at the start of every mes- sage when a transmitter drives the bus in the ac- tive state to start the message. 2.2. data bit application note 7/9
each data bit is represented by the time between two consecutive transitions. these are both pas- sive and active bit states that are used alter- nately. 2.2. o0o bit the two o0o bit waveforms are: 2.3. o1o bit the two o1o bit waveforms are: 3. message format a message consists of a start of message (som) field, an address (adr) field (3 bits), a data (data) field (5 bits) and a checksum (chk) field (2 bits), for a total of 10 bits transmitted. with the timing given in the above sections, the average transmission bit rate is 3.3 kbps. the som is the signal on wich every receiving unit starts the reception procedure. once a successful reception has been completed, the data field is decoded and the related action undertaken only if the adr field matches with the wired address assigned to the receiving unit. the chk field is a way to detect some type of er- rors occurred during the data field bits transmis- sion. during the reception procedure, a checksum value is calculated, and the reception is valid only if this value is equal to the contents of the re- ceived chk field. the algorithm used to calculate the checksum is the following. a) count the number of o1o bits in the data and adr fields. b) take the two less significant bits of this num- ber. c) complement these bits. application note 8/9
information furnished is believed to be accurate and reliable. however, sgs-thomson microelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of sgs-thomson microelectronics. specifications men- tioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. sgs-thomson microelectronics products are not authorized for use as critical components in life support devices or systems without ex- press written approval of sgs-thomson microelectronics. ? 1995 sgs-thomson microelectronics - all rights reserved sgs-thomson microelectronics group of companies australia - brazil - france - germany - hong kong - italy - japan - korea - malaysia - malta - morocco - the netherlands - singapore - spain - sweden - switzerland - taiwan - thaliand - united kingdom - u.s.a. application note 9/9
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