1 3 product brief april 2000 celxpres ? T8207 asychronous transfer mode (atm) interconnect features n 32 multi-phy (mphy) operation n programmable number of utopia output queues with four levels of priority n shared utopia mode n egress sdram buffer support to extend utopia output priority queues for 32k to 512k cells 64 queues configurable up to four queues per phy with programmable sizes programmable insertion of the explicit forward congestion indication (efci) bit n support of atm traffic management via partial packet discard (ppd), forward explicit congestion notification (fecn), and the cell loss priority (clp) bit n selectable slew rate gtl+ i/o >1.5 gbits/s cell bus operation programmable as bus arbiter n flexible per virtual channel (vc) cell counters n cell header insertion with virtual path identifier (vpi) and virtual channel identifier (vci) translation via external sram (up to 64k entries) n support of network node interface (nni) and user network interface (uni) header types with optional generic flow control (gfc) insertion n programmable operations and maintenance and resource management (oam/rm) cell routing n support of multicast and broadcast addresses per phy n footprint compatible with the t8206 n eight gpio pins n jtag support n optional monitoring of misrouted cells n microprocessor interface, supporting both motor- ola* and intel ? modes (multiplexed and nonmulti- plexed) n control cell transmission and reception through microprocessor port n compatible with tr a n sw i t c h cellbus ? n 3.3 v power supply n 3.3 v ttl i/o (5 v tolerant) n 272-pin bga package n industrial temperature range (C40 c to +85 c ) applications n asymmetric digital subscriber line (adsl) digital subscriber line access multiplexer (dslams) n access gateways n access multiplexers/concentrators n multiservice access equipment platforms * motorola is a registered trademark of motorola, inc. ? intel is a registered trademark of intel corporation. ? transwitch and cellbus are registered trademarks of transwitch corp.
2 lucent technologies inc. celxpres T8207 product brief asynchronous transfer mode (atm) interconnect april 2000 3 description the celxpres T8207 device integrates all of the required functionality to transport atm cells across a backplane architecture with high-speed cell traffic exceeding 1.5 gbits/s to a maximum of 32 destinations. the management of multiple service classes and monitoring of performance on atm and phy interfaces is incorporated in the devices functionality. traffic delivery to multi-phys (mphys) is managed through the utopia interface. the celxpres T8207 device meets the atm forums universal test and operations phy interface for atm (utopia) level 1, version 2.01 and level 2, version 1.0 specifications for cell-level handshake and mphy data path opera- tion. the T8207 supports the required mphy operation as described in sections 4.1 and 4.2 of the atm forums level 2 specification. the T8207 supports mphy operation for up to 32 ports. in addition to the required utopia signals, the optional transmit parity (txprty) and receive parity (rxprty) signals are provided. 5-7542.r1 figure 1. functional block diagram one or two 32k to 256k x 8 look-up engine rx utopia interface rx phy fifo (16 cells) control cell tx fifo (1 cell) loopback fifo (1 cell) control cell rx fifo (16 cells) tx phy fifo (128 cells) sdram interface tx utopia 1m to 16m x 16 sdram microprocessor interface micro- processor cell bus cell bus arbiter cell bus monitoring cell bus interface cell bus tx utopia interface rx utopia tx utopia (4 cells) input fifo (64 cells) cell buffer (lut) srams rx utopia fifo
product brief celxpres T8207 april 2000 asynchronous transfer mode (atm) interconnect lucent technologies inc. 3 1 3 description (continued) the celxpres T8207 may be configured as an atm or phy level device providing cell routing between uto- pia and a 32-bit wide gtl+ bus. in addition to the 32 data signals, the bus has the following signals: n read clock n write clock n frame sync n acknowledge atm cells arriving at the utopia receive interface may get vpi and vci translation and routing information from a look-up table in external sram. an external synchronous dynamic random access memory (sdram) is used to extend the buffering for atm cells destined for the utopia transmit interface. this exter- nal sdram may be partitioned into four or less inde- pendently sized queues per phy. the four queues may be used to implement qos using different priorities for each queue. the celxpres T8207 provides a shared utopia mode, which allows two devices on different cell buses to share the same utopia bus in atm mode. using a glueless interface between the two T8207s, the chips resolve queue priorities for the phys and arbitrate the use of the utopia bus. this shared mode can be used to provide redundancy or increase the system capacity. in addition, an external microprocessor may send or receive control or loopback cells through the micropro- cessor interface. the 8-bit microprocessor interface may be configured to be motorola or intel compatible and is used to configure and monitor the device.
3 l u cent t echn o logies i n c. r e se r v es t h e r i g ht t o ma k e chan g es to t he p r oduct ( s) o r in f o r m ation c o ntain e d he r ein with o ut no t ic e . n o liability i s assum e d as a res u l t of t h eir us e or applicatio n . no rights u nde r a n y pa t ent acc o mpa n y the s a l e of a n y such p r oduct ( s) o r in f o r m a tion. celxpres is a trademark of lucent technologies, inc. co p yright ? 200 0 luce n t t ec h nologie s inc. all rights res e r v ed ap r i l 2000 p b 00-026dlc f o r a d d i ti o n a l i n fo r m a t i o n , c o n ta c t y o u r m i c r o e l e c t r o n i c s g r o u p a cc o u n t m a n a ge r o r t h e f o l l o wi n g: i n terne t : http:// w w w . lucent.com/mic r o e-m a il: do c m a ste r @mi c r o .lu c ent. c om n . a m e r ic a : m i c r o e l e c t r o n i c s g r o u p , l u c e n t t e c h n o l og i e s i n c ., 5 5 5 u n i o n b o u l e v a r d, r o o m 3 0 l - 1 5 p - b a , a l l e nt o wn , p a 1 8 1 0 3 1- 8 0 0- 3 7 2 - 2 4 4 7 , f a x 6 10 -7 1 2 - 4 1 06 ( i n c an a d a: 1 - 8 0 0 - 5 5 3 - 2 44 8 , f a x 6 1 0 - 71 2 - 4 1 06) asia p a cif i c : mi c roelectronics grou p , lucent t echnologies singapore pt e . ltd. , 77 s c ience p a r k d r i v e , #03-18 cintech iii , singa p o r e 1 1 82 5 6 t el. ( 65 ) 7 7 8 8 8 3 3 , f a x ( 6 5 ) 7 7 7 74 9 5 c h i n a: m i c r o e l e c t r o n i c s g r o u p , l u c e n t t e c hn o l o g i e s ( c h i na ) c o ., lt d ., a- f2 , 2 3 / f , za o f o n g u n i v e r s e b u i l d i n g , 1 8 0 0 zho n g s h a n x i r o a d , s h a ng h a i 2 00 2 3 3 p . r. c h i na t el . ( 86 ) 2 1 64 4 0 0 4 6 8 , ext . 31 6 , f a x ( 86 ) 21 64 4 0 0 6 5 2 j a p a n: m i c r o e l e c t r o n i c s g r o u p , l u c e n t t e c h n o l og i e s j ap a n l t d ., 7 - 1 8 , h i g a s h i - g o ta n d a 2 -c h o m e , s h i n a g a w a - k u , t o k y o 1 4 1, j a p an t el. ( 81 ) 3 5 42 1 1 6 0 0 , f a x ( 8 1 ) 3 5 4 2 1 17 0 0 e u r o p e : d at a r e q u e s t s : m ic r o e l e c t r o n ic s g r ou p d a t a li n e : t e l. ( 4 4 ) 7 00 0 5 8 2 36 8 , f a x ( 4 4 ) 1 1 8 9 3 2 8 148 t e c h n i cal i n q u i r i e s : ge r ma n y : (4 9 ) 89 9 5 0 8 6 0 (m u n i c h ) , u n i t e d ki n gdo m : ( 4 4 ) 1 3 4 4 86 5 9 0 0 ( ascot), f r a n ce : ( 3 3 ) 1 4 0 8 3 6 8 0 0 (p a r i s), s we d e n : ( 4 6) 8 5 9 4 6 07 00 (sto c k h o l m) , fi n land : ( 3 5 8 ) 9 4 3 5 4 28 0 0 (h e ls i n k i), i t a l y : ( 3 9 ) 0 2 6 6 0 8 13 1 (m i l a n), s p ai n : ( 3 4 ) 1 8 0 7 1 4 4 1 (mad r id)
|
