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1/26 february 2005 stm706t/s/r, stm706p, stm708t/s/r 3v supervisor features summary precision v cc monitor ? stm706/708 t: 3.00v v rst 3.15v s: 2.88v v rst 3.00v r; stm706p: 2.59v v rst 2.70v rst and rst outputs 200ms (typ) t rec watchdog timer - 1.6sec (typ) manual reset input (mr ) power-fail comparator (pfi/pfo ) low supply current - 40a (typ) guaranteed rst (rst) assertion down to v cc = 1.0v operating temperature: ?40c to 85c (industrial grade) figure 1. packages table 1. device options note: 1. push-pull output 2. the stm706p is identical to the stm706r, except its reset output is active-high. 8 1 so8 (m) tssop8 3x3 (ds) watchdog input watchdog output active-low rst (1) active-high rst (1) manual reset input power-fail comparator stm706t/s/r ??? ?? stm706p (2) ?? ??? stm708t/s/r ??? ?
stm706t/s/r; stm706p; stm708t/s/r 2/26 table of contents features summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 figure 1. packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 table 1. device options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 summary description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 figure 2. logic diagram (stm706t/s/r and stm706p) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 figure 3. logic diagram (stm708t/s/r) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 table 2. signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 figure 4. stm706t/s/r and stm706p so8 connections. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 5. stm706t/s/r and stm706p tssop8 connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 6. stm708t/s/r so8 connections. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 7. stm708t/s/r tssop8 connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 table 3. pin description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 8. block diagram (stm706t/s/r and stm706p) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 figure 9. block diagram (stm708t/s/r) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 figure 10.hardware hookup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 reset output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 push-button reset input. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 watchdog input (stm706t/s/r and stm706p). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 watchdog output (stm706t/s/r and stm706p) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 power-fail input/output. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 ensuring a valid reset output down to v cc = 0v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 figure 11.reset output valid to ground circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 interfacing to microprocessors with bi-directional reset pins . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 12.interfacing to microprocessors with bi-directional reset i/o . . . . . . . . . . . . . . . . . . . . . . 10 typical operating characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 13.supply current vs. temperature (no load) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 14.v pfi threshold vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 15.reset comparator propagation delay vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 16.power-up t rec vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 17.normalized reset threshold vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 18.watchdog time-out period vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 19.pfi to pfo propagation delay vs. temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 20.output voltage vs. load current (v cc = 5v; v bat = 2.8v; t a = 25c). . . . . . . . . . . . . . 14 figure 21.output voltage vs. load current (v cc = 0v; v bat = 2.8v; t a = 25c). . . . . . . . . . . . . . 14 figure 22.rst output voltage vs. supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 23.rst output voltage vs. supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 24.power-fail comparator response time (assertion) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 25.power-fail comparator response time (de-assertion) . . . . . . . . . . . . . . . . . . . . . . . . . 16
3/26 stm706t/s/r; stm706p; stm708t/s/r figure 26.maximum transient duration vs. reset threshold overdrive. . . . . . . . . . . . . . . . . . . . . 17 maximum rating. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 table 4. absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 dc and ac parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 table 5. operating and ac measurement conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 27.ac testing input/output waveforms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 28.power-fail comparator waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 29.mr timing waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 30.watchdog timing (stm706t/s/r and stm706p) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 table 6. dc and ac characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 package mechanical . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 31.so8 ? 8-lead plastic small outline, 150 mils body width, package mechanical. . . . . . . 21 table 7. so8 ? 8-lead plastic small outline, 150 mils body width, package mechanical data . . 21 figure 32.tssop8 ? 8-lead, thin shrink small outline, 3x3mm body size, outline . . . . . . . . . . . 22 table 8. tssop8 ? 8-lead, thin shrink small outline, 3x3mm body size, mechanical data . . . . 22 part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 table 9. ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 table 10. marking description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 revision history. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 table 11. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
stm706t/s/r; stm706p; stm708t/s/r 4/26 summary description the stm70x supervisors are self-contained de- vices which provide microprocessor supervisory functions. a precision voltage reference and com- parator monitors the v cc input for an out-of-toler- ance condition. when an invalid v cc condition occurs, the reset output (rst ) is forced low (or high in the case of rst). these devices also offer a watchdog timer (except for stm708t/s/r) as well as a power-fail compar- ator to provide the system with an early warning of impending power failure. the stm706p is identical to the stm706r, except its reset output is active-high. these devices are available in a standard 8-pin soic package or a space-saving 8-pin tssop package. figure 2. logic diagram (stm706t/s/r and stm706p) note: 1. for stm706p only. figure 3. logic diagram (stm708t/s/r) table 2. signal names note: 1. for stm706p and stm708t/s/r only. ai08841 v cc stm706t/s/r, stm706p v ss wdo rst (rst) (1) wdi pfi mr pfo ai08842 v cc stm708t/s/r v ss rst rst mr pfi pfo mr push-button reset input wdi watchdog input wdo watchdog output rst active-low reset output rst (1) active-high reset output v cc supply voltage pfi power-fail input pfo power-fail output v ss ground nc no connect
5/26 stm706t/s/r; stm706p; stm708t/s/r figure 4. stm706t/s/r and stm706p so8 connections note: 1. for stm706p reset output is active-high. figure 5. stm706t/s/r and stm706p tssop8 connections note: 1. for stm706p reset output is active-high. figure 6. stm708t/s/r so8 connections figure 7. stm708t/s/r tssop8 connections 1 pfo pfi wdi rst(rst) (1) v cc mr wdo v ss ai08837 so8 2 3 4 8 7 6 5 1 pfo pfi wdi rst(rst) (1) v cc mr wdo v ss ai08838 tssop8 2 3 4 8 7 6 5 1 pfo pfi nc rst v cc mr rst v ss ai08839 so8 2 3 4 8 7 6 5 1 pfo pfi nc rst v cc mr rst v ss ai08840 tssop8 2 3 4 8 7 6 5
stm706t/s/r; stm706p; stm708t/s/r 6/26 pin descriptions mr . a logic low on mr asserts the reset output. reset remains asserted as long as mr is low and for t rec after mr returns high. this active-low input has an internal pull-up. it can be driven from a ttl or cmos logic line, or shorted to ground with a switch. leave open if unused. wdi. if wdi remains high or low for 1.6sec, the in- ternal watchdog timer runs out and reset (or wdo ) is triggered. the internal watchdog timer clears while reset is asserted or when wdi sees a rising or falling edge. the watchdog function cannot be disabled by al- lowing the wdi pin to float. wdo . wdo goes low when a transition does not occur on wdi within 1.6sec, and remains low until a transition occurs on wdi (indicating the watch- dog interrupt has been serviced). wdo also goes low when v cc falls below the reset threshold; how- ever, unlike the reset output, wdo goes high as soon as v cc exceeds the reset threshold. note: for those devices with a wdo output, a watchdog timeout will not trigger reset unless wdo is connected to mr . rst . pulses low for t rec when triggered, and stays low whenever v cc is below the reset threshold or when mr is a logic low. it remains low for t rec after either v cc rises above the reset threshold, the watchdog triggers a reset, or mr goes from low to high. rst. pulses high for t rec when triggered, and stays high whenever v cc is above the reset threshold or when mr is a logic high. it remains high for t rec after either v cc falls below the reset threshold, the watchdog triggers a reset, or mr goes from high to low. pfi. when pfi is less than v pfi , pfo goes low; otherwise, pfo remains high. connect to ground if unused. pfo . when pfi is less than v pfi , pfo goes low; otherwise, pfo remains high. leave open if un- used. table 3. pin description pin name function stm706p stm706t/s/r stm708t/s/r so8 tssop8 so8 tssop8 so8 tssop8 131313mr push-button reset input 6868??wdiwatchdog input 8282??wdo watchdog output ??7171rst active-low reset output 71??82rstactive-high reset output 242424 v cc supply voltage 464646pfipfi power-fail i nput 575757pfo pfo power-fail output 353535 v ss ground ????68ncno co nnect
7/26 stm706t/s/r; stm706p; stm708t/s/r figure 8. block diagram (stm706t/s/r and stm706p) note: 1. for stm706p only. figure 9. block diagram (stm708t/s/r) ai08829 watchdog timer v rst wdi transitional detector compare compare t rec generator v pfi v cc v cc pfi mr wdi rst(rst) (1) pfo wdo ai08830 v rst rst compare compare t rec generator v pfi v cc pfi mr rst pfo v cc
stm706t/s/r; stm706p; stm708t/s/r 8/26 figure 10. hardware hookup note: 1. for stm706t/s/r and stm706p. 2. for stm706p and stm708t/s/r. ai08843 v cc mr pfi 0.1 f stm706t/s/r; stm706p; stm708t/s/r wdi (1) pfo wdo (1) rst (2) rst to microprocessor reset unregulated voltage regulator v cc v in r1 r2 from microprocessor push-button to microprocessor nmi to microprocessor irq
9/26 stm706t/s/r; stm706p; stm708t/s/r operation reset output the stm70x supervisor asserts a reset signal to the mcu whenever v cc goes below the reset threshold (v rst ), a watchdog time-out occurs (if wdo is connected to mr ), or when the push-but- ton reset input (mr ) is taken low. rst is guaran- teed to be a logic low (logic high for stm706p and stm708t/s/r) for v cc < v rst down to v cc =1v for t a = 0c to 85c. during power-up, once v cc exceeds the reset threshold an internal timer keeps rst low for the reset time-out period, t rec . after this interval rst returns high. if v cc drops below the reset threshold, rst goes low. each time rst is asserted, it stays low for at least the reset time-out period (t rec ). any time v cc goes below the reset threshold the internal timer clears. the reset timer starts when v cc returns above the reset threshold. push-button reset input a logic low on mr asserts reset. reset remains asserted while mr is low, and for t rec (see figure 29., page 19 ) after it returns high. the mr input has an internal 40k ? pull-up resistor, allowing it to be left open if not used. this input can be driven with ttl/cmos-logic levels or with open-drain/ collector outputs. connect a normally open mo- mentary switch from mr to gnd to create a man- ual reset function; external debounce circuitry is not required. if mr is driven from long cables or the device is used in a noisy environment, connect a 0.1f capacitor from mr to gnd to provide ad- ditional noise immunity. mr may float, or be tied to v cc when not used. watchdog input (stm706t/s/r and stm706p) the watchdog timer can be used to detect an out- of-control mcu. if the mcu does not toggle the watchdog input (wdi) within t wd (1.6sec), the watchdog output pin (wdo ) is asserted. the in- ternal 1.6sec timer is cleared by either: 1. a reset pulse, or 2. by toggling wdi (high-to-low or low-to-high), which can detect pulses as short as 50ns. see figure 30., page 19 for stm706t/s/r and stm706p. the timer remains cleared and does not count for as long as reset is asserted. as soon as reset is re- leased, the timer starts counting. watchdog output (stm706t/s/r and stm706p) when v cc drops below the reset threshold, wdo will go low even if the wa tchdog timer has not yet timed out. however, unlike the reset output, wdo goes high as soon as v cc exceeds the reset threshold. wdo may be used to generate a reset pulse by connecting it to the mr input. power-fail input/output the power-fail input (pfi) is compared to an inter- nal reference voltage (independent from the v rst comparator). if pfi is less than the power-fail threshold (v pfi ), the power-fail output (pfo ) will go low. this function is intended for use as an un- dervoltage detector to signal a failing power sup- ply. typically pfi is connected through an external voltage divider (see figure 10., page 8 ) to either the unregulated dc input (if it is available) or the regulated output of the v cc regulator. the voltage divider can be set up such that the voltage at pfi falls below v pfi several milliseconds before the regulated v cc input to the stm70x or the micro- processor drops below the minimum operating voltage. if the comparator is unused, pfi should be con- nected to v ss and pfo left unconnected. pfo may be connected to mr on the stm70x so that a low voltage on pfi will generate a reset output. ensuring a valid reset output down to v cc =0v when v cc falls below 1v, the state of the rst out- put can no longer be guaranteed, and becomes essentially an open circuit. if a high value pull- down resistor is added to the rst pin, the output will be held low during this condition. a resistor val- ue of approximately 100k ? will be large enough to not load the output under operating conditions, but still sufficient to pull rst to ground during this low voltage condition (see figure 11 ). figure 11. reset output valid to ground circuit ai08844 stm70x rst r1
stm706t/s/r; stm706p; stm708t/s/r 10/26 interfacing to microprocessors with bi- directional reset pins microprocessors with bi-directional reset pins can contend with the stm70x reset output. for exam- ple, if the reset output is driven high and the micro wants to pull it low, signal contention will result. to prevent this from occurring, connect a 4.7k ? resis- tor between the reset output and the micro?s reset i/o as in figure 12 . figure 12. interfacing to microprocessors with bi-directional reset i/o typical operating characteristics note: typical values are at t a = 25c. figure 13. supply current vs. temperature (no load) ai08845 stm70x rst gnd 4.7k v cc microprocessor rst buffered reset to other system components gnd v cc temperature ( c) supply current (a) ai09141b 0 5 10 15 20 25 30 ?40 ?20 0 20 40 60 80 100 120 v cc = 2.7v v cc = 3.0v v cc = 3.6v v cc = 4.5v v cc = 5.5v
11/26 stm706t/s/r; stm706p; stm708t/s/r figure 14. v pfi threshold vs. temperature figure 15. reset comparator propagation delay vs. temperature temperature ( c) v pfi threshold (v) ai09142b 1.225 1.230 1.235 1.240 1.245 1.250 1.255 1.260 1.265 1.270 ?40 ?20 0 20 40 60 80 100 120 v cc = 2.5v v cc = 3.0v v cc = 3.3v v cc = 3.6v temperature ( c) propagation delay (s) ai09143b 10 12 14 16 18 20 22 24 26 28 30 ?40 ?20 0 20 40 60 80 100 120
stm706t/s/r; stm706p; stm708t/s/r 12/26 figure 16. power-up t rec vs. temperature figure 17. normalized reset threshold vs. temperature ai09144b temperature ( c) t rec (ms) 210 215 220 225 230 235 240 ?40 ?20 0 20 40 60 80 100 120 v cc = 3.0v v cc = 4.5v v cc = 5.5v temperature ( c) normalized reset threshold ai09145b 0.996 0.998 1.000 1.002 1.004 ?40 ?20 0 20 40 60 80 100 120
13/26 stm706t/s/r; stm706p; stm708t/s/r figure 18. watchdog time-out period vs. temperature figure 19. pfi to pfo propagation delay vs. temperature temperature ( c) watchdog time-out period (sec) ai09146b 1.60 1.65 1.70 1.75 1.80 1.85 1.90 ?40 ?20 0 20 40 60 80 100 120 v cc = 3.0v v cc = 4.5v v cc = 5.5v temperature ( c) ai09148b pfi to pfo propagation delay (s) 0.0 1.0 2.0 3.0 4.0 ?40 ?20 0 20 40 60 80 100 120 v cc = 3.0v v cc = 3.6v v cc = 4.5v v cc = 5.5v
stm706t/s/r; stm706p; stm708t/s/r 14/26 figure 20. output voltage vs. load current (v cc = 5v; v bat = 2.8v; t a = 25c) figure 21. output voltage vs. load current (v cc = 0v; v bat = 2.8v; t a = 25c) 4.94 4.96 4.98 5.00 0 1020304050 i out (ma) v out (v) ai10496 2.66 2.68 2.70 2.72 2.74 2.76 2.78 2.80 0.0 0.2 0.4 0.6 0.8 1.0 i out (ma) v out (v) ai10497
15/26 stm706t/s/r; stm706p; stm708t/s/r figure 22. r st output voltage vs. supply voltage figure 23. rst output voltage vs. supply voltage v rst (v) v cc (v) ai09149b 0 1 2 3 4 5 0 1 2 3 v rst v cc 4 5 500ms/div v rst (v) v cc (v) ai09150b 0 1 2 3 4 5 0 1 2 3 4 5 v rst v cc 500ms/div
stm706t/s/r; stm706p; stm708t/s/r 16/26 figure 24. power-fail comparator response time (assertion) figure 25. power-fail comparator response time (de-assertion) 5v 1.3v pfi 1v/div 0v 500mv/div 0v 500ns/div ai09153b pfo ai09154b 5v 1.3v pfi 1v/div 0v 500mv/div 0v 500ns/div pfo
17/26 stm706t/s/r; stm706p; stm708t/s/r figure 26. maximum transient duration vs. reset threshold overdrive maximum rating stressing the device above the rating listed in the absolute maximum ratings? table may cause per- manent damage to the device. these are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not im- plied. exposure to absolute maximum rating con- ditions for extended periods may affect device reliability. refer also to the stmicroelectronics sure program and other relevant quality docu- ments. table 4. absolute maximum ratings note: 1. reflow at peak temperature of 255c to 260c for < 30 seconds (total thermal budget not to exceed 180c for between 90 t o 150 seconds). reset comparator overdrive, v rst ? v cc (v) reset occurs above the curve. transient duration (s) ai09156b 0 1000 2000 3000 4000 5000 6000 0.001 0.01 0.1 1 10 symbol parameter value unit t stg storage temperature (v cc off) ?55 to 150 c t sld (1) lead solder temperature for 10 seconds 260 c v io input or output voltage ?0.3 to v cc +0.3 v v cc supply voltage ?0.3 to 7.0 v i o output current 20 ma p d power dissipation 320 mw
stm706t/s/r; stm706p; stm708t/s/r 18/26 dc and ac parameters this section summarizes the operating measure- ment conditions, and the dc and ac characteris- tics of the device. the parameters in the dc and ac characteristics tables that follow, are derived from tests performed under the measurement conditions summarized in table 5 , operating and ac measurement conditions. designers should check that the operating conditions in their circuit match the operating conditions when relying on the quoted parameters. table 5. operating and ac measurement conditions figure 27. ac testing input/output waveforms figure 28. power-fail comparator waveform parameter stm70x unit v cc supply voltage 1.0 to 5.5 v ambient operating temperature (t a ) ?40 to 85 c input rise and fall times 5ns input pulse voltages 0.2 to 0.8v cc v input and output timing ref. voltages 0.3 to 0.7v cc v ai02568 0.8v cc 0.2v cc 0.7v cc 0.3v cc ai08860a v cc v rst trec rst pfo
19/26 stm706t/s/r; stm706p; stm708t/s/r figure 29. mr timing waveform note: 1. rst for stm706p and stm708t/s/r. figure 30. watchdog timing (stm706t/s/r and stm706p) table 6. dc and ac characteristics sym alter- native description test condition (1) min typ max unit v cc operating voltage 1.2 (2) 5.5 v i cc v cc supply current v cc < 3.6v 35 50 a v cc < 5.5v 40 60 a i li input leakage current (wdi) 0v = v in = v cc ?1 +1 a input leakage current (pfi) 0v = v in = v cc ?25 2 +25 na input leakage current (mr ) v rst (max) < v cc < 3.6v 25 80 250 a 4.5v < v cc < 5.5v 75 125 300 a v ih input high voltage (mr ) 4.5v < v cc < 5.5v 2.0 v v rst (max) < v cc < 3.6v 0.7v cc v v ih input high voltage (wdi) v rst (max) < v cc < 5.5v 0.7v cc v v il input low voltage (mr ) 4.5v < v cc < 5.5v 0.8 v v rst (max) < v cc < 3.6v 0.6 v v il input low voltage (wdi) v rst (max) < v cc < 5.5v 0.3v cc v ai07837a rst (1) mr tmlrl trec tmlmh ai08833 rst wdo wdi v cc trec twd
stm706t/s/r; stm706p; stm708t/s/r 20/26 note: 1. valid for ambient operating temperature: t a = ?40 to 85c; v cc = v rst (max) to 5.5v (except where noted). 2. v cc (min) = 1.0v for t a = 0c to +85c. 3. for v cc falling. v ol output low voltage (pfo , rst , rst, wdo ) v cc = v rst (max), i sink = 3.2ma 0.3 v v ol output low voltage (rst ) i sink = 50a, v cc = 1.0v, t a = 0c to 85c 0.3 v i sink = 100a, v cc = 1.2v 0.3 v v oh output high voltage (rst , rst, wdo ) i source = 1ma, v cc = v rst (max) 2.4 v output high voltage (pfo ) i source = 75a, v cc = v rst (max) 0.8v cc v power-fail comparator v pfi pfi input threshold pfi falling (stm70xp/r, v cc = 3.0v; stm70xs/t, v cc = 3.3v) 1.20 1.25 1.30 v t pfd pfi to pfo propagation delay 2 s reset thresholds v rst reset threshold (3) stm706p/70xr 2.55 2.63 2.70 v stm70xs 2.85 2.93 3.00 v stm70xt 3.00 3.08 3.15 v reset threshold hysteresis 20 mv t rec rst pulse width 140 200 280 ms push-button reset input t mlmh t mr mr pulse width v rst (max) < v cc < 3.6v 500 ns 4.5v < v cc < 5.5v 150 ns t mlrl t mrd mr to rst output delay v rst (max) < v cc < 3.6v 750 ns 4.5v < v cc < 5.5v 250 ns watchdog timer (stm706t/s/r and stm706p) t wd watchdog timeout period stm706p/70xr, v cc = 3.0v 1.12 1.60 2.24 s stm70xs/70xt, v cc = 3.3v wdi pulse width 4.5v < v cc < 5.5v 50 ns v rst (max) < v cc < 3.6v 100 ns sym alter- native description test condition (1) min typ max unit
21/26 stm706t/s/r; stm706p; stm708t/s/r package mechanical figure 31. so8 ? 8-lead plastic small outline, 150 mils body width, package mechanical note: drawing is not to scale. table 7. so8 ? 8-lead plastic small outline, 150 mils body width, package mechanical data symb mm inches typ min max typ min max a ? 1.35 1.75 ? 0.053 0.069 a1 ? 0.10 0.25 ? 0.004 0.010 b ? 0.33 0.51 ? 0.013 0.020 c ? 0.19 0.25 ? 0.007 0.010 d ? 4.80 5.00 ? 0.189 0.197 ddd ? ?0.10? ?0.004 e ? 3.80 4.00 ? 0.150 0.157 e1.27? ?0.050? ? h ? 5.80 6.20 ? 0.228 0.244 h ? 0.25 0.50 ? 0.010 0.020 l ? 0.40 0.90 ? 0.016 0.035 ?08?08 n8 8 so-a e 8 ddd b e a d c l a1 1 h h x 45? a2
stm706t/s/r; stm706p; stm708t/s/r 22/26 figure 32. tssop8 ? 8-lead, thin shrink small outline, 3x3mm body size, outline note: drawing is not to scale. table 8. tssop8 ? 8-lead, thin shrink small outline, 3x3mm body size, mechanical data symb mm inches typ min max typ min max a ? ?1.10? ?0.043 a1 ? 0.05 0.15 ? 0.002 0.006 a2 0.85 0.75 0.95 0.034 0.030 0.037 b ? 0.25 0.40 ? 0.010 0.016 c ? 0.13 0.23 ? 0.005 0.009 cp ? ? 0.10 ? ? 0.004 d 3.00 2.90 3.10 0.118 0.114 0.122 e0.65? ?0.026? ? e 4.90 4.65 5.15 0.193 0.183 0.203 e1 3.00 2.90 3.10 0.118 0.114 0.122 l 0.55 0.40 0.70 0.022 0.016 0.030 l1 0.95 ? ? 0.037 ? ? ?06?06 n8 8 tssop8bm 1 8 cp c l e e1 d a2 a e b 4 5 a1 l1
23/26 stm706t/s/r; stm706p; stm708t/s/r part numbering table 9. ordering information scheme for other options, or for more information on any aspect of this device, please contact the st sales office nearest you. example: stm706 t m 6 e device type stm706 stm708 reset threshold voltage t: 3.00v v rst 3.15v s: 2.88v v rst 3.00v r, stm706p: 2.59v v rst 2.70v package m = so8 ds = tssop8 temperature range 6 = ?40 to 85c shipping method e = tubes f = tape & reel
stm706t/s/r; stm706p; stm708t/s/r 24/26 table 10. marking description part number reset threshold package topside marking stm706p 2.63v so8 706p tssop8 stm706t 3.08v so8 706t tssop8 stm706s 2.93v so8 706s tssop8 stm706r 2.63v so8 706r tssop8 stm708t 3.08v so8 708t tssop8 stm708s 2.93v so8 708s tssop8 stm708r 2.63v so8 708r tssop8
25/26 stm706t/s/r; stm706p; stm708t/s/r revision history table 11. document revision history date version revision details october 2003 1.0 first issue 12-dec-03 2.0 reformatted; update characteristics (figure 2 , 3 , 8 , 9 , 10 , 28 , 29 , 30 ; table 6 , 7, 8 , 9 ) 16-jan-04 2.1 add typical operating characteristics (figure 13 , 14 , 15 , 16 , 17 , 18 , 19 , 22 , 23 , 24 , 25 , 26 ) 09-apr-04 3.0 reformatted; update characteristics (figure 15 , 19 , 22 , 23 , 26 ; table 6 ) 25-may-04 4.0 update characteristics (table 3 , 6 ) 02-jul-04 5.0 datasheet promoted; waveform corrected (figure 28 ) 21-sep-04 6.0 clarify root part numbers; (figure 2 , 3 , 4 , 5 , 6 , 7 , 8 , 9 , 10 , 30 ; table 1 , 3 , 6 , 9 ) 25-feb-05 7.0 update typical characteristics (figure 13 , 14 , 15 , 16 , 17 , 18 , 19 , 20 , 21 , 22 , 23 , 24 , 25 , 26 )
stm706t/s/r; stm706p; stm708t/s/r 26/26 information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the co nsequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this publicati on are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics prod ucts are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectro nics. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners ? 2005 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com

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