1 ps8717 12/15/03 features ? low on-resistance: 0.4? max (+2.7v supply) ? 0.1? max. on-resistance flatness at +25c ? fast switching: 10ns max. ? +1.5v to +3.6v single-supply operation ? ttl/cmos-logic compatible ? C25db off-isolation at 100khz ? 1na max. off-leakage at +25c ? packaging (pb-free available): C 5-pin small compact sot-23 C 6-contact ultra compact thin dual in-line flat no lead tdfn applications ? cellular phones ? communications circuits ? battery-operated equipment ? dsl modems ? audio and video signal routing ? pcmcia cards description PI3A4629 is a single-pole/single-throw (spst) normally open (no) analog switch that operates from a single +1.5v to +3.6v supply. the switch has 0.4? max on-resistance (r on ), with 0.1? max r on fatness over the analog signal range when powered from a +3.0v supply. leakage currents are less than 2na and fast switch - ing times are less than 10ns. to minimize pc board area use, the device is available in the ultra compact tdfn and the small compact sot-23 packages. the PI3A4629 pinout is optimized for the highest package off- isolation available. functional block diagrams/pin confgurations top views switches shown for logic 0 input PI3A4629 3.0v, sot iny ? single-supply 0.4? spst (no) cmos analog switch pin description note: no and com pins are identical and interchangeable. any pin may be considered as an input or an output; signals pass. truth table com no gnd 1 2 3 5 4 v cc in sot23 in com gnd 1 2 3 6 4 v cc no 5 n.c. tdfn n.c. = no internal connection tdfn sot-23 name function 2 2 com analog switch, common 4 4 no analog switch, normally open 3 3 gnd ground 1 1 in digital control input 6 5 v cc positive supply voltage 5 - n.c. no internal connection input switch state low off high on
PI3A4629 3.0v, sot iny ? single-supply 0.4? spst (no) cmos analog switch 2 ps8717 12/15/03 caution : stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress only rating and operation of the device at these or any other conditions beyond those indicated in the operational sections of this specifcation is not implied. absolute maximum ratings voltages referenced to nd v cc ............................................................... ....... 0.5v to +3.6v v in , v com , v nc , v no (note 1) .................. 0.5v to v cc +0.3v or 30ma, whicheer occurs frst current (any terminal) ..................................................... 200ma peak current, com, no, nc (pulsed at 1ms, 10 duty cycle) ..................................... 400ma note 1: signals on nc, no, com, or in exceeding v cc or nd are clamped by internal diodes. limit forward diode current to thermal information continuous power dissipation sot-23 (derate .1m/oc aboe +0oc) ........................... 0.5 storage temperature ........................................ 65oc to +150oc lead temperature (soldering, 10s) ................................. +300oc electrical specifcations - single +3.3v supply (v cc +3.3v 10, nd 0v, v i 1.4v, v il 0.5v) description parameters test conditions temp.(c) min. (1) typ. (2) max. (1) units analog switch analog signal range (3) v analo full 0 v cc v on resistance r on v cc 2.v, i com 100ma, v no or v nc 1.5v 25 0.4 ? full 0.4 on-resistance match between channels (4) r on 25 0.05 full 0.06 on-resistance flat - ness (5) r flat(on) v cc 2.v, i com 100ma, v no or v nc 0.8v, 2.0v 25 0.1 full 0.1 no or nc off leakage current (6) i com(off) or i nc(off) v cc 3.3v, v com 0v, v no or v nc +2.0v 25 1 1 na full 20 10 com on leakage cur - rent (6) i com(on) v cc 3.3v, v com +2.0v v no or v nc + 2.0v 25 2 2 full 20 20
PI3A4629 3.0v, sot iny ? single-supply 0.4? spst (no) cmos analog switch 3 ps8717 12/15/03 electrical specifcations - single +3.3v supply (continued) (v cc = + 3.3v 10%, gnd = 0v, v ih = 1.4 v, v il = 0.5v) notes: 1. the algebraic convention, where most negative value is a minimum and most positive is a maximum, is used in this data sheet. 2. typical values are for design aid only, not guaranteed or subject to production testing. 3. guaranteed by design. 4. r on = r on max. - r on min. 5. flatness is defned as the difference between the maximum and minimum value of on-resistance measured. 6. leakage parameters are 100% tested at maximum rated hot temperature and guaranteed by correlation at +25oc. 7. off isolation = 20log 10 [ v com / (v no or v nc ) ]. see figure 3. description parameters test conditions temp (oc) min. (1) typ. (2) max. (1) units logic input input high voltage v ih guaranteed logic high level full 1.4 v input low voltage v il guaranteed logic low level 0.5 input current with volt - age high i inh v in = 1.4v, all others = 0.5v C1 1 a input current with volt - age low i inl v in = 0.5v, all other = 1.4v C1 1 dynamic turn-on time t on v cc = 3.3v, v no or v nc = 2.0v, figure 1 25 10 ns full 10 turn-off time t off 25 10 full 10 charge injection (3) q c l = 1nf, v gen = 0v, r gen = 0?, figure 2 25 50 pc off isolation (7) o irr rl = 50?, f = 100 khz, figure 3 -25 db nc or no capacitance c (off) f = 1mhz, figure 4 130 pf com off capacitance c com(off) 130 com on capacitance c com(on) f = 1mhz, figure 4 270 supply power-supply range v cc full 1.5 3.6 v positve supply current i cc v cc = 3.6v, v in = 0v or v cc 100 na
PI3A4629 3.0v, sot iny ? single-supply 0.4? spst (no) cmos analog switch 4 ps8717 12/15/03 electrical specifcations - single +2.5v supply (v cc = +2.5v 10%, gnd = 0v, v ih = 1.4v, v il = 0.5v) notes: 1. the algebraic convention, where most negative value is a minimum and most positive is a maximum, is used in this data sheet. 2. typical values are for design aid only, not guaranteed or subject to production testing. 3. guaranteed by design. 4. r on = r on max. - r on min. 5. flatness is defned as the difference between the maximum and minimum value of on-resistance measured. description parameters test conditions temp.(c) min. (1) typ. (2) max. (1) units analog switch analog signal range (3) v analog 0 v cc v on resistance r on v cc = 2.5v, i com = C8ma, v no or v nc = 1.8v 25 0.4 ? full 0.4 on-resistance match between channels (4) ?r on v cc = 2.5v, i com = C8ma, v no or v nc = 0.8v,1.8v 25 0.05 full 0.06 on-resistance flatness (5) r flat(on) 25 0.1 full 0.1 dynamic turn-on time t on v cc = 2.5v, v no or v nc = 1.8v, figure 1 25 10 ns full 15 turn-off time t off 25 10 full 10 charge injection (3) q c l = 1nf, v gen = 0v, r gen = 0v, figure 2 25 42 pc logic input input high voltage v ih guaranteed logic high level full 1.4 v input low voltage v il guaranteed logic low level full 0.5 input high current i inh v in = 1.4v, all others = 0.5v full C1 1 a input high current i inl v in = 0.5v, all others = 1.4v full C1 1
PI3A4629 3.0v, sot iny ? single-supply 0.4? spst (no) cmos analog switch 5 ps8717 12/15/03 electrical specifcations - single +1.8v supply (v cc = +1.8v 10%, gnd = 0v, v ih = 1.4v, v il = 0.5v) notes: 1. the algebraic convention, where most negative value is a minimum and most positive is a maximum, is used in this data sheet. 2. typical values are for design aid only, not guaranteed or subject to production testing. 3. guaranteed by design. 4. r on = r on max. - r on min. 5. flatness is defned as the difference between the maximum and minimum value of on-resistance measured. description parameters test conditions temp.(c) min. (1) typ. (2) max. (1) units analog switch analog signal range (3) v analog 0 v cc v on-resistance r on v cc = 1.8v, i com = C4ma, v no or v nc = 1.5v 25 0.4 ? full 0.8 on-resistance match between channels (4) ?r on v cc = 1.8v, i com = C4ma, v no or v nc = 0.8v,1.5v 25 0.05 full 0.06 on-resistance flat - ness (5) r flat(on) 25 0.4 full 0.6 dynamic turn-on time t on v cc = 1.8v, v no or v nc = 1.5v, figure 1 25 15 ns full 15 turn-off time t off 25 10 full 15 charge injection (3) q c l = 1nf, v gen = 0v, r gen = 0v, figure 2 25 29 pc logic input input high voltage v ih guaranteed logic high level full 1.4 v input low voltage v il guaranteed logic low level full 0.5 input high current i inh v in = 1.4v, all others = 0.5v full C1 1 a input high current i inl v in = 0.5v, all others = 1.4v full C1 1
PI3A4629 3.0v, sot iny ? single-supply 0.4? spst (no) cmos analog switch 6 ps8717 12/15/03 test circuits/timing diagrams figure 1. switching time figure 2. charge injection figure 3. off isolation v cc v cc no gnd com +3v* logic input in t r <20ns t f <20ns v out = v no r l r l + r on ( ) c l includes fixture and stray capacitance v out v out r l 50ohm c l 35pf logic input waveforms inverted for switches that have opposite logic * 1.5v for 3.3v supply t of f t on 90% 90% logic input switch output v inh v inl 0v 50% switch input ? v out v out v out v gen logic input off off off on on in in com in gnd v cc .1f v cc no off q = ( ? v out )(c l ) c l 1nf v cc +3.3v analyzer in 10nf no com 0v to 2.4v or 0v to 2v gnd 50 ? 50 ? figure 4. channel on/off capacitance capacitance meter com in 10nf gnd f = 1 mhz no +3.3v v cc 0v to 2.4v or 0v to 2v
PI3A4629 3.0v, sot iny ? single-supply 0.4? spst (no) cmos analog switch 7 ps8717 12/15/03 packaging mechanical: 5-pin sot-23 (t) package .102 .1 18 ? bsc 0.60 1 2 3 .000 .005 0.00 0.15 .014 .019 0.35 0.50 ? 5 4 1.50 1.75 .059 .068 0.10 .023 .004 1.45 ? max. sea ting plane .057 0o - 10o 1.90 ? .075 .037 bsc 2.60 3.00 0.95 .1 10 .1 18 2.80 3.00 x.xx x.xx datum "a" denotes dimensions in milimeters packaging mechanical: 6-pin tdfn (zc) package 0.0 - 0.05 0.20 ref . 2.00 0.10 2.30 0.10 0.40 0.10 1.40 0.10 2.00 0.10 2.30 0.10 bottom vie w side vie ws t op vie w 0.80 max. 0.0 - 0.05 0.80 max. 0.30 0.05 0.65 bsc pin #1 pin #1 0.90 0.10
PI3A4629 3.0v, sot iny ? single-supply 0.4? spst (no) cmos analog switch 8 ps8717 12/15/03 pericom semiconductor corporation ? 1-800-435-2336 ? http://www.pericom.com ordering information notes: 1. thermal characteristics can be found on the company web site at http://www .pericom.com/packaging/ 2. x = tape/reel order code package code package type package top mark PI3A4629tx t 5-pin small compact sot-23 za PI3A4629tex t pb-free & green, 5-pin small compact sot-23 za PI3A4629zcex zc pb-free & green, 6-contact ultra compact tdfn za
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