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1 lt1969 dual 700mhz, 200ma, adjustable current operational amplifier n 700mhz gain bandwidth n 200ma minimum i out n adjustable quiescent current n low distortion: C72dbc at 1mhz, 4v p-p , 25 w , a v = 2 n stable in a v 3 10, simple compensation for a v < 10 n 4.3v minimum output swing, v s = 6v, r l = 25 w n stable with 1000pf load n 6nv/ ? hz input noise voltage n 2pa/ ? hz input noise current n 4mv maximum input offset voltage n 4 m a maximum input bias current n 400na maximum input offset current n 4.5v minimum input cmr, v s = 6v n specified at 6v, 2.5v the lt ? 1969 is an adjustable current version of the popular lt1886, a 200ma minimum output current, dual op amp with outstanding distortion performance. the adjustable current feature is highly desirable in applica- tions where minimum power dissipation is required while still being able to provide adequate line termination. at nominal supply current, the amplifiers are gain of 10 stable and can easily be compensated for lower gains. the lt1969 features balanced high impedance inputs with 4 m a input bias current and 4mv maximum input offset voltage. single supply applications are easy to implement and have lower total noise than current feedback amplifier implementations. the output drives a 25 w load to 4.3v with 6v supplies. on 2.5v supplies, the output swings 1.5v with a 100 w load. the amplifier is stable with a 1000pf capacitive load making it useful in buffer and cable driver applications. the lt1969 is manufactured on linear technologys advanced low voltage complementary bipolar process and is available in a thermally enhanced ms10 package n dsl modems n xdsl pci cards n usb modems n line drivers single 12v supply adsl modem line driver adsl modem line driver distortion , ltc and lt are registered trademarks of linear technology corporation. + 1/2 lt1969 12.4 1:2* 12v 909 100 100 20k 10k in in + 10k 20k 1 f 1 f 0.1 f 0.1 f + 1/2 lt1969 12.4 1969 ta01a 909 100 13k *coilcraft x8390-a or equivalent 6 49.9k standby on i q on = 14ma i q low power = 2ma i q standby = 600 a logic output ctrl1 ctrl2 7 standby low power on line voltage (v p-p ) 0 harmonic distortion (dbc) ?0 ?0 ?0 ?0 100 1969 ta01b 2 4 6 8 10 12 14 16 v s = 12v a v = 10 f = 200khz 100 line 1:2 transformer hd2 hd3 features descriptio u applicatio s u typical applicatio u
2 lt1969 wu u package / o rder i for atio lt1969cms t jmax = 150 c, q ja = 110 c/w (note 4) order part number electrical characteristics the l denotes specifications which apply over the full operating temp- erature range, otherwise specifications are at t a = 25 c. v s = 6v, v cm = 0v, nominal mode with a 13k resistor from ctrl1 to v C and a 49.9k resistor from ctrl2 to v C , pulse power tested unless otherwise noted. (note 9) symbol parameter conditions min typ max units v os input offset voltage (note 5) 1 4 mv l 5mv input offset voltage drift (note 8) l 317 m v/ c i os input offset current 150 400 na l 600 na i b input bias current 1.5 4 m a l 6 m a e n input noise voltage f = 10khz 6 nv/ ? hz i n input noise current f = 10khz 2 pa/ ? hz r in input resistance v cm = 4.5v 5 10 m w differential 35 k w c in input capacitance 2pf input voltage range (positive) l 4.5 5.9 v input voltage range (negative) l C 5.2 C 4.5 v cmrr common mode rejection ratio v cm = 4.5v l 77 98 db minimum supply voltage guaranteed by psrr l 2v psrr power supply rejection ratio v s = 2v to 6.5v 80 86 db l 78 db a vol large-signal voltage gain v out = 4v, r l = 100 w 5.0 12 v/mv l 4.5 v/mv v out = 4v, r l = 25 w 4.5 12 v/mv l 4.0 v/mv v out output swing r l = 100 w , 10mv overdrive 4.85 5 v l 4.70 v r l = 25 w , 10mv overdrive 4.30 4.6 v l 4.10 v i out = 200ma, 10mv overdrive 4.30 4.5 v l 4.10 v ms10 part marking lttn absolute m axi m u m ratings w ww u (note 1) total supply voltage (v + to v C ) ........................... 13.2v input current (note 2) ....................................... 10ma input voltage (note 2) ............................................ v s maximum continuous output current (note 3) dc ............................................................... 100ma ac ............................................................... 300ma operating temperature range (note 10) C 40 c to 85 c specified temperature range (note 9) .. C 40 c to 85 c maximum junction temperature ......................... 150 c storage temperature range ................ C 65 c to 150 c lead temperature (soldering, 10 sec)................. 300 c consult factory for parts specified with wider operating temperature ranges. 1 2 3 4 5 v + outa ?na +ina v 10 9 8 7 6 outb ?nb +inb ctrl2 ctrl1 top view ms10 package 10-lead plastic msop
3 lt1969 electrical characteristics the l denotes specifications which apply over the full operating temp- erature range, otherwise specifications are at t a = 25 c. v s = 6v, v cm = 0v, nominal mode with a 13k resistor from ctrl1 to v C and a 49.9k resistor from ctrl2 to v C , pulse power tested unless otherwise noted. (note 9) symbol parameter conditions min typ max units i sc short-circuit current (sourcing) (note 3) 700 ma short-circuit current (sinking) 500 ma sr slew rate a v = C10 (note 6) 100 200 v/ m s full power bandwidth 4v peak (note 7) 8 mhz gbw gain bandwidth f = 1mhz 700 mhz t r , t f rise time, fall time a v = 10, 10% to 90% of 0.1v, r l = 100 w 4ns overshoot a v = 10, 0.1v, r l = 100 w 1% propagation delay a v = 10, 50% v in to 50% v out , 0.1v, r l = 100 w 2.5 ns t s settling time 6v step, 0.1% 50 ns harmonic distortion hd2, a v = 10, 2v p-p , f = 1mhz, r l = 100 w /25 w C75/C63 dbc hd3, a v = 10, 2v p-p , f = 1mhz, r l = 100 w /25 w C85/C71 dbc imd intermodulation distortion a v = 10, f = 0.9mhz, 1mhz, 14dbm, r l = 100 w /25 w C81/C80 dbc r out output resistance a v = 10, f = 1mhz 0.1 w i s supply current per amplifier 7 8.25 ma l 8.50 ma ctrl1 voltage 13k to v C , measured with respect to v C 0.77 0.97 1.25 v l 0.74 1.30 v ctrl2 voltage 49.9k to v C , measured with respect to v C 0.87 1.05 1.18 v l 0.80 1.25 v minimum supply current per amplifier; ctrl1, ctrl2 open 300 800 m a l 1100 m a maximum supply current per amplifier; ctrl1 or ctrl2 shorted to v C 13 ma the l denotes specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25 c. v s = 2.5v, v cm = 0v, nominal mode with a 13k resistor from ctrl1 to v C and a 49.9k resistor from ctrl2 to v C , pulse power tested unless otherwise noted. (note 9) symbol parameter conditions min typ max units v os input offset voltage (note 5) 1.5 5 mv l 6mv input offset voltage drift (note 8) l 517 m v/ c i os input offset current 100 350 na l 550 na i b input bias current 1.2 3.5 m a l 5.5 m a e n input noise voltage f = 10khz 6 nv/ ? hz i n input noise current f = 10khz 2 pa/ ? hz r in input resistance v cm = 1v 10 20 m w differential 50 k w c in input capacitance 2pf input voltage range (positive) l 1 2.4 v input voltage range (negative) l C1.7 C1 v cmrr common mode rejection ratio v cm = 1v l 75 91 db
4 lt1969 electrical characteristics the l denotes specifications which apply over the full operating temp- erature range, otherwise specifications are at t a = 25 c. v s = 2.5v, v cm = 0v, nominal mode with a 13k resistor from ctrl1 to v C and a 49.9k resistor from ctrl2 to v C , pulse power tested unless otherwise noted. (note 9) symbol parameter conditions min typ max units note 1: absolute maximum ratings are those values beyond which the life of a device may be impaired. note 2: the inputs are protected by back-to-back diodes. if the differential input voltage exceeds 0.7v, the input current should be limited to less than 10ma. note 3: a heat sink may be required to keep the junction temperature below absolute maximum. note 4: thermal resistance varies depending upon the amount of pc board metal attached to the device. q ja is specified for a 2500mm 2 test board covered with 2 oz copper on both sides. note 5: input offset voltage is exclusive of warm-up drift. note 6: slew rate is measured between 2v on a 4v output with 6v supplies, and between 1v on a 1.5v output with 2.5v supplies. falling slew rate is guaranteed by correlation to rising slew rate. note 7: full power bandwidth is calculated from the slew rate: fpbw = sr/2 p v p . note 8: this parameter is not 100% tested. note 9: the lt1969c is guaranteed to meet specified performance from 0 c to 70 c. the lt1969c is designed, characterized and expected to meet specified performance from C40 c to 85 c but is not tested or qa sampled at these temperatures. note 10: the lt1969c is guaranteed functional over the operating temperature range of C40 c to 85 c. a vol large-signal voltage gain v out = 1v, r l = 100 w 5.0 10 v/mv l 4.5 v/mv v out = 1v, r l = 25 w 4.5 10 v/mv l 4.0 v/mv v out output swing r l = 100 w , 10mv overdrive 1.50 1.65 v l 1.40 v r l = 25 w , 10mv overdrive 1.35 1.50 v l 1.25 v i out = 200ma, 10mv overdrive 0.87 1 v l 0.80 v i sc short-circuit current (sourcing) (note 3) 500 ma short-circuit current (sinking) 400 ma sr slew rate a v = C10 (note 6) 50 100 v/ m s full power bandwidth 1v peak (note 7) 16 mhz gbw gain bandwidth f = 1mhz 530 mhz t r , t f rise time, fall time a v = 10, 10% to 90% of 0.1v, r l = 100 w 7ns overshoot a v = 10, 0.1v, r l = 100 w 5% propagation delay a v = 10, 50% v in to 50% v out , 0.1v, r l = 100 w 5ns harmonic distortion hd2, a v = 10, 2v p-p , f = 1mhz, r l = 100 w /25 w C75/C 64 dbc hd3, a v = 10, 2v p-p , f = 1mhz, r l = 100 w /25 w C 80/C 66 dbc imd intermodulation distortion a v = 10, f = 0.9mhz, 1mhz, 5dbm, r l = 100 w /25 w C 77/C 85 dbc r out output resistance a v = 10, f = 1mhz 0.2 w channel separation v out = 1v, r l = 25 w 82 92 db l 80 db i s supply current per amplifier 5 6.00 ma l 6.25 ma ctrl1 voltage 13k to v C , measured with respect to v C 0.77 0.95 1.25 v l 0.74 1.30 v ctrl2 voltage 49.9k to v C , measured with respect to v C 0.87 1.03 1.18 v l 0.80 1.25 v minimum supply current per amplifier; ctrl1, ctrl2 open 250 650 m a l 750 m a maximum supply current per amplifier; ctrl1 or ctrl2 shorted to v C 11.5 ma
5 lt1969 input noise spectral density typical perfor a ce characteristics uw supply current vs temperature input common mode range vs supply voltage input bias current vs input common mode voltage 13k resistor from ctrl1 to v C and a 49.9k resistor from ctrl2 to v C total supply voltage (v) 0 2 4 6 8 10 12 14 common mode range (v) 1969 g02 v + 0.1 0.2 0.3 1.5 1.0 0.5 v t a = 25 c ? v os > 1mv input common mode voltage (v) ? ? 2 ? 0 4 6 input bias current ( a) 1969 g03 3.0 2.5 2.0 1.5 1.0 0.5 0 t a = 25 c i b = (i b + + i b )/2 v s = 6v v s = 2.5v frequency (hz) 10 1 input voltage noise (nv/ hz) 10 100 input current noise (pa/ hz) 10 1 100 1k 100k 100 10k 1969 g04 e n t a = 25 c a v = 101 i n temperature ( c) ?0 0 supply current, both amplifiers (ma) 2 6 8 10 20 14 0 50 75 1969 g01 4 16 18 12 ?5 25 100 125 v s = 6v v s = 2.5v input bias current vs temperature temperature ( c) ?0 2.0 2.5 3.5 25 75 1969 g43 1.5 1.0 ?5 0 50 100 125 0.5 0 3.0 input bias current ( a) i b = (i b + ?i b )/2 v s = 6v v s = 2.5v output saturation voltage vs temperature temperature ( c) ?0 ?.5 ?.0 v + 25 75 1969 g44 1.5 1.0 ?5 0 50 100 125 0.5 v 0.5 output saturation voltage (v) 200ma 200ma 150ma r l = 100 r l = 100 v s = 6v 150ma output saturation voltage vs temperature temperature ( c) ?0 ?.5 ?.0 v + 25 75 1969 g45 1.5 1.0 ?5 0 50 100 125 0.5 v 0.5 output saturation voltage (v) 200ma 200ma 150ma r l = 100 r l = 100 v s = 2.5v 150ma settling time vs output step settling time (ns) 02040 10 30 50 60 output step (v) 1886 g05 6 4 2 0 ? ? ? v s = 6v 10mv 1mv 10mv 1mv output short-circuit current vs temperature temperature ( c) ?0 0 output short-circuit current (ma) 100 300 400 500 1000 700 0 50 75 1969 g46 200 800 900 600 ?5 25 100 125 source v s = 6v source v s = 2.5v sink v s = 2.5v sink v s = 6v
6 lt1969 frequency response vs supply voltage, a v = C10 frequency response vs supply voltage, a v = 2 frequency response vs supply voltage, a v = C1 frequency response vs capacitive load power supply rejection vs frequency typical perfor a ce characteristics uw 13k resistor from ctrl1 to v C and a 49.9k resistor from ctrl2 to v C frequency (hz) gain (db) 1m 100m 1g 1969 g10 10m 23 22 21 20 19 18 17 16 15 14 13 v s = 6v t a = 25 c a v = 10 r l = 100 v s = 2.5v frequency (hz) gain (db) 1m 100m 1g 1969 g11 10m 9 8 7 6 5 4 3 2 1 0 ? v s = 6v t a = 25 c a v = 2 r l = 100 r f = r g = 1k r c = 124 c c = 100pf see figure 3 v s = 2.5v frequency (hz) gain (db) 1m 100m 1g 1969 g12 10m 3 2 1 0 ? ? ? ? ? ? ? v s = 6v t a = 25 c a v = 1 r l = 100 r f = r g = 1k r c = 124 c c = 100pf see figure 2 v s = 2.5v frequency (hz) gain (db) 1m 100m 1g 1969 g13 10m 38 35 32 29 26 23 20 17 14 11 8 v s = 6v t a = 25 c a v = 10 no r l 1000pf 500pf 200pf 100pf 50pf frequency (hz) power supply rejection (db) 100k 10m 100m 1969 g14 1m 100 90 80 70 60 50 40 30 20 10 0 (+) supply v s = 6v a v = 10 (? supply gain and phase vs frequency gain bandwidth vs supply voltage output impedance vs frequency frequency (hz) 1m gain (db) 80 70 60 50 40 30 20 10 0 ?0 ?0 phase (deg) 100 80 60 40 20 0 ?0 ?0 ?0 ?0 100 10m 100m 1g 1969 g06 t a = 25 c a v = 10 r l = 100 v s = 6v v s = 2.5v v s = 6v phase gain v s = 2.5v total supply voltage (v) 0 gain bandwidth (mhz) 1969 g07 2 4 6 8 10 12 14 800 700 600 500 400 300 t a = 25 c a v = 10 r l = 100 r l = 25 r l = 1k frequency (hz) 1 0.1 output impedance ( ) 10 100k 10m 100m 1969 g08 0.01 1m 100 a v = 100 a v = 10 frequency response vs supply voltage, a v = 10 frequency (hz) gain (db) 1m 100m 1g 1969 g09 10m 23 22 21 20 19 18 17 16 15 14 13 v s = 6v t a = 25 c a v = 10 r l = 100 v s = 2.5v
7 lt1969 harmonic distortion vs resistive load harmonic distortion vs resistive load harmonic distortion vs output swing, a v = 10, v s = 6v harmonic distortion vs output swing, a v = 10, v s = 2.5v harmonic distortion vs output swing, a v = 2, v s = 6v typical perfor a ce characteristics uw 13k resistor from ctrl1 to v C and a 49.9k resistor from ctrl2 to v C load resistance ( ) distortion (dbc) 1 100 1k 1969 g19 10 0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 100 t a = 25 c v s = 6v a v = 10 2v p-p out f = 1mhz 2nd 3rd load resistance ( ) distortion (dbc) 1 100 1k 1969 g20 10 0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 100 t a = 25 c v s = 2.5v a v = 10 2v p-p out f = 1mhz 2nd 3rd output voltage (v p-p ) distortion (dbc) 024681012 1969 g21 0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 100 t a = 25 c f = 1mhz 2nd 3rd 2nd 3rd r l = 25 r l = 100 output voltage (v p-p ) distortion (dbc) 0 1969 g22 0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 100 1 2 3 4 5 t a = 25 c f = 1mhz 2nd 3rd 2nd 3rd r l = 100 r l = 25 output voltage (v p-p ) distortion (dbc) 024681012 1969 g23 0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 100 t a = 25 c r f = r g = 1k r c = 124 c c = 100pf f = 1mhz see figure 3 2nd 2nd 3rd 3rd r l = 25 r l = 100 common mode rejection ratio vs frequency amplifier crosstalk vs frequency frequency (hz) common mode rejection ratio (db) 100k 10m 100m 1969 g15 1m 100 90 80 70 60 50 40 30 20 10 0 v s = 6v t a = 25 c harmonic distortion vs frequency, a v = 10, v s = 6v harmonic distortion vs frequency, a v = 10, v s = 2.5v frequency (hz) output to input crosstalk (db) 1m 100m 1g 1969 g16 10m 0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 100 v s = 6v a v = 10 r l = 100 input = 20dbm b ? a a ? b frequency (hz) 100k distortion (dbc) 0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 100 1m 10m 1969 g17 t a = 25 c a v = 10 2v p-p out 2nd 3rd 2nd 3rd r l = 25 r l = 100 frequency (hz) 100k distortion (dbc) 0 e10 e20 e30 e40 e50 e60 e70 e80 e90 e100 1m 10m 1969 g18 t a = 25 c a v = 10 2v p-p out 2nd 3rd 2nd 3rd r l = 100 r l = 25
8 lt1969 typical perfor a ce characteristics uw gain bandwidth product vs supply current i cc , per amplifier (ma) 0 1400 1200 1000 800 600 400 200 0 610 1959 g28 24 812 gain bandwidth product (mhz) v s = 6v a v = ?0 i cc , per amplifier (ma) 0 75 phase margin 76 77 78 79 81 2 468 1969 g29 10 12 80 v s = 6v measured at a v = 10 i cc , per amplifier (ma) 0 slew rate (v/ s) 350 4 1969 g30 200 100 12 6 50 0 400 300 250 150 81012 rising falling v s = 6v phase margin vs supply current slew rate vs supply current output impedance vs supply current output impedance vs frequency low power ** i cc per amplifier (ma) 0.1 output impedance ( ) 1 10 100 0 468 0.01 2 10 357 19 1969 g31 v s = 6v a v = 10 f = 1mhz f = 600khz frequency (hz) 0.1 output impedance ( ) 1 10 100 1m 10m 100m 1969 g32 0.01 100k v s = 6v a v = 100 a v = 10 harmonic distortion vs output swing, a v = 2, v s = 2.5v harmonic distortion vs output current, v s = 6v output voltage (v p-p ) distortion (dbc) 0 1969 g24 0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 100 1 2 3 4 5 2nd 3rd 2nd 3rd t a = 25 c r f = r g = 1k r c = 124 c c = 100pf f = 1mhz see figure 3 r l = 25 r l = 100 peak output current (ma) highest harmonic distortion (dbc) 0 1969 g25 ?0 ?0 ?0 ?0 ?0 ?0 100 200 300 400 500 r l = 5 r l = 10 t a = 25 c a v = 10 f = 1mhz r l = 25 harmonic distortion vs output current, v s = 2.5v undistorted output swing vs frequency peak output current (ma) highest harmonic distortion (dbc) 0 1969 g26 ?0 ?0 ?0 ?0 ?0 ?0 50 100 150 200 250 r l = 5 r l = 10 t a = 25 c a v = 10 f = 1mhz r l = 25 frequency (hz) 100k output voltage swing (v p-p ) 12 10 8 6 4 2 0 1m 10m 1969 g27 t a = 25 c a v = 10 r l = 100 1% distortion v s = 2.5v v s = 6v
9 lt1969 large-signal transient, a v = 10, nominal power* large-signal transient, a v = C10, nominal power* large-signal transient, a v = 10, c l = 1000pf, nominal power* 1969 g37 1969 g38 1969 g39 typical perfor a ce characteristics uw small-signal transient, a v = 10, c l = 1000pf, low power** 1969 g40 small-signal transient, a v = 10, nominal power* small-signal transient, a v = C10, nominal power* small-signal transient, a v = 10, c l = 1000pf, nominal power* 1969 g34 1969 g35 1969 g36 maximum i out sourcing vs quiescent current i cc per amplifier (ma) 0 maximum i out (ma) 400 600 8 1969 g33 200 0 2 4 6 1 3 5 7 800 300 500 100 700 v s = 6v short-circuit current linear output current region *13k resistor from ctrl1 to v C and a 49.9k resistor from ctrl2 to v C ** 49.9k resistor from ctrl2 to v C , ctr1 floating
10 lt1969 input considerations the inputs of the lt1969 are an npn differential pair protected by back-to-back diodes (see the simplified schematic). there are no series protection resistors onboard which would degrade the input voltage noise. if the inputs can have a voltage difference of more than 0.7v, the input current should be limited to less than 10ma with external resistance (usually the feedback resistor or source resistor). each input also has two esd clamp diodesone to each supply. if an input drive exceeds the supply, limit the current with an external resistor to less than 10ma. the lt1969 design is a true operational amplifier with high impedance inputs and low input bias currents. the input offset current is a factor of ten lower than the input bias current. to minimize offsets due to input bias currents, match the equivalent dc resistance seen by both inputs. the low input noise current can significantly reduce total noise compared to a current feedback amplifier, especially for higher source resistances. layout and passive components with a gain bandwidth product of 700mhz the lt1969 requires attention to detail in order to extract maximum performance. use a ground plane, short lead lengths and a combination of rf-quality supply bypass capacitors (i.e., 470pf and 0.1 m f). as the primary applications have high drive current, use low esr supply bypass capacitors (1 m f to 10 m f). for best distortion performance with high drive current a capacitor with the shortest possible trace lengths should be placed between pins 1 and 5. the optimum location for this capacitor is on the back side of the pc board. the parallel combination of the feedback resistor and gain setting resistor on the inverting input can combine with the input capacitance to form a pole which can cause frequency peaking. in general, use feedback resistors of 1k w or less. thermal issues the lt1969 enhanced q ja ms10 package has the v C pin fused to the lead frame. this thermal connection increases the efficiency of the pc board as a heat sink. the pcb material can be very effective at transmitting heat between the pad area attached to the v C pin and a ground or power plane layer. copper board stiffeners and plated through- holes can also be used to spread the heat generated by the device. table 1 lists the thermal resistance for several different board sizes and copper areas. all measurements large-signal transient, a v = 10, low power** large-signal transient, a v = C 10, low power** 1969 g41 1969 g42 applicatio s i for atio wu uu typical perfor a ce characteristics uw *13k resistor from ctrl1 to v C and a 49.9k resistor from ctrl2 to v C ** 49.9k resistor from ctrl2 to v C , ctr1 floating
11 lt1969 were taken in still air on 3/32" fr-4 board with 2oz copper. this data can be used as a rough guideline in estimating thermal resistance. the thermal resistance for each appli- cation will be affected by thermal interactions with other components as well as board size and shape. table 1. fused 10-lead msop package copper area topside* backside board area thermal resistance (mm 2 )(mm 2 )(mm 2 ) (junction-to-ambient) 540 540 2500 110 c/w 100 100 2500 120 c/w 100 0 2500 130 c/w 30 0 2500 135 c/w 0 0 2500 140 c/w *device is mounted on topside. calculating junction temperature the junction temperature can be calculated from the equation: t j = (p d )( q ja ) + t a t j = junction temperature t a = ambient temperature p d = device dissipation q ja = thermal resistance (junction-to-ambient) as an example, calculate the junction temperature for the circuit in figure 1 assuming an 70 c ambient temperature. the device dissipation can be found by measuring the supply currents, calculating the total dissipation and then subtracting the dissipation in the load. the dissipation for the amplifiers is: p d = (63.5ma)(12v) C (4v/ ? 2) 2 /(50) = 0.6w the total package power dissipation is 0.6w. when a 2500 sq. mm pc board with 540 sq. mm of 2oz copper on top and bottom is used, the thermal resistance is 110 c/w. the junction temperature t j is: t j = (0.6w)(110 c/w) + 70 c = 136 c the maximum junction temperature for the lt1969 is 150 c so the heat sinking capability of the board is adequate for the application. if the copper area on the pc board is reduced to 0 sq. mm the thermal resistance increases to 140 c/w and the junction temperature becomes: t j = (0.6w)(140 c/w) + 70 c = 154 c which is above the maximum junction temperature indi- cating that the heat sinking capability of the board is inadequate and should be increased. applicatio s i for atio wu uu figure 1. thermal calculation example + 6v ?v ?v 6v 909 100 100 + 1969 f01 1k 50 ?v 4v f = 1mhz 13k 6 49.9k ctrl1 ctrl2 7
12 lt1969 capacitive loading the lt1969 is stable with a 1000pf capacitive load. the photo of the small-signal response with 1000pf load in a gain of 10 shows 50% overshoot. the photo of the large- signal response with a 1000pf load shows that the output slew rate is not limited by the short-circuit current. the typical performance curve of frequency response vs capacitive load shows the peaking for various capacitive loads. this stability is useful in the case of directly driving a coaxial cable or twisted pair that is inadvertently unterminated. for best pulse fidelity, however, a termina- tion resistor of value equal to the characteristic impedance of the cable or twisted pair (i.e., 50 w /75 w /100 w /135 w ) should be placed in series with the output. the other end of the cable or twisted pair should be terminated with the same value resistor to ground. applicatio s i for atio wu uu figure 2. compensation for inverting gains r g r c v o v i c c (optional) + 1969 f02 r f = ? f r g v o v i < 15mhz 1 2 r c c c (r c || r g ) r f /9 figure 3. compensation for noninverting gains r c v o v i c c (optional) + 1969 f03 r f r g = 1 + r f r g v o v i < 15mhz 1 2 r c c c (r c || r g ) r f /9 compensation the lt1969 is stable in a gain 10 or higher for any supply and resistive load. it is easily compensated for lower gains with a single resistor or a resistor plus a capacitor. figure 2 shows that for inverting gains, a resistor from the inverting node to ac ground guarantees stability if the parallel combination of r c and r g is less than or equal to r f /9. for lowest distortion and dc output offset, a series capacitor, c c , can be used to reduce the noise gain at lower frequencies. the break frequency produced by r c and c c should be less than 15mhz to minimize peaking. the typical curve of frequency response vs supply voltage, a v = C1 shows less than 1db of peaking for a break frequency of 12.8mhz. figure 3 shows compensation in the noninverting configu- ration. the r c , c c network acts similarly to the inverting case. the input impedance is not reduced because the
13 lt1969 network is bootstrapped. this network can also be placed between the inverting input and an ac ground. another compensation scheme for noninverting circuits is shown in figure 4. the circuit is unity gain at low frequency and a gain of 1 + r f /r g at high frequency. the dc output offset is reduced by a factor of ten. the techniques of figures 3 and 4 can be combined as shown in figure 5. the gain is unity at low frequencies, 1 + r f /r g at mid-band and for stability, a gain of 10 or greater at high frequencies. output loading the lt1969 output stage is very wide bandwidth and able to source and sink large currents. reactive loading, even isolated with a back-termination resistor, can cause ring- ing at frequencies of hundreds of mhz. for this reason, any design should be evaluated over a wide range of output conditions. to reduce the effects of reactive loading, an optional snubber network consisting of a series rc across the load can provide a resistive load at high frequency. another option is to filter the drive to the load. if a back- termination resistor is used, a capacitor to ground at the load can eliminate ringing. line driving back-termination the standard method of cable or line back-termination is shown in figure 6. the cable/line is terminated in its characteristic impedance (50 w , 75 w , 100 w , 135 w , etc.). a back-termination resistor also equal to to the chararacteristic impedance should be used for maximum pulse fidelity of outgoing signals, and to terminate the line for incoming signals in a full-duplex application. there are three main drawbacks to this approach. first, the power dissipated in the load and back-termination resistors is equal so half of the power delivered by the amplifier is figure 5. combination compensation r c v o v i c c + 1969 f05 r f r g c big r f r g = 1 at low frequencies = 1 + at medium frequencies r f (r c || r g ) = 1 + at high frequencies v o v i figure 4. alternate noninverting compensation + 1969 f04 r f r g v i v o c c < 15mhz 1 2 r g c c r g r f /9 = 1 (low frequencies) (high frequencies) v o v i = 1 + r f r g figure 6. standard cable/line back-termination + 1969 f06 r f r bt cable or line with characteristic impedance r l r g v o v i r l (1 + r f /r g ) = v o v i 1 2 r bt = r l applicatio s i for atio wu uu
14 lt1969 applicatio s i for atio wu uu wasted in the termination resistor. second, the signal is halved so the gain of the amplifer must be doubled to have the same overall gain to the load. the increase in gain increases noise and decreases bandwidth (which can also increase distortion). third, the output swing of the ampli- fier is doubled which can limit the power it can deliver to the load for a given power supply voltage. an alternate method of back-termination is shown in figure 7. positive feedback increases the effective back- termination resistance so r bt can be reduced by a factor of n. to analyze this circuit, first ground the input. as r bt = r l /n, and assuming r p2 >>r l we require that: v a = v o (1 C 1/n) to increase the effective value of r bt by n. v p = v o (1 C 1/n)/(1 + r f /r g ) v o = v p (1 + r p2 /r p1 ) figure 7. back-termination using positive feedback + 1969 f07 r f r bt r p2 r p1 r g v i v a v p v o r l r f r g 1 + r l n = v o v i = 1 1 n for r bt = () r f r g 1 + () r p1 r p1 + r p2 r p1 r p2 + r p1 r p2 /(r p2 + r p1 ) () 1 + 1/n eliminating vp, we get the following: (1 + r p2 /r p1 ) = (1 + r f /r g )/(1 C 1/n) for example, reducing r bt by a factor of n = 4, and with an amplifer gain of (1 + r f /r g ) = 10 requires that r p2 /r p1 = 12.3. note that the overall gain is increased: v v rrr nrrrrr o i ppp fg p p p = + () + () + () [] -+ () [] 221 121 11 1 / // / / a simpler method of using positive feedback to reduce the back-termination is shown in figure 8. in this case, the drivers are driven differentially and provide complemen- tary outputs. grounding the inputs, we see there is invert- ing gain of er f /r p from ev o to v a v a = v o (r f /r p ) figure 8. back-termination using differential positive feedback + r bt r f r g r p r p r g r l r l ? i v a ? a v i ? o v o + r bt 1969 f08 r f r l n = v o v i n = 1 2 for r bt = r f r p r f r p + r f r g 1 + 1 r f r p 1 ()
15 lt1969 applicatio s i for atio wu uu and assuming r p >> r l , we require v a = v o (1 C 1/n) solving r f /r p = 1 C 1/n so to reduce the back-termination by a factor of 3 choose r f /r p = 2/3. note that the overall gain is increased to: v o /v i = (1 + r f /r g + r f /r p )/[2(1 C r f /r p )] adsl driver requirements the lt1969 is an ideal choice for adsl upstream (cpe) modems. the key advantages are: 200ma output drive with only 1.7v worst-case total supply voltage headroom, high bandwidth, which helps achieve low distortion, low quiescent supply current of 7ma per amplifier and a space-saving, thermally enhanced ms10 package. an adsl remote terminal driver must deliver an average power of 13dbm (20mw) into a 100 w line. this corre- sponds to 1.41v rms into the line. the dmt-adsl peak-to- average ratio of 5.33 implies voltage peaks of 7.53v into the line. using a differential drive configuration and trans- former coupling with standard back-termination, a trans- former ratio of 1:2 is well suited. this is shown on the front page of this data sheet along with the distortion perfor- mance vs line voltage at 200khz, which is beyond adsl requirements. note that the distortion is better than C73dbc for all swings up to 16v p-p into the line. the gain of this circuit from the differential inputs to the line voltage is 10. lower gains are easy to implement using the compensation techniques of figure 5. table 2 shows the drive requirements for this standard circuit. the above design is an excellent choice for desktop applications and draws typically 550mw of power. for portable applications, power savings can be achieved by reducing the back-termination resistor using positive feed- back as shown in figure 9. the overall gain of this circuit figure 9. power saving adsl modem driver + 8.45 1k 523 1.21k 1.21k 523 1 f ? i v i a v = 10 + 8.45 1969 f09 1k 1:1 100 table 2. adsl upstream driver designs standard low power line impedance 100 w 100 w line power 13dbm 13dbm peak-to-average ratio 5.33 5.33 transformer turns ratio 2 1 reflected impedance 25 w 100 w back-termination resistors 12.5 w 8.35 w transformer insertion loss 1db 0.5db average amplifier swing 0.79v rms 0.87v rms average amplifier current 31.7ma rms 15ma rms peak amplifier swing 4.21v peak 4.65v peak peak amplifier current 169ma peak 80ma peak total average power consumption 550mw 350mw supply voltage single 12v single 12v
16 lt1969 figure 10. receiver configuration r bt ? a v a ? l v l r bt 1969 f10 1:n r l + v bias v rx + lt1813 + lt1813 r f r f r g r d r g r d r l n 2 = reflected impedance r l 2n 2 r l 2n 2 = attenuation of v a + r bt r l 2n 2 r l 2n 2 r g r d = set + r bt is also 10, but the power consumption has been reduced to 350mw, a savings of 36% over the previous design. note that the reduction of the back-termination resistor has allowed use of a 1:1 transformer ratio. table 2 compares the two approaches. it may seem that the low power design is a clear choice, but there are further system issues to consider. in addition to driving the line, the amplifiers provide back-termination for signals that are received simultaneously from the line. in order to reject the drive signal, a receiver circuit is used such as shown in figure 10. taking advantage of the differential nature of the signals, the receiver can subtract out the drive signal and amplify the received signal. this method works well for standard back-termination. if the back- termination resistors are reduced by positive feedback, a portion of the received signal also appears at the amplifier outputs. the result is that the received signal is attenuated by the same amount as the reduction in the back-termina- tion resistor. taking into account the different transformer turns ratios, the received signal of the low power design will be one third of the standard design received signal. the reduced signal has system implications for the sensi- tivity of the receiver. the power reduction may, or may not, be an acceptable system tradeoff for a given design. controlling the quiescent current the quiescent current of the lt1969 is controlled via two control pins, ctrl1 and ctrl2. the pins can be used to either turn off the amplifiers, reducing the quiescent cur- rent on 2.5v supplies to less than 500 m a per amplifier, or to control the quiescent current in normal operation. figure 11 shows how the control pins are used in conjunc- tion with external resistors to program the supply current. in normal operation, each control pin is biased to approxi- mately 1v above v C and by varying the resistor values, the current from each control pin can be adjusted. it is this current that sets the supply current of both amplifiers. if one of the resistors is open, i.e. r2, the supply current of the amplifiers will be set by ctrl1 and r1. figure 12 shows supply current vs resistor value. applicatio s i for atio wu uu
17 lt1969 using ctrl1 and ctrl2 to set the supply current effec- tively places r1 and r2 in parallel obtaining a net resis- tance, and figure 12 can still be utilized in determining supply current. the use of two pins to control the supply current allows for applications where external logic can be used to place the amplifiers in different supply current modes. figure 13 illustrates a partial shutdown with direct logic on each control pin. if both logic inputs are low, the control pins will effectively see a resistance of 13k//49.9k = 10k to v C . this will set the amplifiers in nominal mode with a gain bandwidth of 700mhz and 200ma minimum i out . the electrical characteristics are specified in nominal mode. forcing r1s input logic high will partially shut down the part, putting it in a low power mode. by keeping the output stage slightly biased, the output impedance + 6 ctrl1 v v + r1 7 5 1 ctrl2 r2 1969 f11 v v figure 11 resistance (k ) 0 i cc , both amplifiers (ma) 10 20 30 5 15 25 20 40 60 80 1969 f12 100 10 030507090 v s = 6v t a = 25 c figure 12. supply current vs control resistance (r1//r2) remains low, preserving the line termination. the typical performance characteristics curve output impedance vs supply current shows the details. both logic inputs high further reduces the supply current and places the part in a standby mode with less than 500 m a per amplifier quiescent current. output loading in low current modes the lt1969 output stage has a very wide bandwidth and is able to source and sink large amounts of current. the internal circuitry of the output stage incorporates a posi- tive feedback boost loop giving it high drive capability. as the supply current is reduced, the sourcing drive capability also reduces. maximum sink current is independent of supply current and is limited by the short-circuit protec- tion at 500ma. if the amplifier is in a low power or standby mode, the output stage is slightly biased and is not capable of sourcing high output currents. the typical performance characteristics curve maximum i out sourc- ing vs quiescent current shows the maximum output current for a given quiescent current. considerations for fault protection the basic line driver design presents a direct dc path between the outputs of the two amplifiers. an imbalance in the dc biasing potentials at the noninverting inputs through either a fault condition or during turn-on of the system can create a dc voltage differential between the two amplifier outputs. this condition can force a consid- erable amount of current, 500ma or more, to flow as it is limited only by the small valued back-termination resis- tors and the dc resistance of the transformer primary. this high current can possibly cause the power supply voltage source to drop significantly impacting overall 6 ctrl1 r1 7 ctrl2 r2 on on off 1969 f13 off 3.3v/5v from v figure 13 applicatio s i for atio wu uu
18 lt1969 system performance. if left unchecked, the high dc cur- rent can heat the lt1969 to destruction. using dc blocking capacitors to ac couple the signal to the transformer eliminates the possibility for dc current to flow under any conditions. these capacitors should be sized large enough to not impair the frequency response characteristics required for the data transmission. another important fault related concern has to do with very fast high voltage transients appearing on the tele- phone line (lightning strikes for example). transzorbs tm , varistors and other transient protection devices are often used to absorb the transient energy, but in doing so also transzorb is a registered trademark of general instruments, gsi create fast voltage transitions themselves that can be coupled through the transformer to the outputs of the line driver. several hundred volt transient signals can appear at the primary windings of the transformer with current into the driver outputs limited only by the back termination resistors. while the lt1969 has clamps to the supply rails at the output pins, they may not be large enough to handle the significant transient energy. external clamping diodes, such as bav99s, at each end of the transformer primary help to shunt this destructive transient energy away from the amplifier outputs. applicatio s i for atio wu uu
19 lt1969 dimensions in inches (millimeters) unless otherwise noted. u package descriptio ms10 package 10-lead plastic msop (ltc dwg # 05-08-1661) information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. msop (ms10) 1100 * dimension does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.006" (0.152mm) per side ** dimension does not include interlead flash or protrusions. interlead flash or protrusions shall not exceed 0.006" (0.152mm) per side 0.021 0.006 (0.53 0.015) 0 ?6 typ seating plane 0.007 (0.18) 0.043 (1.10) max 0.007 ?0.011 (0.17 0.27) 0.005 0.002 (0.13 0.05) 0.034 (0.86) ref 0.0197 (0.50) bsc 12 3 45 0.193 0.006 (4.90 0.15) 8 9 10 7 6 0.118 0.004* (3.00 0.102) 0.118 0.004** (3.00 0.102)
20 lt1969 part number description comments lt1207 dual 250ma, 60mhz current feedback amplifier shutdown/current set function lt1396 dual 400mhz, 800v/ m s current feedback amplifier 4.6ma supply current set, 80ma i out lt1497 dual 125ma, 50mhz current feedback amplifier 900v/ m s slew rate lt1795 dual 500ma, 50mhz current feedback amplifier shutdown/current set function, adsl co driver lt1886 dual 700mhz, 200ma op amp gain of 10 stable, low distortion ? linear technology corporation 2001 1969f lt/tp 0301 4k ? printed in usa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 l fax: (408) 434-0507 l www.linear-tech.com related parts split supply 5v adsl cpe line driver typical applicatio u + 6.19 2 1 5v 5 7 ?v ?v 1k 866 2k 0.47 f** bav99** ?v 5v 5v ?v 2k 866 + v in + v l *coilcraft x8390-a or equivalent **see text regarding fault protection + 6 13k 49.9k ?v 6.19 1/2 lt1969 1/2 lt1969 1969 ta02 1k 100pf 1:2* 100 130 4 3 10 9 8 0.47 f** 100pf 130 = 5 (assume 0.5db transformer power loss) reflected line impedance = 100 / 2 2 = 25 effective termination = 2 ?6.19 ? each amplifier: 0.56v rms , 29.9ma rms 3v peak, 160ma peak = 24.8 v l v in 2k 1k bav99**

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