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si9172 vishay siliconix new product document number: 71379 s-02890?rev. a, 21?dec-00 www.vishay.com 1 psm buck converter with dynamic adjustable output and bypass capability 2.7-v to 6-v input voltage range dynamic adjustable 1.5-v to 3.6-v output. power conversion efficiency of 95% at 170-ma load selectable pulse skipping modulation (psm) or bypass mode (bp) operation bypass for up to 800-ma load integrated mosfet with low external part count low quiescent current?110 a/250 a (bp/psm ) shutdown current <1 a integrated uvlo and por integrated soft-start over temperature protection msop-10 package

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the si9172 is a dual-mode power adjustable output converter. when it is set to psm mode, the si9172 operates as a pulse- skipping-modulation controlled step-down (buck) converter with a dynamically adjustable output of 1.5 v to 3.6 v. it has an integrated mosfet, capable of supplying a minimum 170-ma load current with a 1.5- h inductor. the output voltage is adjusted by the analog dc signal at the adj pin. the typical conversion efficiency is above 90%. a logic high at the bp/psm pin puts the si9172 in bypass mode. the main pmos buck switch is forced to turn on at 100% duty cycle, overriding the fb signal. the voltage differential between input and output is the resistive voltage drop on the internal pmos and the inductor. the si9172 guarantees to deliver 800-ma load in bypass mode with a typical 95% efficiency. the si9172 is available in msop-10 package. in order to satisfy the stringent ambient temperature requirements, the si9172 is rated to handle the industrial temperature range of ?25 c to 85 c.

v in on/off enable bp/psm adj si9172 l x gnd f b ref 1 2 3 4 5 10 9 8 7 6 v out v in bp/psm v out v adj 3.6 v 1.5 v 0.4 v 2.5 v msop-10 v in l x
si9172 vishay siliconix new product www.vishay.com 2 document number: 71379 s-02890 ? rev. a, 21 ? dec-00

v in 6.5 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . bp/psm , enable, f b, l x ? 0.3 v to v in + 0.3 v . . . . . . . . . . . . . . . . . . . . . . . . adj v in . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . peak output current 1.5 a (1 ms) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . continuous output current 1 a . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . storage temperature ? 55 to 150 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . operating junction temperature 150 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . power dissipation (package) a 10-pin msop (q suffix) b 825 mw . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . thermal impedance ( ja ) 10-pin msop 150 c/w . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . notes a. device mounted with all leads soldered or welded to pc board. b. derate 6.6 mw/ c above 25 c. stresses beyond those listed under ?absolute maximum ratings? may cause permanent damage to the device. these are stress ratin gs only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability.
v in 2.7 v to 6 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . bp/psm, enable 0 v to v in . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ref capacitor 0.1 f . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . output capacitor 10 f . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . inductor 1.5 h . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . psm load 0 to 170 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . bypass load 0 to 800 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

test conditions unless specified limits parameter symbol ? 25 c to 85 c 2.7 v v in 6 v min a typ b max a unit output adj = 0.4 v 1.440 1.5 1.560 fb threshold v fb adj = 2.5 v, v in v fb 3.492 3.6 3.708 v reference i ref = 0 1.175 1.215 1.255 output voltage v ref i ref = 0, t a = 25 c 1.195 1.215 1.235 v power supply rejection c psrr 60 db uvlo under voltage lockout (turn-on) v uvld 2.3 2.4 2.5 hysteresis uvld hyst 0.1 v start-up start-up delay time t delay 3 ms soft start time c t ss 100 s enable, bp/psm logic high v ih 1.5 logic low v il 0.4 v output capability/mosfet maximum bypass output current 800 maximum psm output current i out l = 1.5 h 170 ma mosfet on-resistance r ds(on) v in 3.3 v 150 300 m supply current bp mode 75 110 psm mode d i in v in = 3.3 v 190 250 a shutdown mode in v in = 3.3 v, enable = 0 v 1 a thermal shutdown threshold t s/d up-rising 165 hysteresis t hyst v in = 3.3 v 25 c notes a. the algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data s heet. b. typical values are for design aid only, not guaranteed or subject to production testing. c. guaranteed by design and characterization, not subject to production testing. d. for operation involving l x frequency faster than 1-hz the supply current may be higher.
v in l x enable gnd msop-10 v in l x 1 2 3 10 9 8 adj ref top view 56 bp/psm f b 47 si9172 vishay siliconix new product document number: 71379 s-02890 ? rev. a, 21 ? dec-00 www.vishay.com 3

part number temperature range package si9172bh-ti ? 25 c to 85 c tape and reel eval kit temperature range board type si9172db ? 25 c to 85 c surface mount

pin no. name function 1, 2 v in input voltage source for buck converter, mosfet driver, and ic control circuits . 3 enable logic high enables the converter. logic low shuts down the ic and decreases current consumed to <1 a. 4 bp/psm logic high = bypass mode, logic low = psm mode. 5 adj analog voltage input to control output voltage 6 ref 1.215-v reference. decouple with 0.1- f capacitor. 7 f b direct output voltage sense feedback 8 gnd ic ground 9, 10 l x inductor connection node

figure 1. v out t delay = start-up delay time t ss = soft-start time v in t delay t ss 90%
si9172 vishay siliconix new product www.vishay.com 4 document number: 71379 s-02890 ? rev. a, 21 ? dec-00

turn off control + ? + ? + ? fb adj enable 1.1 v bp/psm ref reference generator v in uvlo por psm/bp controller driver bp psm v adj turn-on control zero current detect peak current comparater 0.3 a v in gnd l x
si9172 vishay siliconix new product document number: 71379 s-02890 ? rev. a, 21 ? dec-00 www.vishay.com 5

start-up the built-in uvlo circuit in the si9172 prevents the internal mosfet from turning on if the voltage on the v in pin is less than 2.4 v. with typical uvlo hysteresis of 0.1 v, the controller is continuously powered on until the v in voltage drops below 2.3 v. this hysteresis prevents the converter from oscillating during the start-up phase and unintentionally locking up the system. once the v in voltage exceeds the uvlo threshold, and with no other shutdown condition detected, an internal power-on-reset timer is activated. the circuitry, except the output driver, is turned on. after the por time-out of about 3 ms, the soft-start begins. if pin 4 is in bp mode, the high side pmos will turn on gradually in about 100 s to avoid any inrush current. if pin 4 is in psm mode, the converter will soft-start in psm operation, forcing the output voltage to rise smoothly with minimum overshoot. the rise time is approximatly 100- s. in order to start-up properly in psm mode, the load current has to be 170 ma or less. pulse skipping mode the gate charge losses produced from the miller capacitance of the mosfet are the dominant power dissipation parameter during light load. therefore, reduced gate switching frequency improves overall converter efficiency. this is exactly why the si9172 is designed to operate in pulse-skipping mode rather than pwm mode. if the bp/psm pin is connected to logic low level, the converter runs in pulse skipping modulation mode. in this mode, the internal mosfet operates with a constant on-time. the on-time is reduced if necessary by the peak current detector circuitry. there is an enforced minimum off-time acting as the feedback comparator blanking time. if the output voltage drops below the desired level, the main switch is first turned on and then off. if the applied on-time did not deliver enough energy to keep the output at the desired voltage level, the controller will force another on and off sequence, until the desired voltage is accomplished. if the applied on-time forces the output to exceed the desired level, the converter stays off. the excess energy is delivered to the output slowly, forcing the converter to skip pulses as needed to maintain regulation. the on-time and off-time are set internally based on the inductor value (1.5 h typical) and maximum load current. with a 1.5- h inductor, the si9172 guarantees to deliver minimum of 170-ma load current. this current capability decreases as the inductance increases. in pulse-skipping mode, the switching frequency, f sw , varies with load current. when the load increases, f sw increases as well. the typical conversion efficiency in psm mode is 90%. efficiency is higher at high output voltage and decreases with the output voltage. adjustable output in psm mode, the output voltage regulation point can be adjusted by an external analog voltage signal at the adj pin. when this voltage varies from 0.4 v to 2.5 v, the output voltage also increases linearly from 1.5 v to 3.6 v. when the programmed output voltage is higher than the input voltage can support, the converter will be in drop out mode and the output voltage will be the input voltage minus the resistive drop of the mosfet and inductor. bypass mode the si9172 can also operate in bypass mode to handle heavy load current. in this mode the ic ignores the feedback signal at the fb pin, forcing the internal pmos to turn on at 100% duty cycle. the input-output voltage differential is merely the resistive voltage drop on the mosfet and the inductor. the si9172 can bypass at least 800ma at 95% typical efficiency. whenever the converter enters bp mode, regardless switching from psm or starting up, the pmos turns on gradually within 100 s. shutdown the si9172 is designed to conserve as much battery life as possible by decreasing current consumption of the ic during normal operation as well as the shutdown mode. with logic low level on the enable pin, the current consumption of the ic is decreased to less than 1 a by shutting off most of the circuits. a logic high enables the controller and starts up as described in the ? start-up ? section above. reference the reference voltage of the si9172 is set to 1.215 v. it is internally connected to the non-inverting inputs of the error amplifier. a 0.1- f decoupling capacitor is required at the v ref pin. power switches the main mosfet switch is integrated in the si9172 for optimum performance and minimum overall converter size. the internal mosfet is designed to minimize the gate charge loss as well as the conduction loss. the typical on-resistance of the pmos is 150 m with a minimum v in pin voltage of 3.3 v. an external schottky diode is mandatory for psm mode operation. it freewheels the inductor current after the main switch is turned off, which is typical in basic non-synchronous buck converter operation. it must be rated at 800 ma or higher, with low forward drop to minimize power loss. the diode has to be connected at pgnd with the cathode connected to the l x pin. over temperature protection the si9172 includes an over temperature protection circuit to prevent thermal runaway in the mosfet switch. if the temperature rea ches 165 c, an internal soft-start capacitor is discharged, shutting down the output stage. the converter remains in the disabled mode until the temperature in the ic decreases below 140 c.
si9172 vishay siliconix new product www.vishay.com 6 document number: 71379 s-02890 ? rev. a, 21 ? dec-00

1.5 2.2 2.9 3.6 0.4 1.1 1.8 2.5 80 85 90 95 100 0 40 80 120 160 200 60 100 140 180 220 23456 60 80 100 120 140 160 180 200 220 23456 adj (v) v in voltage (v) v adj = 1.1 v v out = 2.2 v bp mode r ds(on) vs. v in v in current vs. v in voltage v in (v) fb threshold vs. adj voltage psm mode efficiency vs. load load (ma) psm mode fb (v) v in current (ma) r ds(on) ? on-resistance ( ? ) efficiency (%) v in = 3 v v in = 4.2 v 85 c 25 c ? 25 c
document number: 91000 www.vishay.com revision: 18-jul-08 1 disclaimer legal disclaimer notice vishay all product specifications and data are subject to change without notice. vishay intertechnology, inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, ?vishay?), disclaim any and all liability fo r any errors, inaccuracies or incompleteness contained herein or in any other disclosure relating to any product. vishay disclaims any and all li ability arising out of the use or application of any product describ ed herein or of any information provided herein to the maximum extent permit ted by law. the product specifications do not expand or otherwise modify vishay?s terms and conditions of purcha se, including but not limited to the warranty expressed therein, which apply to these products. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of vishay. the products shown herein are not designed for use in medi cal, life-saving, or life-sustaining applications unless otherwise expressly indicated. customers using or selling vishay products not expressly indicated for use in such applications do so entirely at their own risk and agree to fully indemnify vishay for any damages arising or resulting from such use or sale. please contact authorized vishay personnel to obtain written terms and conditions regarding products designed for such applications. product names and markings noted herein may be trademarks of their respective owners.

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