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| ? 2002 microchip technology inc. preliminary ds40189d-page 1 HCS362 features security ? programmable 28/32-bit serial number ? two programmable 64-bit encryption keys ? programmable 60-bit seed ? each transmission is unique ? 69-bit transmission code length ? 32-bit hopping code ? 37-bit fixed code (28/32-bit serial number, 4/0-bit function code, 1-bit status, 2-bit crc/time, 2-bit queue) ? encryption keys are read protected operation ? 2.0v C 6.3v operation ? four button inputs ? 15 functions available ? selectable baud rates and code word blanking ? programmable minimum code word completion ? battery low signal transmitted to receiver with programmable threshold ? non-volatile synchronization data ? pwm and manchester modulation other ? rf enable output C pll interface ? easy to use programming interface ? on-chip eeprom ? on-chip tunable oscillator and timing components ? button inputs have internal pull-down resistors ? current limiting on led output ? minimum component count enhanced features over hcs300 ? 60-bit seed vs. 32-bit seed ? 2-bit crc for error detection ? 28/32-bit serial number select ? tunable oscillator ( +/- 10 % over specified voltage ranges ) ? time bits option ? queue bits ? tssop package ? programmable time-out and guard time package types HCS362 block diagram typical applications the HCS362 is ideal for remote keyless entry (rke) applications. these applications include: ? automotive rke systems ? automotive alarm systems ? automotive immobilizers ? gate and garage door openers ? identity tokens ? burglar alarm systems 1 2 3 4 8 7 6 5 s0 s1 s2 s3/rfen v dd led /shift data v ss pdip, soic HCS362 HCS362 s2 s3/rfen v ss data 1 2 3 4 8 7 6 5 s1 s0 v dd led /shift tssop v ss v dd oscillator reset circuit led driver controller power latching and switching button input port 32-bit shift register encoder eeprom data led s3 s2 s1 s0 shift pll driver rfen k ee l oq ? code hopping encoder
HCS362 ds40189d-page 2 preliminary ? 2002 microchip technology inc. general description the HCS362 is a code hopping encoder designed for secure remote keyless entry (rke) systems. the HCS362 utilizes the k ee l oq ? code hopping technol- ogy, which incorporates high security, a small package outline and low cost, to make this device a perfect solution for unidirectional remote keyless entry sys- tems and access control systems. the HCS362 combines a 32-bit hopping code generated by a nonlinear encryption algorithm, with a 28/32-bit serial number and 9/5 status bits to create a 69-bit transmission stream. the length of the transmis- sion eliminates the threat of code scanning. the code hopping mechanism makes each transmission unique, thus rendering code capture and resend (code grab- bing) schemes useless. the crypt key, serial number and configuration data are stored in an eeprom array which is not accessible via any external connection. the eeprom data is pro- grammable but read protected. the data can be veri- fied only after an automatic erase and programming operation. this protects against attempts to gain access to keys or manipulate synchronization values. the HCS362 provides an easy to use serial interface for programming the necessary keys, system parame- ters and configuration data. 1.0 system overview key terms the following is a list of key terms used throughout this data sheet. for additional information on k ee l oq and code hopping, refer to technical brief 3 (tb003). ? rke - remote keyless entry ? button status - indicates what button input(s) activated the transmission. encompasses the 4 button status bits s3, s2, s1 and s0 (figure 3-2). ? code hopping - a method by which a code, viewed externally to the system, appears to change unpredictably each time it is transmitted. ? code word - a block of data that is repeatedly transmitted upon button activation (figure 3-2). ? transmission - a data stream consisting of repeating code words (figure 7-1). ? crypt key - a unique and secret 64-bit number used to encrypt and decrypt data. in a symmetri- cal block cipher such as the k ee l oq algorithm, the encryption and decryption keys are equal and will therefore be referred to generally as the crypt key. ? encoder - a device that generates and encodes data. ? encryption algorithm - a recipe whereby data is scrambled using a crypt key. the data can only be interpreted by the respective decryption algorithm using the same crypt key. ? decoder - a device that decodes data received from an encoder. ? decryption algorithm - a recipe whereby data scrambled by an encryption algorithm can be unscrambled using the same crypt key. ? learn C learning involves the receiver calculating the transmitters appropriate crypt key, decrypting the received hopping code and storing the serial number, synchronization counter value and crypt key in eeprom. the k ee l oq product family facil- itates several learning strategies to be imple- mented on the decoder. the following are examples of what can be done. - simple learning the receiver uses a fixed crypt key, common to all components of all systems by the same manufacturer, to decrypt the received code words encrypted portion. - normal learning the receiver uses information transmitted during normal operation to derive the crypt key and decrypt the received code words encrypted portion. - secure learn the transmitter is activated through a special button combination to transmit a stored 60-bit seed value used to generate the transmitters crypt key. the receiver uses this seed value to derive the same crypt key and decrypt the received code words encrypted portion. ? manufacturers code C a unique and secret 64- bit number used to generate unique encoder crypt keys. each encoder is programmed with a crypt key that is a function of the manufacturers code. each decoder is programmed with the manufac- turer code itself. the HCS362 code hopping encoder is designed specif- ically for keyless entry systems; primarily vehicles and home garage door openers. the encoder portion of a keyless entry system is integrated into a transmitter, carried by the user and operated to gain access to a vehicle or restricted area. the HCS362 is meant to be a cost-effective yet secure solution to such systems, requiring very few external components (figure 2-1). most low-end keyless entry transmitters are given a fixed identification code that is transmitted every time a button is pushed. the number of unique identification codes in a low-end system is usually a relatively small number. these shortcomings provide an opportunity for a sophisticated thief to create a device that grabs a transmission and retransmits it later, or a device that quickly scans all possible identification codes until the correct one is found. the HCS362, on the other hand, employs the k ee l oq code hopping technology coupled with a transmission length of 66 bits to virtually eliminate the use of code grabbing or code scanning. the high security level of ? 2002 microchip technology inc. preliminary ds40189d-page 3 HCS362 the HCS362 is based on the patented k ee l oq technol- ogy. a block cipher based on a block length of 32 bits and a key length of 64 bits is used. the algorithm obscures the information in such a way that even if the transmission information (before coding) differs by only one bit from that of the previous transmission, the next coded transmission will be completely different. statis- tically, if only one bit in the 32-bit string of information changes, greater than 50 percent of the coded trans- mission bits will change. as indicated in the block diagram on page one, the HCS362 has a small eeprom array which must be loaded with several parameters before use; most often programmed by the manufacturer at the time of produc- tion. the most important of these are: ? a 28-bit serial number, typically unique for every encoder ? a crypt key ? an initial 16-bit synchronization value ? a 16-bit configuration value the crypt key generation typically inputs the transmitter serial number and 64-bit manufacturers code into the key generation algorithm (figure 1-1). the manufac- turers code is chosen by the system manufacturer and must be carefully controlled as it is a pivotal part of the overall system security. figure 1-1: creation and storage of crypt key during production the 16-bit synchronization counter is the basis behind the transmitted code word changing for each transmis- sion; it increments each time a button is pressed. due to the code hopping algorithms complexity, each incre- ment of the synchronization value results in greater than 50% of the bits changing in the transmitted code word. figure 1-2 shows how the key values in eeprom are used in the encoder. once the encoder detects a button press, it reads the button inputs and updates the syn- chronization counter. the synchronization counter and crypt key are input to the encryption algorithm and the output is 32 bits of encrypted information. this data will change with every button press, its value appearing externally to randomly hop around, hence it is referred to as the hopping portion of the code word. the 32-bit hopping code is combined with the button information and serial number to form the code word transmitted to the receiver. the code word format is explained in greater detail in section 3.1. a receiver may use any type of controller as a decoder, but it is typically a microcontroller with compatible firm- ware that allows the decoder to operate in conjunction with an HCS362 based transmitter. section 6.0 provides detail on integrating the HCS362 into a sys- tem. a transmitter must first be learned by the receiver before its use is allowed in the system. learning includes calculating the transmitters appropriate crypt key, decrypting the received hopping code and storing the serial number, synchronization counter value and crypt key in eeprom. in normal operation, each received message of valid format is evaluated. the serial number is used to deter- mine if it is from a learned transmitter. if from a learned transmitter, the message is decrypted and the synchro- nization counter is verified. finally, the button status is checked to see what operation is requested. figure 1-3 shows the relationship between some of the values stored by the receiver and the values received from the transmitter. transmitter manufacturers serial number code crypt key key generation algorithm serial number crypt key sync counter . . . HCS362 production programmer eeprom array HCS362 ds40189d-page 4 preliminary ? 2002 microchip technology inc. figure 1-2: building the transmitted code word (encoder) figure 1-3: basic operation of receiver (decoder) note: circled numbers indicate the order of execution. button press information eeprom array 32 bits encrypted data serial number transmitted information crypt key sync counter serial number k ee l oq encryption algorithm button press information eeprom array manufacturer code 32 bits of encrypted data serial number received information decrypted synchronization counter check for match sync counter serial number k ee l oq decryption algorithm 1 3 4 check for match 2 perform function indicated by button press 5 crypt key ? 2002 microchip technology inc. preliminary ds40189d-page 5 HCS362 2.0 device description as shown in the typical application circuits (figure 2-1), the HCS362 is a simple device to use. it requires only the addition of buttons and rf circuitry for use as the transmitter in your security application. see table 2-1 for a description of each pin and figure 2-1 for typical circuits. figure 2-2 shows the device i/o circuits. table 2-1: pin descriptions figure 2-1: typical circuits name pin number description s0 1 switch input 0 s1 2 switch input 1 s2 3 switch input 2 / clock pin when in programming mode s3/ rfen 4 switch input 3 / rf enable output v ss 5 ground reference connection data 6 data output pin / data i/o pin for programming mode led/ shift 7 cathode connection for led and dual mode shift input v dd 8 positive supply voltage v dd b0 tx out s0 s1 s2 s3 led v dd data v ss a) two button remote control b1 v dd tx out s0 s1 s2 rfen v dd data v ss c) four button remote control with rf enable b3 b2 b1 b0 note: up to 15 functions can be implemented by pressing more than one button simulta- neously or by using a suitable diode array. v dd b0 tx out s0 s1 s2 s3 v dd data v ss b) four button remote control b1 with pll output (note) pll control b2 v dd tx out s0 s1 s2 s3 v dd data v ss d) dual key, four buttons remote control b3 b2 b1 b0 shift 1 kw led led led /shift b3 HCS362 ds40189d-page 6 preliminary ? 2002 microchip technology inc. figure 2-2: i/o circuits 2.1 architectural overview 2.1.1 onboard eeprom the HCS362 has an onboard non-volatile eeprom, which is used to store user programmable data. the data can be programmed at the time of production and include the security-related information such as encoder keys, serial numbers, discrimination and seed values. all the security related options are read protected. the HCS362 has built in protection against counter corruption. before every eeprom write, the internal circuitry also ensures that the high voltage required to write to the eeprom is at an acceptable level. 2.1.2 internal rc oscillator the HCS362 has an onboard rc oscillator that con- trols all the logic output timing characteristics. the oscillator frequency varies within 10% of the nominal value (once calibrated over a voltage range of 2v C 3.5v or 3.5v C 6.3v). all the timing values specified in this document are subject to the oscillator variation. figure 2-3: HCS362 normalized t e vs. temperature 2.1.3 low voltage detector a low battery voltage detector onboard the HCS362 can indicate when the operating voltage drops below a predetermined value. there are eight options available depending on the vlow [ 0..2 ] configuration options. the options provided are: s0, s1, s2 esd rs inputs v dd rfen s3 input/ rs rdata data i/o led output rl rh v dd data ledh ledl rfen output pfet nfet pfet esd esd nfet nfet esd shift input shift 000 -2.0v 100 -4.0v 001 -2.1v 101 -4.2v 010 -2.2v 110 -4.4v 011 -2.3v 111 -4.6v 0.94 1.10 1.08 1.06 1.04 1.02 1.00 0.98 0.96 0.92 0.90 t e v dd legend = 2.0v = 3.0v = 6.0v typical t e temperature c -50-40 -30 -20 -10 0 10 20 30 40 50 6070 80 90 note: values are for calibrated oscillator t e ? 2002 microchip technology inc. preliminary ds40189d-page 7 HCS362 figure 2-4: HCS362 v low detector (typical) figure 2-5: HCS362 v low detector (typical) the output of the low voltage detector is transmitted in each code word, so the decoder can give an indication to the user that the transmitter battery is low. operation of the led changes as well to further indicate that the battery is low and needs replacing. 2.2 dual encoder operation the HCS362 contains two crypt keys (possibly derived from two different manufacturers codes), but only one serial number, one set of discrimination bits, one 16- bit synchronization counter and a single 60-bit seed value. for this reason the HCS362 can be used as an encoder in multiple (two) applications as far as they share the same configuration: transmission format, baud rate, header and guard settings. the shift input pin (multiplexed with the led output) is used to select between the two crypt keys. a logic 1 on the shift input pin selects the first crypt key. a logic 0 on the shift input pin will select the second crypt key. 1.5 1.7 1.9 2.1 2.3 2.5 2.7 -40 -25 -10 5 20 35 50 65 80 v dd (v) temperature (c) v dd legend u = 000 n = 001 s = 010 6 = 011 v dd (v) temperature (c) 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5 -40 -25 -10 5 20 35 50 65 80 v dd legend u = 000 n = 001 s = 010 6 = 011 HCS362 ds40189d-page 8 preliminary ? 2002 microchip technology inc. 3.0 device operation the HCS362 will wake-up upon detecting a switch clo- sure and then delay for switch debounce (figure 3-1). the synchronization information, fixed information and switch information will be encrypted to form the hop- ping code. the encrypted or hopping code portion of the transmission will change every time a button is pressed, even if the same button is pushed again. keeping a button pressed for a long time will result in the same code word being transmitted until the button is released or time-out occurs. the time-out time can be selected with the time-out ( timout [ 0..1 ]) configuration option. this option allows the time-out to be disabled or set to 0.8 s, 3.2 s or 25.6 s. when a time-out occurs, the device will go into sleep mode to protect the battery from draining when a button gets stuck. if in the transmit process, it is detected that a new but- ton is pressed, the current code word will be aborted. a new code word will be transmitted and the time-out counter will reset. if all the buttons are released, the minimum code words will be completed. the minimum code words can be set to 1,2,4 or 8 using the minimum code words ( mtx [ 0..1 ]) configuration option. if the time for transmitting the minimum code words is longer than the time-out time, the device will not complete the minimum code words. a code that has been transmitted will not occur again for more than 64k transmissions. this will provide more than 18 years of typical use before a code is repeated based on 10 operations per day. overflow information programmed into the encoder can be used by the decoder to extend the number of unique trans- missions to more than 192k. figure 3-1: basic flow diagram of the device operation note: buttons removed will not have any effect on the code word unless no but- tons remain pressed in which case the current code word will be completed and the power-down will occur. start sample buttons increment seed time-out encrypt no no yes get config. tx? counter transmit mtx no buttons seed time read seed stop yes yes no yes no no yes yes yes seed button no new buttons no no ? 2002 microchip technology inc. preliminary ds40189d-page 9 HCS362 3.1 transmission modulation format the HCS362 transmission is made up of several code words. each code word starts with a preamble and a header, followed by the data (see figure 3-1 and figure 3-2). the code words are separated by a guard time that can be set to 0 ms, 6.4 ms, 25.6 ms or 76.8 ms with the guard time select ( guard [ 0..1 ]) configuration option. all other timing specifications for the modulation formats are based on a basic timing element (t e ). this timing element can be set to 100 m s, 200 m s, 400 m s or 800 m s with the baud rate select ( bsel [ 0..1 ]) configuration option. the header time can be set to 3t e or 10 t e with the header select (header) con- figuration option. there are two different modulation formats available on the HCS362 that can be set according to the modula- tion select (mod) configuration option: ? pulse width modulation (pwm) ? manchester encoding the various formats are shown in figure 3-3 and figure 3-4. figure 3-2: code word transmission sequence figure 3-3: transmission format (pwm) figure 3-4: transmission format (manchester) header encrypt fixed guard 1 code word preamble encrypt preamble header logic "1" guard time 31 t e encrypted portion fixed code portion logic "0" preamble 3-10 header t e t e t e t e 1 16 t bp guard preamble header encrypted fixed code 1 2 start bit stop bit time portion portion 16 bit 0 bit 1 bit 2 logic "0" logic "1" t e t e t bp HCS362 ds40189d-page 10 preliminary ? 2002 microchip technology inc. 3.1.1 code hopping data the hopping portion is calculated by encrypting the counter, discrimination value and function code with the encoder key (key). the counter is a 16-bit counter. the discrimination value is 10 bits long and there are 2 counter overflow bits (ovr) that are cleared when the counter wraps to 0. the rest of the 32 bits are made up of the function code also known as the button inputs. 3.1.2 fixed code data the 32 bits of fixed code consist of 28 bits of the serial number (ser) and another copy of the function code. this can be changed to contain the whole 32-bit serial number with the extended serial number (xser) con- figuration option. 3.1.3 status information the status bits will always contain the output of the low voltage detector (v low ), the cyclic redundancy check (crc) bits (or time bits depending on ctsel) and the button queue information. 3.1.3.1 low voltage detector status (v low ) the output of the low voltage detector is transmitted with each code word. if v dd drops below the selected voltage, a logic 1 will be transmitted. the output of the detector is sampled before each code word is transmit- ted. 3.1.3.2 button queue information (queue) the queue bits indicate a button combination was pressed again within 2 s after releasing the previous activation. queuing or repeated pressing of the same buttons (or button combination) is detected by the HCS362 button debouncing circuitry. the queue bits are added as the last two bits of the standard code word. the queue bits are a 2-bit counter that does not wrap. the counter value starts at 00b and is incremented, if a button is pushed within 2 s of the previous button press. the current code word is ter- minated when the buttons are queued. this allows additional functionality for repeated button presses. the button inputs are sampled every 6.4 ms during this 2 s period. 00 - first activation 01 - second activation 10 - third activation 11 - from fourth activation on 3.1.3.3 cyclic redundancy check (crc) the crc bits are calculated on the 65 previously trans- mitted bits. the decoder can use the crc bits to check the data integrity before processing starts. the crc can detect all single bit errors and 66% of double bit errors. the crc is computed as follows: equation 3-1: crc calculation and with and di n the nth transmission bit 0 n 64 note: the crc may be wrong when the bat- tery voltage is around either of the v low trip points. this may happen because v low is sampled twice each transmission, once for the crc calcu- lation (pwm is low) and once when v low is transmitted (pwm is high). v dd tends to move slightly during a transmission which could lead to a dif- ferent value for v low being used for the crc calculation and the transmis- sion. work around: if the crc is incorrect, recalculate for the opposite value of v low . crc 1 [] n1 + crc 0 [] n di n ? = crc 0 [] n1 + crc 0 [] n di n ? () crc 1 [] n ? = crc 1 0 , [] 0 0 = ? 2002 microchip technology inc. preliminary ds40189d-page 11 HCS362 figure 3-5: code word data format transmission direction lsb first fixed portion (32 bits) que 2 bits crc 2 bits v low 1-bit serial number (32 bits) q1 q0 c1 c0 but 4 bits counter overflow 2 bits disc 10 bits synchronization 16 bits counter 15 0 s2 s1 s0 s3 ovr1 ovr0 encrypted portion (32 bits) with xser = 1, ctsel = 0 status information (5 bits) fixed portion (32 bits) que 2 bits time 2 bits v low 1-bit serial number (28 bits) q1 q0 t1 t0 s2 s1 s0 s3 with xser = 1, ctsel = 1 status information (5 bits) but 4 bits but 4 bits counter overflow 2 bits disc 10 bits synchronization 16 bits counter 15 0 s2 s1 s0 s3 ovr1 ovr0 encrypted portion (32 bits) fixed code portion (32 bits) que 2 bits crc 2 bits v low 1-bit serial number (28 bits) q1 q0 c1 c0 s2 s1 s0 s3 status information (5 bits) but 4 bits but 4 bits counter overflow 2 bits disc 10 bits synchronization 16 bits counter 15 0 s2 s1 s0 s3 ovr1 ovr0 encrypted portion (32 bits) with xser = 0, ctsel = 0 fixed portion (32 bits) que 2 bits time 2 bits v low 1-bit serial number (32 bits) q1 q0 t1 t0 but 4 bits counter overflow 2 bits disc 10 bits synchronization 16 bits counter 15 0 s2 s1 s0 s3 ovr1 ovr0 encrypted portion (32 bits) status information (5 bits) with xser = 0, ctsel = 1 HCS362 ds40189d-page 12 preliminary ? 2002 microchip technology inc. 3.1.4 minimum code words mtx[0..1] configuration bits selects the minimum number of code words that will be transmitted. if the button is released after 1.6 s (or greater) and mtx code words have been transmitted, the code word being transmitted will be terminated. the possible values are: 00 - 1 01 - 2 10 - 4 11 - 8 3.1.5 time bits the time bits indicate the duration that the inputs were activated: 00 - immediate 01 - after 0.8 s 10 - after 1.6 s 11 - after 2.4 s the time bits are incremented every 0.8 s and does not wrap once it reaches 11 . time information is alternative to the crc bits availabil- ity and is selected by the ctsel configuration bit. figure 3-6: time bits operation 3.2 led output the led pin will be driven low periodically while the HCS362 is transmitting data, in order to switch on an external led. the duty cycle (t ledon /t ledoff ) can be selected between two possible values by the configuration option (led). figure 3-7: led operation (led = 1) the same configuration option determines whether when the v dd voltage drops below the selected v low trip point, the led will blink only once or stop blinking. figure 3-8: led operation (led = 0) t td time data = one code word time bits = 00 time bits set internally to 01 time bits actually output time bits set internally to 10 time bits actually output 0 s 0.8 s 1.6 s 2.4 s s[3210] s[3210] led v dd > v low t ledon = 25 ms t ledoff led v dd < v low t ledon t ledoff = 500 ms note: when the HCS362 encoder is used as a dual encoder the led pin is used as a shift input (figure 2-2). in such a configuration the led is always on during transmission. to keep power consumption low, it is recommended to use a series resistor of relatively high value. v low information is not available when using the second encryption key. led v dd < v low s[3210] led v dd > v low t ledon t ledoff t ledon = 200 ms t ledoff = 800 ms ? 2002 microchip technology inc. preliminary ds40189d-page 13 HCS362 3.3 seed code word data format a seed transmission transmits a code word that con- sists of 60 bits of fixed data that is stored in the eeprom. this can be used for secure learning of encoders or whenever a fixed code transmission is required. the seed code word further contains the function code and the status information (v low , crc and queue) as configured for normal code hopping code words. the seed code word format is shown in figure 3-9. the function code for seed code words is always 1111b . seed code words can be configured as follows: ? enabled permanently. ? disabled permanently. ? enabled until the synchronization counter is greater than 7fh, this configuration is often referred to as limited seed . ? the time before the seed code word is transmitted can be set to 1.6 s or 3.2 s, this configuration is often referred to as delayed seed . when this option is selected, the HCS362 will transmit a code hopping code word for 1.6 s or 3.2 s, before the seed code word is transmitted. figure 3-9: seed code word format 3.3.1 seed options the button combination ( s[3210] ) for transmitting a seed code word can be selected with the seed and seedc ( seed [ 0..1 ] and seedc ) configuration options as shown in table 3-1 and table 3-2: table 3-1: seed options (seedc = 0) table 3-2: seed options (seedc = 1) example a): selecting seedc = 1 and seed = 11 : makes seed transmission available every time the combination of buttons s3 and s0 is pressed simulta- neously, but delayed seed mode is not available. example b): selecting seedc = 0 and seed = 01 : makes seed transmission available only for a limited time (only up to 128 times). the combination of buttons s2 and s0 produces an immediate transmission of the seed code. pressing and holding for more than 1.6 seconds the s0 button alone, produces the seed code word transmission (delayed seed). transmission direction lsb first fixed portion que (2 bits) crc (2 bits) v low (1-bit) seed with quen = 1 but (4 bits) (9 bits) seed code (60 bits) q1 q0 c1 c0 s2 s1 s0 s3 seed 1.6 s delayed seed seed s[3210] s[3210] 00 - - 01 0101* 0001* 10 0101 0001 11 0101 - note: *limited seed seed 3.2 s delayed seed seed s[3210] s[3210] 00 - - 01 1001* 0011* 10 1001 0011 11 1001 - note: *limited seed HCS362 ds40189d-page 14 preliminary ? 2002 microchip technology inc. 3.4 rf enable and pll interface the s3/rfen pin of the HCS362 can be configured to function as an rf enable output signal. this is selected by the rf enable output (rfen) configuration option. when enabled, this pin will be driven high before data is transmitted through the data pin. the rf enable and data output are synchronized so to interface with rf pll circuits operating in ask mode. figure 3-10 shows the startup sequence. the rfen signal will go low at the end of the last code word, including the guard time. when the rf enable output is selected, the s3 pin can still be used as a button input. the debouncing logic will be affected though, considerably reducing the respon- siveness of the button input. figure 3-10: pll interface note: when the rf enable output feature is used and a four (or more) buttons input configu- ration is required, the use of a scheme sim- ilar to figure 2-1 (scheme c) is recommended. s[3210] rfen data t td t rfon guard time 1st code word t g button press button release 2nd code word ? 2002 microchip technology inc. preliminary ds40189d-page 15 HCS362 4.0 eeprom memory organization the HCS362 contains 288 bits (18 x 16-bit words) of eeprom memory (table 4-1). this eeprom array is used to store the encryption key information and synchronization value. further descriptions of the memory array is given in the following sections. table 4-1: eeprom memory map 4.1 key_0 - key_3 (64-bit crypt key) the 64-bit crypt key is used to create the encrypted message transmitted to the receiver. this key is calcu- lated and programmed during production using a key generation algorithm. the key generation algorithm may be different from the k ee l oq algorithm. inputs to the key generation algorithm are typically the transmit- ters serial number and the 64-bit manufacturers code. while the key generation algorithm supplied from microchip is the typical method used, a user may elect to create their own method of key generation. this may be done providing that the decoder is programmed with the same means of creating the key for decryption purposes. 4.2 sync (synchronization counter) this is the 16-bit synchronization value that is used to create the hopping code for transmission. this value will be incremented after every transmission. 4.3 seed_0, seed_1, seed_2, and seed 3 (seed word) this is the four word (60 bits) seed code that will be transmitted when seed transmission is selected. this allows the system designer to implement the secure learn feature or use this fixed code word as part of a dif- ferent key generation/tracking process or purely as a fixed code transmission. 4.4 serial_0, serial_1 (encoder serial number) ser_0 and ser_1 are the lower and upper words of the device serial number, respectively. there are 32 bits allocated for the serial number and a selectable configuration bit determines whether 32 or 28 bits will be transmitted. the serial number is meant to be unique for every transmitter. word address field description 0 key1_0 64-bit encryption key1 (word 0) lsb 1 key1_1 64-bit encryption key1 (word 1) 2 key1_2 64-bit encryption key1 (word 2) 3 key1_3 64-bit encryption key1 (word 3) msb 4 key2_0 64-bit encryption key2 (word 0) lsb 5 key2_1 64-bit encryption key2 (word 1) 6 key2_2 64-bit encryption key2 (word 2) 7 key2_3 64-bit encryption key2 (word 3) msb 8 seed_0 seed value (word 0) lsb 9 seed_1 seed value (word 1) 10 seed_2 seed value (word 2) 11 seed_3 seed value (word 3) msb 12 config_0 configuration word (word 0) 13 config_1 configuration word (word 1) 14 serial_0 serial number (word 0) lsb 15 serial_1 serial number (word 1) msb 16 sync synchronization counter 17 res reserved C set to zero note: upper four significant bits of seed_3 con- tains extra configuration information (see table 4-4). HCS362 ds40189d-page 16 preliminary ? 2002 microchip technology inc. 4.5 configuration words there are 36 configuration bits stored in the eeprom array. they are used by the device to determine trans- mission speed, format, delays and guard times. they are grouped in three configuration words: config_0 , config_1 and the upper nibble of the seed_3 word. a description of each of the bits follows this section. table 4-2: config_0 4.5.1 osc the internal oscillator can be tuned to 10%. ( 0000 selects the nominal value, 1000 the fastest value and 0111 the slowest). when programming the device, it is the programmers responsibility to determine the opti- mal calibration value. 4.5.2 vlow[0..2] the low voltage threshold can be programmed to be any of the values shown in the following table: 4.5.3 bsel[0..1] the basic timing element t e , determines the actual transmission baud rate. this translates to different code word lengths depending on the encoding format selected (manchester or pwm), the header length selection and the guard time selection, from approxi- mately 40 ms up to 220 ms. refer to table 7-4 and table 7-5 for a more complete description. 4.5.4 mtx[0..1] mtx selects the minimum number of code words that will be transmitted. a minimum of 1, 2, 4 or 8 code words will be transmitted. bit address field description values 0 osc_0 oscillator adjust 0000 - nominal 1000 - fastest 0111 - slowest 1 osc_1 2 osc_2 3 osc_3 4 vlow_0 v low select nominal values 5 vlow_1 000 - 2.0v 001 - 2.1v 010 - 2.2v 011 - 2.3v 100 - 4.0v 101 - 4.2v 110 - 4.4v 111 - 4.6v 6 vlow_2 7 bsel_0 bitrate select 00 - t e = 100 m s 01 - t e = 200 m s 10 - t e = 400 m s 11 - t e = 800 m s 8 bsel_1 9 mtx_0 minimum number of code words 00 - 1 01 - 2 10 - 4 11 - 8 10 mtx_1 11 guard_0 guard time select 00 - 0 ms (1 t e ) 01 - 6.4 ms + 2 t e 10 - 25.6 ms + 2 t e 11 - 76.8 ms + 2 t e 12 guard_1 13 timout_0 time-out select 00 - no time-out 01 - 0.8 s to 0.8 s + 1 code word 10 - 3.2 s to 3.2 s + 1 code word 11 - 25.6 s to 25.6 s + 1 code word 14 timout_1 15 ctsel ctsel 0 = time bits 1 = crc bits note: if mtx and bsel settings in combination require a transmission sequence to exceed the timout setting, timout will take priority. ? 2002 microchip technology inc. preliminary ds40189d-page 17 HCS362 4.5.5 guard the guard time between code words can be set to 0 ms, 6.4 ms, 25.6 ms and 76.8 ms. if during a series of code words, the output changes from hopping code to seed the guard time will increase by 3 x t e . 4.5.6 timout[0..1] the transmission time-out can be set to 0.8 s, 3.2 s, 25.6 s or no time-out. after the time-out period, the encoder will stop transmission and enter a low power shutdown mode. table 4-3: config_1 4.5.7 disc[0..9] the discrimination bits are used to validate the decrypted code word. the discrimination value is typi- cally programmed with the 10 least significant bits of the serial number or a fixed value. 4.5.8 ovr[0..1] the overflow bits are used to extend the possible code combinations to 192k. if the overflow bits are not going to be used they can be programmed to zero. 4.5.9 xser if xser is enabled a 32-bit serial number is transmit- ted. if xser is disabled a 28-bit serial number and a 4- bit function code are transmitted. 4.5.10 seed[0..1] the seed value which is transmitted on key combina- tions ( 0011 ) and ( 1001 ) can be disabled, enabled or enabled for a limited number of transmissions deter- mined by the initial counter value. in limited seed mode, the device will output the seed if the sync counter (section 4.2) is from 00hex to 7fhex. for a counter higher than 7f, a normal hopping code will be output. 4.5.11 seedc seedc selects between seed transmission on 0001 and 0101 ( seedc = 0 ) and 0011 and 1001 ( seedc = 1 ). the delay before seed transmission is 1.6 s for ( seedc = 0 ) and 3.2 s for ( seedc = 1 ). bit address field description values 0 disc_0 discrimination bits disc [ 9:0 ] 1 disc_1 2 disc_2 ... ... 8 disc_8 9 disc_9 10 ovr_0 overflow ovr [ 1:0 ] 11 ovr_1 12 xser extended serial number 0 - disable 1 - enable 13 seedc seed control 0 = seed transmission on: s[3210] = 0001 (delay 1.6 s) s[3210] = 0101 (immediate) 1 = seed transmission on: s[3210] = 0011 (delay 3.2 s) s[3210] = 1001 (immediate) 14 seed_0 seed options 00 - no seed 01 - limited seed (permanent and delayed) 10 - permanent and delayed seed 11 - permanent seed only 15 seed_1 note: whenever a seed code word is output, the 4 function bits (figure 7-4) will be set to all ones [ 1,1,1,1 ]. HCS362 ds40189d-page 18 preliminary ? 2002 microchip technology inc. table 4-4: seed_3 4.5.12 header when pwm mode is selected the header length (low time between preamble and data bits start) can be set to 10 x t e or 3 x t e . the 10 x t e mode is recommended for compatibility with previous k ee l oq encoder mod- els. in manchester mode, the header length is fixed and set to 4 x t e . 4.5.13 rfen rfen selects whether the rfen output is enabled or disabled. if enabled, s3 is only sampled 2 s after the last button is released and at the start of the first trans- mission. if disabled s3 functions the same as the other s inputs. bit address field description values 0 seed_48 seed most significant word 1 seed_49 2 seed_50 ... ... 9 seed_57 10 seed_58 11 seed_59 12 led led output timing 0 = v bot >v low led blink 200/800 ms v bot ? 2002 microchip technology inc. preliminary ds40189d-page 19 HCS362 4.6 synchronous mode in synchronous mode, the code word can be clocked out on data using s2 as a clock. to enter synchro- nous mode, data and s0 must be taken high and then s2 is taken high. after synchronous mode is entered, s0 must be taken low. the data is clocked out on data on every rising edge of s2. auto-shutoff timer is not disabled in synchronous mode. this can be used to implement rf testing. figure 4-1: synchronous transmission mode figure 4-2: code word organization (synchronous transmission mode) 01,10,11 data s2 s[1:0] t ps t ph 1 t ph 2 t = 50ms preamble header data rfen t rfon queue (2 bits) crc (2 bits) vlow (1-bit) button status s2 s1 s0 s3 serial number (28 bits) button status s2 s1 s0 s3 disc+ ovr (12 bits) sync counter (16 bits) 69 data bits transmitted lsb first. lsb msb fixed portion encrypted portion HCS362 ds40189d-page 20 preliminary ? 2002 microchip technology inc. 5.0 programming the HCS362 when using the HCS362 in a system, the user will have to program some parameters into the device, including the serial number and the secret key before it can be used. the programming cycle allows the user to input all 288 bits in a serial data stream, which are then stored internally in eeprom. programming will be initiated by forcing the data line high, after the s2 line has been held high for the appropriate length of time (table 5-1 and figure 5-1). after the program mode is entered, a delay must be provided to the device for the automatic bulk write cycle to complete. this will write all locations in the eeprom to an all zeros pattern includ- ing the osc calibration bits. the device can then be programmed by clocking in 16 bits at a time, using s2 as the clock line and data as the data in-line. after each 16-bit word is loaded, a pro- gramming delay is required for the internal program cycle to complete. this delay can take up to twc. at the end of the programming cycle, the device can be veri- fied (figure 5-2) by reading back the eeprom. read- ing is done by clocking the s2 line and reading the data bits on data. for security reasons, it is not possible to execute a verify function without first programming the eeprom. a verify operation can only be done once, immediately following the program cycle . figure 5-1: programming waveforms figure 5-2: verify waveforms note: to ensure that the device does not accidentally enter programming mode, pwm should never be pulled high by the circuit connected to it. special care should be taken when driving pnp rf transistors. data enter program mode (data) (clock) note 1: unused button inputs to be held to ground during the entire programming sequence. bit 0 bit 1 bit 2 bit 3 bit 14 bit 15 bit 16 bit 17 t ph 1 t pbw t ps repeat for each word (18 times) t ph 2 t clkh t clkl t wc t ds s2 (s3) data for word 0 (key_0) data for word 1 t dh 2: the v dd pin must be taken to ground after a program/verify cycle. data (clock) (data) note: if a verify operation is to be done, then it must immediately follow the program cycle. end of programming cycle beginning of verify cycle bit 1 bit 2 bit 3 bit 15 bit 14 bit 16 bit 17 bit286 bit287 t wc data from word 0 t dv s2 (s3) bit 0 bit287 bit286 ? 2002 microchip technology inc. preliminary ds40189d-page 21 HCS362 table 5-1: programming/verify timing requirements v dd = 5.0v 10% 25 c 5 c parameter symbol min. max. units program mode setup time t ps 3.5 4.5 ms hold time 1 t ph 1 3.5 ms hold time 2 t ph 2 50 m s bulk write time t pbw 4.0 ms program delay time t prog 4.0 ms program cycle time t wc 50 ms clock low time t clkl 50 m s clock high time t clkh 50 m s data setup time t ds 0 m s data hold time t dh 30 m s data out valid time t dv 30 m s HCS362 ds40189d-page 22 preliminary ? 2002 microchip technology inc. 6.0 integrating the HCS362 into a system use of the HCS362 in a system requires a compatible decoder. this decoder is typically a microcontroller with compatible firmware. microchip will provide (via a license agreement) firmware routines that accept transmissions from the HCS362 and decrypt the hopping code portion of the data stream. these routines provide system designers the means to develop their own decoding system. 6.1 learning a transmitter to a receiver a transmitter must first be 'learned' by a decoder before its use is allowed in the system. several learning strat- egies are possible, figure 6-1 details a typical learn sequence. core to each, the decoder must minimally store each learned transmitter's serial number and cur- rent synchronization counter value in eeprom. addi- tionally, the decoder typically stores each transmitter's unique crypt key. the maximum number of learned transmitters will therefore be relative to the available eeprom. a transmitter's serial number is transmitted in the clear but the synchronization counter only exists in the code word's encrypted portion. the decoder obtains the counter value by decrypting using the same key used to encrypt the information. the k ee l oq algorithm is a symmetrical block cipher so the encryption and decryp- tion keys are identical and referred to generally as the crypt key. the encoder receives its crypt key during manufacturing. the decoder is programmed with the ability to generate a crypt key as well as all but one required input to the key generation routine; typically the transmitter's serial number. figure 6-1 summarizes a typical learn sequence. the decoder receives and authenticates a first transmis- sion; first button press. authentication involves gener- ating the appropriate crypt key, decrypting, validating the correct key usage via the discrimination bits and buffering the counter value. a second transmission is received and authenticated. a final check verifies the counter values were sequential; consecutive button presses. if the learn sequence is successfully com- plete, the decoder stores the learned transmitter's serial number, current synchronization counter value and appropriate crypt key. from now on the crypt key will be retrieved from eeprom during normal opera- tion instead of recalculating it for each transmission received. certain learning strategies have been patented and care must be taken not to infringe. figure 6-1: typical learn sequence enter learn mode wait for reception of a valid code generate key from serial number use generated key to decrypt compare discrimination value with fixed value equal wait for reception of second valid code compare discrimination value with fixed value use generated key to decrypt equal counters encryption key serial number synchronization counter sequential ? ? ? exit learn successful store: learn unsuccessful no no no yes yes yes ? 2002 microchip technology inc. preliminary ds40189d-page 23 HCS362 6.2 decoder operation figure 6-2 summarizes normal decoder operation. the decoder waits until a transmission is received. the received serial number is compared to the eeprom table of learned transmitters to first determine if this transmitter's use is allowed in the system. if from a learned transmitter, the transmission is decrypted using the stored crypt key and authenticated via the discrimination bits for appropriate crypt key usage. if the decryption was valid the synchronization value is evaluated. figure 6-2: typical decoder operation 6.3 synchronization with decoder (evaluating the counter) the k ee l oq technology patent scope includes a sophisticated synchronization technique that does not require the calculation and storage of future codes. the technique securely blocks invalid transmissions while providing transparent resynchronization to transmitters inadvertently activated away from the receiver. figure 6-3 shows a 3-partition, rotating synchronization window. the size of each window is optional but the technique is fundamental. each time a transmission is authenticated, the intended function is executed and the transmission's synchronization counter value is stored in eeprom. from the currently stored counter value there is an initial "single operation" forward win- dow of 16 codes. if the difference between a received synchronization counter and the last stored counter is within 16, the intended function will be executed on the single button press and the new synchronization counter will be stored. storing the new synchronization counter value effectively rotates the entire synchroniza- tion window. a "double operation" (resynchronization) window fur- ther exists from the single operation window up to 32k codes forward of the currently stored counter value. it is referred to as "double operation" because a trans- mission with synchronization counter value in this win- dow will require an additional, sequential counter transmission prior to executing the intended function. upon receiving the sequential transmission the decoder executes the intended function and stores the synchronization counter value. this resynchronization occurs transparently to the user as it is human nature to press the button a second time if the first was unsuc- cessful. the third window is a "blocked window" ranging from the double operation window to the currently stored synchronization counter value. any transmission with synchronization counter value within this window will be ignored. this window excludes previously used, perhaps code-grabbed transmissions from accessing the system. ? transmission received does serial number match ? decrypt transmission is decryption valid ? is counter within 16 ? is counter within 32k ? update counter execute command save counter in temp location start no no no no yes yes yes yes yes no and no note: the synchronization method described in this section is only a typical implementation and because it is usually implemented in firmware, it can be altered to fit the needs of a particular system. HCS362 ds40189d-page 24 preliminary ? 2002 microchip technology inc. figure 6-3: synchronization window blocked entire window rotates to eliminate use of previously used codes single operation window window (32k codes) (16 codes) double operation (resynchronization) window (32k codes) stored synchronization counter value ? 2002 microchip technology inc. preliminary ds40189d-page 25 HCS362 7.0 electrical characteristics table 7-1: absolute maximum ratings symbol item rating units v dd supply voltage -0.3 to 6.6 v v in input voltage -0.3 to v dd + 0.3 v v out output voltage -0.3 to v dd + 0.3 v i out max output current 20 ma t stg storage temperature -55 to +125 c t lsol lead soldering temperature 300 c v esd esd rating 4,000 v note: stresses above those listed under absolute maximum ratings may cause permanent damage to the device. table 7-2: dc characteristics industrial (i): t amb = -40 c to +85 c 2.0v < v dd < 6.3 parameter sym. min. typ. (1) max. unit conditions operating current (avg.) i cc 0.31.2ma v dd = 6.3v standby current i ccs 0.11.0 m av dd = 6.3v auto-shutoff current (2,3) i ccs 40 75 m a high level input voltage v ih 0.65 v dd v dd + 0.3 v v dd = 2.0v low level input voltage v il -0.3 0.15 v dd vv dd = 2.0v high level output voltage v oh 0.7 v dd 0.7 v dd vi oh = -1.0 ma, v dd = 2.0v i oh = -2.0 ma, v dd = 6.3v low level output voltage v ol 0.15 v dd 0.15 v dd vi ol = 1.0 ma, v dd = 2.0v i ol = 2.0 ma, v dd = 6.3v rfen pin high drive i rfen 0.5 1.0 1 2.5 3.0 5.0 ma v rfen = 1.4v v dd = 2.0v v rfen = 4.4v v dd = 6.3v led sink current i ledl i ledh 1.0 2.0 3.5 4.5 6.0 7.0 ma ma v led = 1.5v, v dd = 3.0v v led = 1.5v, v dd = 6.3v pull-down resistance; s0-s3 r s 0-3 40 60 80 k w v dd = 4.0v pull-down resistance; pwm r pwm 80 120 160 k w v dd = 4.0v note 1: typical values are at 25 c. 2: auto-shutoff current specification does not include the current through the input pull-down resistors. 3: these values are characterized but not tested. HCS362 ds40189d-page 26 preliminary ? 2002 microchip technology inc. figure 7-1: power-up and transmit timing table 7-3: power-up and transmit timing requirements (3) v dd = +2.0 to 6.3v industrial (i): t amb = -40 c to +85 c parameter symbol min. typical max. unit remarks transmit delay from button detect t td 26 30 40 ms (note 1) debounce delay t db 18 20 22 ms auto-shutoff time-out period (timo=10) t to 23.4 25.6 28.16 s (note 2) rfen after key press t rfon 22 26 36 ms led on after key press t led 25 45 ms time to terminate code word from previous button press t tp 10 ms note 1: transmit delay maximum value if the previous transmission was successfully transmitted. 2: the auto-shutoff time-out period is not tested. 3: these values are characterized but not tested s n t db data t td t to code word 1 code word 2 code word 3 code word n t tp button press detect rfen led t rfon t led 1 t e code word from previous button press ? 2002 microchip technology inc. preliminary ds40189d-page 27 HCS362 figure 7-2: pwm format summary (mod=0) figure 7-3: pwm preamble/header format (mod=0) figure 7-4: pwm data format (mod = 0) logic "1" guard time 31 x t e encrypted portion fixed portion logic "0" preamble header t e t e t e 10xt e 1 16 of transmission of transmission preamble 50% duty cycle t bp 50% duty cycle preamble p1 p16 31xt e 3 or 10xt e header data bits bit 0 bit 1 bit 0 bit 1 header bit 30 bit 31 bit 32 bit 33 bit 58 bit 59 fixed portion of transmission encrypted portion guard lsb lsb msb msb s3 s0 s1 s2 v low crc0 crc1 time serial number function code status bit 60 bit 61 bit 62 bit 63 bit 64 bit 65 crc/time bit 66 queue q0 q1 bit 67 bit 68 HCS362 ds40189d-page 28 preliminary ? 2002 microchip technology inc. figure 7-5: manchester format summary (mod=1) figure 7-6: manchester preamble/header format (mod=1) guard preamble header encrypted portion fixed portion 1 2 start bit stop bit time 16 bit 0 bit 1 bit 2 logic "0" logic "1" t e t e 4 x t e 31 x t e of transmission of transmission preamble 50% duty cycle t pb preamble header 31 x t e 4 x t e bit 0 bit 1 data word transmission p1 p16 ? 2002 microchip technology inc. preliminary ds40189d-page 29 HCS362 table 7-4: code word transmission timing parameters C pwm mode (1,3) table 7-5: code word transmission timing parametersmanchester mode (1,3) v dd = +2.0v to 6.3v commercial (c): t amb = 0 c to +70 c industrial (i): t amb = -40 c to +85 c bsel value 11 10 01 00 symbol characteristic typical typical typical typical units t e basic pulse element 800 400 200 100 m s t bp bit width 3333t e t p preamble duration 31 31 31 31 t e t h header duration (4) 10 10 10 10 t e t c data duration 207 207 207 207 t e t g guard time (2) 27.2 26.4 26 25.8 ms total transmit time 220 122 74 50 ms data rate 417 833 1667 3334 bps note 1: the timing parameters are not tested but derived from the oscillator clock. 2: assuming guard = 10 option selected in config_0 configuration word. 3: allow for a +/- 10% tolerance on the encoder internal oscillator after calibration. 4: assuming header = 1 option selected in seed_3 configuration word. v dd = +2.0v to 6.3v commercial (c): t amb = 0 c to +70 c industrial (i): t amb = -40 c to +85 c bsel value 11 10 01 00 symbol characteristic typical typical typical typical units t e basic pulse element (3) 800 400 200 100 m s t bp bit width 2222t e t p preamble duration 31 31 31 31 t e t h header duration 4 4 4 4 t e t c data duration 138 138 138 138 t e t g guard time (2) 26.8 26.4 26 25.8 ms total transmit time 166 96 61 43 ms data rate 625 1250 2500 5000 bps note 1: the timing parameters are not tested but derived from the oscillator clock. 2: assuming guard = 10 option selected in config_0 configuration word. 3: allow for a +/- 10% tolerance on the encoder internal oscillator after calibration. HCS362 ds40189d-page 30 preliminary ? 2002 microchip technology inc. 8.0 packaging information 8.1 package marking information xxxxxxxx xxxxxnnn yyww 8-lead pdip (300 mil) example: 8-lead tssop example: 8-lead soic (150 mil) example: xxxxxxxx xxxxyyww nnn xxxx xyww nnn HCS362 xxxxxnnn 0025 HCS362 xxxx0025 nnn 362 0025 nnn legend: xx...x customer specific information* y year code (last digit of calendar year) yy year code (last 2 digits of calendar year) ww week code (week of january 1 is week 01) nnn alphanumeric traceability code note : in the event the full microchip part number cannot be marked on one line, it will be carried over to the next line thus limiting the number of available characters for customer specific information. * standard picmicro device marking consists of microchip part number, year code, week code, and traceability code. for picmicro device marking beyond this, certain price adders apply. please check with your microchip sales office. for sqtp devices, any special marking adders are included in sqtp price. ? 2002 microchip technology inc. preliminary ds40189d-page 31 HCS362 8.2 package details 8-lead plastic dual in-line (p) C 300 mil (pdip) b1 b a1 a l a2 p a e eb b c e1 n d 1 2 units inches* millimeters dimension limits min nom max min nom max number of pins n 88 pitch p .100 2.54 top to seating plane a .140 .155 .170 3.56 3.94 4.32 molded package thickness a2 .115 .130 .145 2.92 3.30 3.68 base to seating plane a1 .015 0.38 shoulder to shoulder width e .300 .313 .325 7.62 7.94 8.26 molded package width e1 .240 .250 .260 6.10 6.35 6.60 overall length d .360 .373 .385 9.14 9.46 9.78 tip to seating plane l .125 .130 .135 3.18 3.30 3.43 lead thickness c .008 .012 .015 0.20 0.29 0.38 upper lead width b1 .045 .058 .070 1.14 1.46 1.78 lower lead width b .014 .018 .022 0.36 0.46 0.56 overall row spacing eb .310 .370 .430 7.87 9.40 10.92 mold draft angle top a 51015 51015 mold draft angle bottom b 51015 51015 * controlling parameter notes: dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not exceed jedec equivalent: ms-001 drawing no. c04-018 .010 (0.254mm) per side. significant characteristic HCS362 ds40189d-page 32 preliminary ? 2002 microchip technology inc. 8-lead plastic small outline (sn) C narrow, 150 mil (soic) foot angle f 048048 15 12 0 15 12 0 b mold draft angle bottom 15 12 0 15 12 0 a mold draft angle top 0.51 0.42 0.33 .020 .017 .013 b lead width 0.25 0.23 0.20 .010 .009 .008 c lead thickness 0.76 0.62 0.48 .030 .025 .019 l foot length 0.51 0.38 0.25 .020 .015 .010 h chamfer distance 5.00 4.90 4.80 .197 .193 .189 d overall length 3.99 3.91 3.71 .157 .154 .146 e1 molded package width 6.20 6.02 5.79 .244 .237 .228 e overall width 0.25 0.18 0.10 .010 .007 .004 a1 standoff 1.55 1.42 1.32 .061 .056 .052 a2 molded package thickness 1.75 1.55 1.35 .069 .061 .053 a overall height 1.27 .050 p pitch 8 8 n number of pins max nom min max nom min dimension limits millimeters inches* units 2 1 d n p b e e1 h l b c 45 f a2 a a a1 * controlling parameter notes: dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not exceed .010 (0.254mm) per side. jedec equivalent: ms-012 drawing no. c04-057 significant characteristic ? 2002 microchip technology inc. preliminary ds40189d-page 33 HCS362 8-lead plastic thin shrink small outline (st) C 4.4 mm (tssop) 10 5 0 10 5 0 b mold draft angle bottom 10 5 0 10 5 0 a mold draft angle top 0.30 0.25 0.19 .012 .010 .007 b lead width 0.20 0.15 0.09 .008 .006 .004 c lead thickness 0.70 0.60 0.50 .028 .024 .020 l foot length 3.10 3.00 2.90 .122 .118 .114 d molded package length 4.50 4.40 4.30 .177 .173 .169 e1 molded package width 6.50 6.38 6.25 .256 .251 .246 e overall width 0.15 0.10 0.05 .006 .004 .002 a1 standoff 0.95 0.90 0.85 .037 .035 .033 a2 molded package thickness 1.10 .043 a overall height 0.65 .026 p pitch 8 8 n number of pins max nom min max nom min dimension limits millimeters* inches units a a2 a a1 l c b f 1 2 d n p b e e1 foot angle f 048048 * controlling parameter notes: dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not exceed .005 (0.127mm) per side. jedec equivalent: mo-153 drawing no. c04-086 significant characteristic 013001 HCS362 ds40189d-page 34 preliminary ? 2002 microchip technology inc. on-line support microchip provides on-line support on the microchip world wide web (www) site. the web site is used by microchip as a means to make files and information easily available to customers. to view the site, the user must have access to the internet and a web browser, such as netscape ? or microsoft ? explorer. files are also available for ftp download from our ftp site. connecting to the microchip internet web site the microchip web site is available by using your favorite internet browser to attach to: www.microchip.com the file transfer site is available by using an ftp ser- vice to connect to: ftp://ftp.microchip.com the web site and file transfer site provide a variety of services. users may download files for the latest development tools, data sheets, application notes, user's guides, articles and sample programs. a vari- ety of microchip specific business information is also available, including listings of microchip sales offices, distributors and factory representatives. other data available for consideration is: ? latest microchip press releases ? technical support section with frequently asked questions ? design tips ? device errata ? job postings ? microchip consultant program member listing ? links to other useful web sites related to microchip products ? conferences for products, development systems, technical information and more ? listing of seminars and events systems information and upgrade hot line the systems information and upgrade line provides system users a listing of the latest versions of all of microchip's development systems software products. plus, this line provides information on how customers can receive any currently available upgrade kits. the hot line numbers are: 1-800-755-2345 for u.s. and most of canada, and 1-480-792-7302 for the rest of the world. ? 2002 microchip technology inc. preliminary ds40189d-page 35 HCS362 reader response it is our intention to provide you with the best documentation possible to ensure successful use of your microchip prod- uct. if you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation can better serve you, please fax your comments to the technical publications manager at (480) 792-7578. please list the following information, and use this outline to provide us with your comments about this data sheet. to: technical publications manager re: reader response total pages sent from: name company address city / state / zip / country telephone: (_______) _________ - _________ application (optional): would you like a reply? y n device: literature number: questions: fax: (______) _________ - _________ ds40189d HCS362 1. what are the best features of this document? 2. how does this document meet your hardware and software development needs? 3. do you find the organization of this data sheet easy to follow? if not, why? 4. what additions to the data sheet do you think would enhance the structure and subject? 5. what deletions from the data sheet could be made without affecting the overall usefulness? 6. is there any incorrect or misleading information (what and where)? 7. how would you improve this document? 8. how would you improve our software, systems, and silicon products? HCS362 ds40189d-page 36 preliminary ? 2002 microchip technology inc. HCS362 product identification system to order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. sales and support package: p = plastic dip (300 mil body), 8-lead sn = plastic soic (150 mil body), 8-lead st = plastic tssop (4.4mm body), 8-lead temperature i= C40 c to +85 c range: device: HCS362 code hopping encoder HCS362t code hopping encoder (tape and reel) HCS362 x/x data sheets products supported by a preliminary data sheet may have an errata sheet describing minor operational differences and recommended workarounds. to determine if an errata sheet exists for a particular device, please contact one of the following: 1. your local microchip sales office 2. the microchip corporate literature center u.s. fax: (480) 792-7277 3. the microchip worldwide site (www.microchip.com) please specify which device, revision of silicon and data sheet (include literature #) you are using. new customer notification system register on our web site (www.microchip.com/cn) to receive the most current information on our products. 2002 microchip technology inc. preliminary ds40189d - page 37 information contained in this publication regarding device applications and the like is intended through suggestion only and may be superseded by updates. it is your responsibility to ensure that your application meets with your specifications. no representation or warranty is given and no liability is assumed by microchip technology incorporated with respect to the accuracy or use of such information, or infringement of patents or other intellectual property rights arising from such use or otherwise. use of microchips products as critical com- ponents in life support systems is not authorized except with express written approval by microchip. no licenses are con- veyed, implicitly or otherwise, under any intellectual property rights. trademarks the microchip name and logo, the microchip logo, filterlab, k ee l oq , mplab, pic, picmicro, picmaster, picstart, pro mate, seeval and the embedded control solutions company are registered trademarks of microchip technology incorporated in the u.s.a. and other countries. dspic, economonitor, fansense, flexrom, fuzzylab, in-circuit serial programming, icsp, icepic, microid, microport, migratable memory, mpasm, mplib, mplink, mpsim, mxdev, picc, picdem, picdem.net, rfpic, select mode and total endurance are trademarks of microchip technology incorporated in the u.s.a. serialized quick turn programming (sqtp) is a service mark of microchip technology incorporated in the u.s.a. all other trademarks mentioned herein are property of their respective companies. ? 2002, microchip technology incorporated, printed in the u.s.a., all rights reserved. printed on recycled paper. microchip received qs-9000 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in chandler and tempe, arizona in july 1999. the companys quality system processes and procedures are qs-9000 compliant for its picmicro ? 8-bit mcus, k ee l oq ? code hopping devices, serial eeproms and microperipheral products. in addition, microchips quality system for the design and manufacture of development systems is iso 9001 certified. microchips secure data products are covered by some or all of the following patents: code hopping encoder patents issued in europe, u.s.a., and r.s.a. u.s.a.: 5,517,187; europe: 0459781; r.s.a.: za93/4726 secure learning patents issued in the u.s.a. and r.s.a. u.s.a.: 5,686,904; r.s.a.: 95/5429 ds40189d-page 38 preliminar y ? 2002 microchip technology inc. americas corporate office 2355 west chandler blvd. chandler, az 85224-6199 tel: 480-792-7200 fax: 480-792-7277 technical support: 480-792-7627 web address: http://www.microchip.com rocky mountain 2355 west chandler blvd. chandler, az 85224-6199 tel: 480-792-7966 fax: 480-792-7456 atlanta 500 sugar mill road, suite 200b atlanta, ga 30350 tel: 770-640-0034 fax: 770-640-0307 boston 2 lan drive, suite 120 westford, ma 01886 tel: 978-692-3848 fax: 978-692-3821 chicago 333 pierce road, suite 180 itasca, il 60143 tel: 630-285-0071 fax: 630-285-0075 dallas 4570 westgrove drive, suite 160 addison, tx 75001 tel: 972-818-7423 fax: 972-818-2924 detroit tri-atria office building 32255 northwestern highway, suite 190 farmington hills, mi 48334 tel: 248-538-2250 fax: 248-538-2260 kokomo 2767 s. albright road kokomo, indiana 46902 tel: 765-864-8360 fax: 765-864-8387 los angeles 18201 von karman, suite 1090 irvine, ca 92612 tel: 949-263-1888 fax: 949-263-1338 new york 150 motor parkway, suite 202 hauppauge, ny 11788 tel: 631-273-5305 fax: 631-273-5335 san jose microchip technology inc. 2107 north first street, suite 590 san jose, ca 95131 tel: 408-436-7950 fax: 408-436-7955 toronto 6285 northam drive, suite 108 mississauga, ontario l4v 1x5, canada tel: 905-673-0699 fax: 905-673-6509 asia/pacific australia microchip technology australia pty ltd suite 22, 41 rawson street epping 2121, nsw australia tel: 61-2-9868-6733 fax: 61-2-9868-6755 china - beijing microchip technology consulting (shanghai) co., ltd., beijing liaison office unit 915 bei hai wan tai bldg. no. 6 chaoyangmen beidajie beijing, 100027, no. china tel: 86-10-85282100 fax: 86-10-85282104 china - chengdu microchip technology consulting (shanghai) co., ltd., chengdu liaison office rm. 2401, 24th floor, ming xing financial tower no. 88 tidu street chengdu 610016, china tel: 86-28-6766200 fax: 86-28-6766599 china - fuzhou microchip technology consulting (shanghai) co., ltd., fuzhou liaison office unit 28f, world trade plaza no. 71 wusi road fuzhou 350001, china tel: 86-591-7503506 fax: 86-591-7503521 china - shanghai microchip technology consulting (shanghai) co., ltd. room 701, bldg. b far east international plaza no. 317 xian xia road shanghai, 200051 tel: 86-21-6275-5700 fax: 86-21-6275-5060 china - shenzhen microchip technology consulting (shanghai) co., ltd., shenzhen liaison office rm. 1315, 13/f, shenzhen kerry centre, renminnan lu shenzhen 518001, china tel: 86-755-2350361 fax: 86-755-2366086 hong kong microchip technology hongkong ltd. unit 901-6, tower 2, metroplaza 223 hing fong road kwai fong, n.t., hong kong tel: 852-2401-1200 fax: 852-2401-3431 india microchip technology inc. india liaison office divyasree chambers 1 floor, wing a (a3/a4) no. 11, oshaugnessey road bangalore, 560 025, india tel: 91-80-2290061 fax: 91-80-2290062 japan microchip technology japan k.k. benex s-1 6f 3-18-20, shinyokohama kohoku-ku, yokohama-shi kanagawa, 222-0033, japan tel: 81-45-471- 6166 fax: 81-45-471-6122 korea microchip technology korea 168-1, youngbo bldg. 3 floor samsung-dong, kangnam-ku seoul, korea 135-882 tel: 82-2-554-7200 fax: 82-2-558-5934 singapore microchip technology singapore pte ltd. 200 middle road #07-02 prime centre singapore, 188980 tel: 65-334-8870 fax: 65-334-8850 taiwan microchip technology taiwan 11f-3, no. 207 tung hua north road taipei, 105, taiwan tel: 886-2-2717-7175 fax: 886-2-2545-0139 europe denmark microchip technology nordic aps regus business centre lautrup hoj 1-3 ballerup dk-2750 denmark tel: 45 4420 9895 fax: 45 4420 9910 france microchip technology sarl parc dactivite du moulin de massy 43 rue du saule trapu batiment a - ler etage 91300 massy, france tel: 33-1-69-53-63-20 fax: 33-1-69-30-90-79 germany microchip technology gmbh gustav-heinemann ring 125 d-81739 munich, germany tel: 49-89-627-144 0 fax: 49-89-627-144-44 italy microchip technology srl centro direzionale colleoni palazzo taurus 1 v. le colleoni 1 20041 agrate brianza milan, italy tel: 39-039-65791-1 fax: 39-039-6899883 united kingdom arizona microchip technology ltd. 505 eskdale road winnersh triangle wokingham berkshire, england rg41 5tu tel: 44 118 921 5869 fax: 44-118 921-5820 01/18/02 w orldwide s ales and s ervice |
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