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general description the max8834y/MAX8834Z flash drivers integrate a 1.5a pwm dc-dc step-up converter and three pro- grammable low-side, low-dropout led current regula- tors. the step-up converter features an internal switching mosfet and synchronous rectifier to improve efficiency and minimize external component count. an i 2 c interface provides flexible control of step- up converter output voltage setting, movie/flash mode selection, flash timer duration settings, and current reg- ulator settings. the max8834y/MAX8834Z operate down to 2.5v, making them future proof for new battery technologies. the max8834y/MAX8834Z consist of two current regula- tors for the flash/movie mode. each current regulator can sink 750ma in flash mode and 125ma in movie mode. the max8834y/MAX8834Z also integrate a 16ma low- current regulator that can be used to indicate camera status. the indicator current regulator includes program- mable ramp and blink timer settings. a programmable input current limit, invoked using the gsmb control, reduces the total current drawn from the battery during pa transmit events. this ensures the flash current is set to the maximum possible for any given operating condi- tion. additionally, the max8834y/MAX8834Z include a maxflash* function that adaptively reduces flash cur- rent during low battery conditions to help prevent system undervoltage lockup. other features include an optional ntc input for finger- burn protection and open/short led detection. the max8834y switches at 2mhz, providing best overall efficiency. the MAX8834Z switches at 4mhz, providing smallest overall solution size. the max8834y/ MAX8834Z are available in a 20-bump, 0.5mm pitch wlp package (2.5mm x 2.0mm). * patent pending. features ? 2.5v to 5.5v operation range ? step-up dc-dc converter 1.5a guaranteed output current adaptive or i 2 c programmable output voltage 2mhz and 4mhz switching frequency options ? two flash/movie led current regulators i 2 c programmable flash and movie current low-dropout voltage (110mv max) at 500ma ? led indicator current regulator i 2 c programmable output current ramp and blink timers for indicator mode low-dropout voltage (130mv max) at 16ma ? i 2 c programmable safety and watchdog timers ? gsm blank logic input ? maxflash system lockup protection ? remote temperature sensor input ? open/short led detection ? thermal shutdown protection ? < 1? shutdown current ? 20-bump, 0.5mm pitch, 2.5mm x 2.0mm wlp max8834y/MAX8834Z adaptive step-up converters with 1.5a flash driver ________________________________________________________________ maxim integrated products 1 19-4421; rev 0; 4/09 for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. evaluation kit available in agnd pgnd lx out input 2.5v to 5.5v fled1 led_en scl sda v dd v logic i 2 c comp flash on 1.5a total flash programmable output 3.7v to 5.2v fled2 ntc gsmb pa_txon indled 16ma indicator finger-burn protection 1 h or 2.2 h max8834y MAX8834Z fgnd 10 f 10 f 0.1 f typical operating circuit ordering information part temp range pin-package switching frequency (mhz) max8834y ewp+t -40c to +85c 20 wlp (2.5mm x 2.0mm) 2 MAX8834Z ewp+t -40c to +85c 20 wlp (2.5mm x 2.0mm) 4 + denotes a lead(pb)-free/rohs-compliant package. t = tape and reel. pin configuration appears at end of data sheet. applications cell phones and smart phones pdas, digital cameras, and camcorders
max8834y/MAX8834Z adaptive step-up converters with 1.5a flash driver 2 _______________________________________________________________________________________ absolute maximum ratings electrical characteristics (v in = 3.6v, v agnd = v pgnd = v fgnd = 0v, v dd = 1.8v, t a = -40? to +85?, unless otherwise noted. typical values are at t a = +25?.) (note 1) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. * this device is constructed using a unique set of packaging techniques that impose a limit on the thermal profile the device can be exposed to during board level solder attach and rework. this limit permits only the use of the solder profiles recommended in the industry-standard spe cification, jedec 020a, para- graph 7.6, table 3 for ir/vpr and convection reflow. preheating is required. hand or wave soldering is not allowed. in, out, ntc to agnd .........................................-0.3v to +6.0v v dd to agnd.........................................................-0.3v to +4.0v scl, sda, led_en, gsmb to agnd ........-0.3v to (v dd + 0.3v) fled1, fled2, indled to fgnd ............-0.3v to (v out + 0.3v) comp to agnd ...........................................-0.3v to (v in + 0.3v) pgnd, fgnd to agnd .........................................-0.3v to +0.3v i lx current (rms) ......................................................................3a continuous power dissipation (t a = +70?) (derate 17.5mw/? above +70?) .............................1410mw operating temperature range ...........................-40? to +85? junction temperature ......................................................+150? storage temperature range .............................-65? to +150? bump temperature* (soldering) ......................................+260? parameter conditions min typ max units in operating voltage 2.5 5.5 v v dd operating range 1.62 3.6 v v dd undervoltage lockout (uvlo) threshold v dd falling 1.25 1.4 1.55 v v dd uvlo hysteresis 50 mv in uvlo threshold v in falling 2.15 2.3 2.45 v in uvlo hysteresis 50 mv in standby supply current v scl = v sda = v dd , v in = 5.5v, i 2 c ready 1 a v dd standby supply current (all outputs off, i 2 c enabled) v scl = v sda = v dd = 3.6v, i 2 c ready 4 7 a logic interface led_en, gsmb 1.4 logic input-high voltage v dd = 1.62v to 3.6v scl, sda 0.7 x v dd v led_en, gsmb 0.4 logic input-low voltage v dd = 1.62v to 3.6v scl, sda 0.3 x v dd v led_en minimum high time (led_en is internally sampled by a 1mhz clock) 1 s led_en propagation delay from led_en going high to rising edge on current regulator 3 s led_en and gsmb pulldown resistor 400 800 1600 k t a = +25 c -1 0.01 +1 logic input current (scl, sda) v il = 0v or v ih = 3.6v t a = +85 c 0.1 a
max8834y/MAX8834Z adaptive step-up converters with 1.5a flash driver _______________________________________________________________________________________ 3 parameter conditions min typ max units t a = +25 c -1 0.01 +1 shutdown leakage current in and v dd in uvlo, v led_en = v gsmb = 0v t a = +85 c 0.1 a i 2 c interface sda output low voltage i sda = 3ma 0.03 0.4 v i 2 c clock frequency 400 khz bus-free time between stop and start t buf 1.3 s hold time repeated start condition t hd_sta 0.6 0.1 s scl low period t low 1.3 0.2 s scl high period t high 0.6 0.2 s setup time repeated start condition t su_sta 0.6 0.1 s sda hold time t hd_dat 0 -0.01 s sda setup time t su_dat 100 50 ns setup time for stop condition t su_sto 0.6 0.1 s step-up dc-dc converter out voltage range 100mv steps 3.7 5.2 v out voltage accuracy no load, v out = 5v -2.75 0.5 +2.75 % out overvoltage protection when running in adaptive mode 5.2 5.35 5.5 v adaptive output voltage regulation threshold i fled1 = i fled2 = 492.24ma setting, i indled = 16ma 150 mv pgood window comparator v out = 5v, in programmable mode -15 -12.5 -10 % line regulation v in = 2.5v to 4.2v 0.1 %/v load regulation i out = 0ma to 1500ma 0.5 %/a nfet current limit 3.6 a lx nfet on-resistance lx to pgnd, i lx = 200ma 0.055 0.130 lx pfet on-resistance lx to out, i lx = 200ma 0.12 0.200 t a = +25 c 0.1 1 lx leakage v lx = 5.5v t a = +85 c 0.1 a input current limit range during gsmb tr igger 50 800 ma input current limit step size during gsmb trigger 50 ma input current limit accuracy i ilim = 100ma, in dropout mode -15 +15 % t a = +25 c 1.8 2 2.2 max8834y t a = -40 c to +85 c 1.6 2.4 t a = +25 c 3.6 4 4.4 operating frequency, no load MAX8834Z t a = -40 c to +85 c 3.2 4.8 mhz electrical characteristics (continued) (v in = 3.6v, v agnd = v pgnd = v fgnd = 0v, v dd = 1.8v, t a = -40? to +85?, unless otherwise noted. typical values are at t a = +25?.) (note 1)
max8834y/MAX8834Z adaptive step-up converters with 1.5a flash driver 4 _______________________________________________________________________________________ parameter conditions min typ max units maximum duty cycle v out = 4.5v 69 75 % minimum duty cycle v out = 4.5v 7.5 % comp transconductance v comp = 1.5v 55 s comp discharge resistance during shutdown or uvlo, from comp to agnd 120 out discharge resistance during shutdown or uvlo, from out to lx 10 k fled1/fled2 current regulator in supply current step-up off, fled1/fled2 on, supply current for each current source 0.6 ma flash 750 maximum current setting movie 125 ma 23.44ma setting t a = +25 c -5 +20 % t a = +25 c -2.5 0.5 +2.5 492.24ma setting t a = -40 c to +85 c -4 +4 % current accuracy 750ma setting t a = -40 c to +85 c -10 +5 % 492.24ma setting 110 current regulator dropout (note 2) 93.75ma setting 50 100 mv t a = +25 c -1 0.01 +1 fled1/fled2 leakage in shutdown v fled1 = v fled2 = 5.5v t a = +85 c 0.1 a indled current regulator in supply current step-up converter off, indled on 0.6 ma maximum current setting 16 ma 0.5ma setting t a = +25 c -10 +10 % t a = +25 c -3 0.5 +3 % current accuracy 16ma setting t a = -40 c to +85 c -5 +5 % current regulator dropout 16ma setting (note 2) 55 130 mv t a = +25 c -1 0.01 +1 indled leakage in shutdown v indled = 5.5v t a = +85 c 0.1 a protection circuits ntc bias current 19.4 20 20.6 a ntc overtemperature detection threshold v ntc falling, 100mv hysteresis, ntc_cntl[2:0] = 100 388 400 412 mv ntc short detection threshold v ntc falling 100 mv flash duration timer range in 50ms steps (note 3) 50 800 ms t a = +25 c 360 400 440 flash duration timer accuracy (400ms setting) t a = -40 c to +85 c 320 480 ms minimum flash duration flash_en[2:0] = 1xx 2 ms flash safety timer reset inhibit period from falling edge of led_en until flash safety timer is reset 30 ms watchdog timer range in 4s steps 4 16 s electrical characteristics (continued) (v in = 3.6v, v agnd = v pgnd = v fgnd = 0v, v dd = 1.8v, t a = -40? to +85?, unless otherwise noted. typical values are at t a = +25?.) (note 1)
max8834y/MAX8834Z adaptive step-up converters with 1.5a flash driver _______________________________________________________________________________________ 5 parameter conditions min typ max units t a = +25 c 3.6 4 4.4 watchdog timer accuracy (4s setting) t a = -40 c to +85 c 3.2 4.8 s open led detection threshold fled1, fled2, indled enabled 100 mv shorted led detection threshold fled1, fled2, indled enabled v out - 1v v open and short debounce timer from led open or short detected until led current regulator is disabled 30 ms thermal-shutdown hysteresis 20 c thermal shutdown +160 c maxflash low-battery detect threshold range 33mv steps 2.5 3.4 v low-battery voltage threshold accuracy 2.5 % low-battery voltage hysteresis programmable range 100 200 mv low-battery voltage hysteresis step size 100 mv lb_tmr[1:0] = 00 200 250 300 low-battery reset time lb_tmr[1:0] = 01 400 500 600 s electrical characteristics (continued) (v in = 3.6v, v agnd = v pgnd = v fgnd = 0v, v dd = 1.8v, t a = -40? to +85?, unless otherwise noted. typical values are at t a = +25?.) (note 1) note 1: all devices are 100% production tested at t a = +25?. limits over the operating temperature range are guaranteed by design. note 2: led current regulator dropout voltage is defined as the voltage when current drops 10% from the current level measured at 0.6v. note 3: flash duration is from rising edge of led_en until i fled = 0a (safety time in one-shot mode). note 4: the adaptive output voltage regulation threshold is individually set on each device to 75mv above the dropout voltage of the led current regulators. this ensures minimum power dissipation on the ic during a flash event. the dropout voltage chosen is the highest measured dropout voltage of fled1, fled2, and indled.
max8834y/MAX8834Z adaptive step-up converters with 1.5a flash driver 6 _______________________________________________________________________________________ typical operating characteristics (circuit of figure 1, v in = 3.6v, v out = 3.8v, v dd = 3.0v, t a = +25?, unless otherwise noted.) 0 30 20 10 40 50 60 70 80 90 100 2.5 3.5 3.0 4.0 4.5 5.0 step-up converter efficiency vs. input voltage (max8834y) max8834y/z toc01 input voltage (v) efficiency (%) v out = 3.8v i out = 16ma v out = 5v i out = 16ma v out = 5v i out = 750ma v out = 3.8v i out = 750ma v out = 5v i out = 250ma v out = 3.8v i out = 250ma for v in > v out , v out increases above the programmed value due to the minimum duty cycle constraint. 0 30 20 10 40 50 60 70 80 90 100 2.5 3.5 3.0 4.0 4.5 5.0 step-up converter efficiency vs. input voltage (MAX8834Z) max8834y/z toc02 input voltage (v) efficiency (%) v out = 3.8v i out = 16ma v out = 5v i out = 16ma v out = 5v i out = 750ma v out = 3.8v i out = 750ma v out = 5v i out = 250ma v out = 3.8v i out = 250ma for v in > v out , v out increases above the programmed value due to the minimum duty cycle constraint. step-up converter efficiency vs. output current (max 88 34y) max8834y/z toc03 output current (ma) efficiency (%) 1000 100 10 20 40 60 80 100 0 1 10,000 v in = 3.6v v in = 2.5v v in = 3.2v step-up converter efficiency vs. output current (max 88 34z) max8834y/z toc04 output current (ma) efficiency (%) 1000 100 10 20 40 60 80 100 0 1 10,000 v in = 3.6v v in = 2.5v v in = 3.2v 0 3 9 6 12 15 2.5 3.5 3.0 4.0 4.5 5.0 step-up converter supply current vs. supply voltage max8834y/z toc05 supply voltage (v) supply current (ma) v out = 3.8v MAX8834Z max8834y step-up converter supply current vs. temperature max8834y/z toc06 temperature ( c) supply current (ma) 60 35 10 -15 5 10 15 20 0 -40 85 MAX8834Z max8834y v out = 5v 10 5 0 -5 -10 2.5 4.0 3.0 3.5 4.5 5.0 5.5 led current accuracy vs. input voltage max8834y/z toc07 input voltage (v) led current accuracy (%) i fled1 = 125ma i fled2 = 125ma i fled1 = 492.19ma i fled2 = 492.19ma i indled = 16ma i fled1 = 750ma i fled2 = 750ma v out = 5v -10 -4 -6 -8 -2 0 2 4 6 8 10 -40 10 -15 35 60 85 led current accuracy vs. temperature max8834y/z toc08 temperature ( c) led current accuracy (%) v out = 5v i fled2 = 125ma i fled1 = 492.19ma i fled1 = 125ma i fled2 = 492.19ma i fled1 = 750ma i fled2 = 750ma i indled = 16ma
max8834y/MAX8834Z adaptive step-up converters with 1.5a flash driver _______________________________________________________________________________________ 7 typical operating characteristics (continued) (circuit of figure 1, v in = 3.6v, v out = 3.8v, v dd = 3.0v, t a = +25?, unless otherwise noted.) -0.6 -0.2 -0.4 0.2 0 0.4 0.6 -40 10 -15 35 60 85 output voltage accuracy vs. temperature max8834y/z toc09 temperature ( c) output voltage accuracy (%) MAX8834Z, no load max8834y, no load max8834y, i out = 250ma MAX8834Z, i out = 250ma v out = 5v 0 1 3 2 4 5 2.5 3.5 3.0 4.0 4.5 5.0 5.5 internal oscillator frequency vs. supply voltage max8834y/z toc10 supply voltage (v) oscillator frequency (mhz) MAX8834Z max8834y 1ms/div startup waveform (max 88 34y, v out = 5v) v out v lx 500ma/div 2v/div 1v/div 2v/div i lx v comp 5v v out = 5v i led1 = 31.25ma max8834y/z toc11 1ms/div startup waveform (max 88 34y, adaptive mode) v out v lx 500ma/div 2v/div 1v/div 2v/div i lx v comp adaptive mode i led1 = 31.25ma max8834y/z toc12 1ms/div startup waveform (max 88 34z, v out = 5v) v out v lx 500ma/div 2v/div 1v/div 2v/div i lx v comp 5v max8834y/z toc13 v out = 5v i led1 = 31.25ma 1ms/div startup waveform (max 88 34z, adaptive mode) v out v lx 500ma/div 2v/div 1v/div 2v/div i lx v comp max8834y/z toc14 adaptive mode i led1 = 31.25ma
max8834y/MAX8834Z adaptive step-up converters with 1.5a flash driver 8 _______________________________________________________________________________________ typical operating characteristics (continued) (circuit of figure 1, v in = 3.6v, v out = 3.8v, v dd = 3.0v, t a = +25?, unless otherwise noted.) 400 shutdown waveform (max 88 34z, adaptive mode) v out v lx 500ma/div 2v/div 1v/div 2v/div i lx v comp max8834y/z toc18 adaptive mode i led1 = 31.25ma 400ns/div light-load switching waveforms (max 88 34y) v lx 200ma/div 0ma 2v/div 20mv/div 0v i lx v out ac ripple v out = 5v i out = 16ma max8834y/z toc19 400ns/div light-load switching waveforms (max 88 34z) v lx 200ma/div 0ma 2v/div 20mv/div 0v i lx v out ac ripple v out = 5v i out = 16ma max8834y/z toc20 400 shutdown waveform (max 88 34z, v out = 5v) v out v lx 500ma/div 2v/div 1v/div 2v/div i lx v comp max8834y/z toc17 5v v out = 5v i led1 = 31.25ma 400 s/div shutdown waveform (max 88 34y, v out = 5v) v out v lx 500ma/div 2v/div 1v/div 2v/div i lx v comp max8834y/z toc15 5v v out = 5v i led1 = 31.25ma 400 shutdown waveform (max 88 34y, adaptive mode) v out v lx 500ma/div 2v/div 1v/div 2v/div i lx v comp max8834y/z toc16 adaptive mode i led1 = 31.25ma
max8834y/MAX8834Z adaptive step-up converters with 1.5a flash driver _______________________________________________________________________________________ 9 4.97 4.98 5.00 4.99 5.01 5.02 output voltage line regulation (max8834y) max8834y/z toc25 input voltage (v) output voltage (v) 2.5 3.5 3.0 4.0 4.5 i out = 750ma i out = 16ma i out = 250ma v out = 5v 4.97 4.98 5.00 4.99 5.01 5.02 output voltage line regulation (MAX8834Z) max8834y/z toc26 input voltage (v) output voltage (v) 2.5 3.5 3.0 4.0 4.5 i out = 750ma i out = 16ma i out = 250ma v out = 5v 400ns/div heavy-load switching waveforms (max 88 34y) v lx 500ma/div 1.5a 2v/div 50mv/div 0v i lx v out ac ripple v out = 5v i out = 1a max8834y/z toc21 400ns/div heavy-load switching waveforms (max 88 34z) v lx 500ma/div 1.5a 2v/div 50mv/div 0v i lx v out ac ripple v out = 5v i out = 1a max8834y/z toc22 1ms/div gsmb waveform v gsmb 500ma/div 500ma/div 2v/div 1a/div i fled1 i fled2 i in v out = 5v i lim = 500ma i fled1 = i fled2 = 515.63ma t hc_trm = 80 s max8834y/z toc23 10ms/div maxflash function v in 200mv/div 200mv/div i fled1 v out = 5v i fled1 = 750ma v lb_th = 3.0v v lb_hys disabled t tmr_dur = 50ms v in increases to the threshold v in drops below the threshold voltage 3.6v 3.6v 0ma max8834y/z toc24 typical operating characteristics (continued) (circuit of figure 1, v in = 3.6v, v out = 3.8v, v dd = 3.0v, t a = +25?, unless otherwise noted.)
max8834y/MAX8834Z adaptive step-up converters with 1.5a flash driver 10 ______________________________________________________________________________________ output voltage load regulation (max 88 34y) max8834y/z toc27 output current (ma) output voltage (v) 1000 100 10 4.97 4.98 4.99 5.00 5.01 5.02 4.96 1 10,000 v out = 5v output voltage load regulation (max 88 34z) max8834y/z toc28 output current (ma) output voltage (v) 1000 100 10 4.97 4.98 4.99 5.00 5.01 5.02 4.96 1 10,000 v out = 5v 500 510 520 530 540 550 560 570 580 3.7 4.0 4.3 4.6 4.9 5.2 input current limit vs. programmed output voltage max8834y/z toc29 programmed output voltage (v) input current limit (ma) i lim = 500ma 0 200 600 400 800 1000 input current limit vs. programmed value max8834y/z toc30 programmed value (ma) input current limit (ma) 0 400 200 600 800 ideal line v out = 5v typical operating characteristics (continued) (circuit of figure 1, v in = 3.6v, v out = 3.8v, v dd = 3.0v, t a = +25?, unless otherwise noted.)
max8834y/MAX8834Z adaptive step-up converters with 1.5a flash driver ______________________________________________________________________________________ 11 pin description pin name function a1, b1 out regulator output. connect out to the anodes of the external leds. bypass out to pgnd with a 10f ceramic capacitor. out is connected to lx through an internal 10k resistor during shutdown. a2, b2 lx inductor connection. connect lx to the switched side of the inductor. lx is internally connected to the drains of the internal mosfets. lx is connected to out through an internal 10k resistor during shutdown. a3, b3 pgnd power ground. connect pgnd to agnd and to the input capacitor ground. connect pgnd to the pcb ground plane. a4 in analog supply voltage input. the input voltage range is 2.5v to 5.5v. bypass in to agnd and pgnd with a 10f ceramic capacitor as close as possible to the ic. in is high impedance during shutdown. a5 v dd logic input supply voltage. connect v dd to the logic supply driving scl, sda, led_en, and gsmb. bypass v dd to agnd with a 0.1f ceramic capacitor. when v dd is below the uvlo, the i 2 c registers reset and the step-up converter turns off. b4 scl i 2 c clock input. data is read on the rising edge of scl. b5 agnd analog ground. connect agnd to pgnd and to the input capacitor ground. connect agnd to the pcb ground plane. c1 comp compensation input. see the compensation network selection section for details. comp is internally pulled to agnd through a 180 resistor in shutdown. c2, d2 fgnd fled1/fled2 and indled power ground. connect fgnd to pgnd. c3 led_en led enable logic input. led_en controls fled1, fled2, and indled, depending on control bits written into the led_cntl register. see the led_en control register description for an explanation of this input function. led_en has an internal 800k pulldown resistor to agnd. c4 gsmb gsm blank signal. assert gsmb to reduce the current regulator settings according to the values programmed into the gsmb_cur register. the status of the flash safety timer and the flash/movie mode values in the current regulator registers are not affected by the gsmb state. connect gsmb to the pa module enable signal or other suitable logic signal that indicates a gsm transmit is in process. polarity of this signal is set by a bit in the gsmb_cur register (default is active-high). gsmb has an internal 800k pulldown resistor to agnd. c5 sda i 2 c data input. data is read on the rising edge of scl and data is clocked out on the falling edge of scl. d1 fled2 fled2 current regulator. current flowing into fled2 is based on the internal i 2 c registers flash2_cur and movie_cur. connect fled2 to the cathode of an external flash led or led module. fled2 is high impedance during shutdown. if unused, connect fled2 to ground. d3 fled1 fled1 current regulator. current flowing into fled1 is based on the internal i 2 c registers flash1_cur and movie_cur. connect fled1 to the cathode of an external flash led or led module. fled1 is high impedance during shutdown. if unused, connect fled1 to ground. d4 indled indled current regulator. current flowing into indled is based on the internal i 2 c registers ind_cur. connect indled to the cathode of an external indicator led. indled is high impedance during shutdown. if unused, connect indled to ground. d5 ntc ntc bias output. ntc provides 20a to bias the ntc thermistor. the ntc voltage is compared to the trip threshold programmed by the ntc_cntl register. ntc is high impedance during shutdown. connect ntc to in if not used. see the finger-burn protection (ntc) section for details.
max8834y/MAX8834Z adaptive step-up converters with 1.5a flash driver 12 ______________________________________________________________________________________ detailed description the max8834y/MAX8834Z flash drivers integrate an adaptive 1.5a pwm step-up dc-dc converter, two 750ma white led camera flash/movie current regula- tors, and a 16ma indicator led current regulator. an i 2 c interface controls individual output on/off, the step- up output voltage setting, the movie/flash current, and the flash timer duration settings. step-up converter (lx, out, comp, pgnd) the max8834y/MAX8834Z include a fixed-frequency, pwm step-up converter that supplies power to the flash leds. the output voltage is programmable from 3.7v to 5.2v (in 100mv steps) through the i 2 c interface. the output voltage can also be set adaptively based on the led forward voltage. the step-up converter switches an internal power mosfet and synchronous rectifier at a constant 2mhz or 4mhz frequency, with varying duty cycle up to 75%, to maintain constant output voltage as the input voltage and load vary. internal circuitry pre- vents any unwanted subharmonic switching by forcing a minimum 7% (typ) duty cycle. when the step-up converter is set to dropout mode, the internal synchronous rectifier is driven fully on, keeping the voltage at out equal to the lx input. this mode provides the lowest current consumption when driving leds with low forward voltage. the output voltage is internally monitored for a fault condition. if the output voltage drops below 8% (typ) of the nominal programmed value, a pok fault is indicat- ed in status1 register bit 5. this feature is disabled if the step-up converter is set to operate in adaptive mode. overvoltage protection the max8834y/MAX8834Z include a comparator to monitor the output voltage (v out ) during adaptive mode operation of the step-up converter. if at anytime the output voltage exceeds a maximum threshold of 5.5v, the comp capacitor is discharged until the output voltage is reduced by the 200mv (typ) hysteresis. once the output voltage drops below this threshold, normal charging of the comp capacitor is resumed. flash current regulator (fled1 and fled2) a low-dropout linear current regulator from fled1/ fled2 to fgnd sinks current from the cathode terminal of the flash led(s). the fled1/fled2 current is regu- lated to i 2 c programmable levels for movie mode (up to 125ma, see table 5) and flash mode (up to 750ma, see tables 3 and 4). the movie mode provides continu- ous lighting when enabled through i 2 c or led_en. when the flash mode is enabled, a flash safety timer, programmable from 50ms to 800ms through i 2 c, limits the duration of the flash mode. once the flash safety timer expires, the current regulators return to movie mode if movie mode was active when a flash event was triggered. the flash mode has priority over the movie mode. flash safety timer the flash safety timer is activated any time flash mode is selected, either with led_en or through the i 2 c interface. the flash safety timer, programmable from 50ms to 800ms through i 2 c, limits the duration of the flash mode in case led_en is stuck high or the i 2 c command to turn off has not been sent within the programmed flash safety timer duration. this timer can be configured to operate either in one-shot mode or maximum flash duration mode (see table 9). in one-shot mode, the flash function is initiated on the rising edge of led_en (or i 2 c bit) and terminated based on the programmed value of the safety timer (see figure 1). in the maximum flash timer mode, flash function remains enabled as long as led_en (or i 2 c bit) is high, unless the prepro- grammed safety timer times out (see figure 2). once the flash mode is disabled, by either led_en, i 2 c, or flash safety timer, the flash has to be off for a minimum time (flash safety timer reset inhibit period), before it can be reinitiated (see figure 3). this prevents spurious events from re-enabling the flash mode. indicator current regulator (indled) a low-dropout linear current regulator from indled to fgnd sinks current from the cathode terminal of the indicator led. the indled current is regulated to i 2 c programmable levels up to 16ma. programmable con- trol is provided for ramp-up (off to on) and ramp- down (on to off) times, as well as blink rate and duty cycle. the user can choose to enable or disable the ramp time and blink rate features. see tables 6, 7, and 8 for more information. indled blink function indled current regulator is able to generate a blink function. the off and on time for indled are set using the i 2 c interface. see figure 4. indled ramp function the indled current regulator output provides ramp-up/ down for smooth transition between different brightness settings. the ramp-up/down times are controlled by the
max8834y/MAX8834Z adaptive step-up converters with 1.5a flash driver ______________________________________________________________________________________ 13 ind_ru and ind_rd control bits, and the ramp func- tion is enabled/disabled by the ind_rp_en bit. the current regulator increases/decreases the current one- step every t ramp /32 until 0ma or ind[4:0] current is reached. see figures 5 and 6. combining blink timer and ramp function when using the ramp function for indled together with the blink timer, keep the ramp-up timer shorter than the on blink timer and the ramp-down timer shorter than the off timer. failing to comply with this results in the one-shot flash timer enabling of flash mode by led_en or i 2 c control one-shot flash timer figure 1. one-shot flash-timer mode enabling of flash mode by led_en or i 2 c control maximum flash safety timer maximum flash timer figure 2. maximum flash-timer mode enabling of flash mode by led_en or i 2 c control 30ms figure 3. flash safety timer reset inhibit period t ind_on t ind_off i ind[4:0] figure 4. blink function timing
max8834y/MAX8834Z adaptive step-up converters with 1.5a flash driver 14 ______________________________________________________________________________________ programmed current not being reached during the on time, or the indled current not returning to 0ma during the off time. see figure 7. where ind_led is the code from 0 to 31 specified in the ind_led[4:0]. led enable input (led_en) the led_en logic input can enable/disable the fled1, fled2, and indled current regulators. it can be programmed to control movie mode, flash mode, and indicator mode by using the ind_en, movie_en, and flash_en bits, respectively. see table 8 for more information. if fled1/fled2 is enabled for both movie and flash modes at the same time, flash mode has priority. once the safety timer expires, the current regulator then returns to the movie mode. watchdog timer the max8834y/MAX8834Z include a watchdog timer function that can be programmed using the i 2 c inter- face from 4 seconds to 16 seconds with a 4-second step. if the watchdog timer expires, the max8834y/ MAX8834Z interpret it as an indication that the system is no longer responding and enters safe mode. in safe mode, the max8834y/MAX8834Z disable all current regulators and the step-up dc-dc converter to prevent potential damage to the system. the i 2 c setting for the respective registers does not change, therefore, reset- ting the watchdog timer reverts the max8834y/ MAX8834Z back to the state present before entering safe mode. t t ind led t t ind on ind ru ind off ind r _ _ _ _ (_ ) + 32 1 d d ind led 32 1 (_ ) + i indled = full scale i indled = 1/2 scale 0ma 128ms 256ms 512ms 1024ms figure 5. ramp-up behavior 0ma 128ms 256ms 512ms 1024ms i indled = full scale i indled = 1/2 scale figure 6. ramp-down behavior t ind_on 32 t ind_ru t = 32 t ind_rd t = t ind_off t ind_on t ind_off t ind_off i ind_led = ind_led[4:0] i ind_led = code 0111 i ind_led = code 0011 i ind_led = off figure 7. combining ramp function and blink timer
max8834y/MAX8834Z adaptive step-up converters with 1.5a flash driver ______________________________________________________________________________________ 15 setting the wdt_en bit to 1 in the tmr_dur register (table 9) enables the watchdog timer. resetting the watchdog timer is achieved by the rising or falling edge of led_en or by setting bit 0 in the wdt_rst register (table 14). see figures 8 and 9 for two examples of watchdog timer timing diagrams. t < wdt_dur[1:0] watchdog timer enabled t < wdt_dur[1:0] t > wdt_dur[1:0] t < wdt_dur[1:0] watchdog timer reset watchdog timer reset watchdog timeout suspending all current regulations watchdog timer reset wdt_rst is cleared (i 2 c) wdt_en (i 2 c) wdt_rst watchdog timer led_en i fled_ or i indled figure 8. watchdog timer timing diagram 1 t < wdt_dur[1:0] watchdog timer enabled t < wdt_dur[1:0] t > wdt_dur[1:0] t < wdt_dur[1:0] watchdog timer reset watchdog timer reset watchdog timeout suspending all current regulations watchdog timer reset wdt_rst is cleared (i 2 c) wdt_en (i 2 c) wdt_rst watchdog timer led_en i fled_ or i indled figure 9. watchdog timer timing diagram 2
max8834y/MAX8834Z adaptive step-up converters with 1.5a flash driver 16 ______________________________________________________________________________________ input current predefined input current limit during gsmb fled2 output current fled1 output current gsmb (active-high) gsmb event time 1 s after gsmb activated, fled_ goes to the minimum setting fled1/fled2 decreased one lsb since i in > i lim[3:0] fled1/fled2 increased one lsb since i in < i lim[3:0] hc_tmr[1:0] 1 s after gsmb deactivated, fled_ goes to the previous setting flash1_cur setting figure 10. input current limit during gsmb event gsm blank function (gsmb) the gsmb input is provided to allow the flash current to be momentarily reduced during a gsm transmit to reduce the peak current drawn from the battery. the input current limit ensures that the maximum possible output current is always provided, regardless of the input voltage and the led forward voltages. when a gsmb event is triggered, the fled1 and fled2 current regulators go to the lowest setting to ensure the current drawn from the battery is quickly reduced to a safe level. the max8834y/MAX8834Z then start increasing the fled1 and fled2 current by one lsb steps, at a time interval set by hc_tmr[1:0] (see table 11). the increasing continues until either the predefined fled1/fled2 current setting is reached or the input current exceeds the maximum predefined input current limit during a gsmb event. when the input current exceeds the predefined input current limit, the fled1/fled2 current is reduced by one lsb. the max8834y/MAX8834Z continue to adjust the fled1 and fled2 up and down depending on the input cur- rent limit as long as the gsmb event is present. see figure 10 for more detailed information.
max8834y/MAX8834Z adaptive step-up converters with 1.5a flash driver ______________________________________________________________________________________ 17 to use this feature, connect the logic signal used to enable the pa, or equivalent, to the gsmb input. assertion of this signal does not change the current sta- tus of the flash safety timer or the flash current values stored in the i 2 c registers. once the signal is deassert- ed, the current regulators change back to their previ- ously programmed values. polarity of this signal is controlled through bit 6 in the gsmb_cur register (table 11). the default is active-high. finger-burn protection (ntc) an ntc input is provided for the (optional) finger-burn protection feature. to use this feature, connect a 100k ntc with b = 4550 between ntc and agnd. ntc sources 20? current and the voltage established by this current and the ntc resistance is compared inter- nally to a voltage threshold in the range of 200mv to 550mv, programmed through bits [2:0] of the ntc control register (see table 10). if the voltage on the ntc pin falls below the programmed threshold during a flash event, the flash cycle is immedi- ately terminated, and an indication is latched through bit 3 in the status1 register (see table 15). to disable this function, clear bit 3 (enable bit) in the ntc control register. maxflash function during high load currents, the battery voltage momen- tarily drops due to its internal esr, together with the serial impedance from the battery to the load. for equipment requiring a minimum voltage for stable oper- ation, the battery esr needs to be calculated to esti- mate the maximum battery current that maintains the battery voltage above the critical threshold. due to the complicated measurement of the battery esr, the max8834y/MAX8834Z feature the maxflash function to prevent the battery voltage from dropping below the threshold voltage. see figure 11 for details. the max8834y/MAX8834Z input voltage is monitored during a flash/movie event. if the input voltage drops below a predefined threshold (v lb_th ), it indi- cates that the flash/movie event is drawing more current than the battery can support. as a result, the fled1/fled2 current regulators start decreasing their output currents by one step. therefore, the input cur- rent is reduced and the input voltage starts to rise due to the internal battery esr. the input voltage is then sampled again after t lb_tmr and compared to v lb_th plus a predefined hysteresis (v lb_hys ). if it is still below v lb_th + v lb_hys , the fled1/fled2 current regulators reduce their output current again to ensure that minimum input voltage is available for the system. if the input voltage is above v lb_th + v lb_hys , the cur- rent regulator increases the output current by one step (if it is less than the user-defined output current). to disable the hysteresis, set lb_hys[1:0] to 11. in this case, after the fled1/fled2 current is reduced, it stays at the current setting. figures 12, 13, and 14 show examples of maxflash function operation. see tables 12 and 13 for control register details. the maxflash function continues for the entire dura- tion of the flash/movie event to ensure that the flash/movie output current is always maximized for the specific operating conditions. undervoltage lockout the max8834y/MAX8834Z contain undervoltage lock- out (uvlo) circuitry that disables the ic until v in is greater than 2.3v (typ). once v in rises above 2.3v (typ), the uvlo circuitry does not disable the ic until v in falls below the uvlo threshold minus the hysteresis voltage. the max8834y/MAX8834Z also contain a v dd uvlo circuitry that monitors the v dd voltage. when the v dd voltage falls below 1.4v (typ), the contents of all the logic registers are reset to their default states. the logic registers are only reset in a v dd uvlo condition and not an in uvlo condition. in current regulator i out_max t lb_tmr down v lb_th up v lb_hys v lb_th figure 11. block diagram of maxflash function
max8834y/MAX8834Z adaptive step-up converters with 1.5a flash driver 18 ______________________________________________________________________________________ reduction in battery current caused by other system v lb_th battery voltage time flash/movie current v lb_th + v lb_hys i max t lb_tmr figure 13. example 2 of maxflash function operation time i max reduction in battery current caused by other system flash current is not increased again since lb_hys = 11 flash/movie current battery voltage v lb_th + v lb_hys v lb_th t lb_tmr figure 14. example 3 of maxflash function operation with hysteresis disabled v lb_th battery voltage time flash/movie current t lb_tmr v lb_th + v lb_hys figure 12. example 1 of maxflash function operation
max8834y/MAX8834Z adaptive step-up converters with 1.5a flash driver ______________________________________________________________________________________ 19 soft-start the step-up converter implements a soft-start to control inrush current when it turns on. it soft-starts by charging c comp with a 100? current source. during this time, the internal mosfet is switching at the minimum duty cycle. once v comp rises above 1v, the duty cycle increases until the output voltage reaches the desired regulation level. comp is pulled to agnd with a 180 (typ) internal resistor during in, uvlo, dropout mode, or shutdown. see the typical operating characteristics for an example of soft-start operation. soft-start is reini- tiated after uvlo or if the step-up converter is re- enabled after shutdown or dropout mode. shutdown and standby the max8834y/MAX8834Z are in shutdown when either v in or v dd are in uvlo. in shutdown, supply current is reduced to 0.1? (typ). when v in is above its uvlo threshold, but v dd is below its uvlo threshold, the ic disables its internal reference, keeps all registers reset, turns the step-up converter off, and turns the fled1/fled2 current regulators off (high impedance). once a logic-level voltage is supplied to v dd , the ic enters standby condition and is ready to accept i 2 c commands. the internal mosfet, synchronous rectifi- er, and fled1/fled2 are also high impedance in standby. typical shutdown timing characteristics are shown in the typical operating characteristics . parallel connection of current regulators the fled1/fled2 current regulators can be connected in parallel as long as the system software properly sets the current levels for each regulator. unused current regulators may be connected to ground. the fled1/ fled2 regulators must be disabled through i 2 c to avoid a fault detection from an open or short. open/short detection the max8834y/MAX8834Z monitor the fled1, fled2, and indled voltage to detect any open or short leds. a short fault is detected when the voltage rises above v out - 1v (typ), and an open fault is detected when the voltage falls below 100mv. the fault detection cir- cuitry is only activated when the corresponding current regulator is enabled and provides a continuous moni- tor of the current regulator condition. once a fault is detected, the corresponding current regulator is dis- abled and the status is latched into the corresponding fault register bit (see table 15). this allows the proces- sor to determine the max8834y/MAX8834Z operating condition. thermal shutdown thermal shutdown limits total power dissipation in the max8834y/MAX8834Z. when the junction temperature exceeds +160? (typ), the ic turns off, allowing itself to cool. the ic turns on and begins soft-start after the junc- tion temperature cools by 20?. this results in a pulsed output during continuous thermal overload conditions. i 2 c serial interface an i 2 c-compatible, 2-wire serial interface controls the step-up converter output voltage, flash, movie, and indicator current settings, flash duration, and other parameters. the serial bus consists of a bidirectional serial-data line (sda) and a serial-clock input (scl). the max8834y/MAX8834Z are slave-only devices, rely- ing upon a master to generate a clock signal. the mas- ter initiates data transfer to and from the max8834y/ scl sda t r t f t buf start condition stop condition repeated start condition start condition t su,sto t hd,sta t su,sta t hd,dat t su,dat t low t high t hd,sta figure 15. 2-wire serial interface timing detail
max8834y/MAX8834Z adaptive step-up converters with 1.5a flash driver 20 ______________________________________________________________________________________ MAX8834Z and generates scl to synchronize the data transfer (figure 15). i 2 c is an open-drain bus. both sda and scl are bidi- rectional lines, connected to a positive supply voltage through a pullup resistor. they both have schmitt trig- gers and filter circuits to suppress noise spikes on the bus to assure proper device operation. a bus master initiates communication with the max8834y/MAX8834Z as a slave device by issuing a start (s) condition followed by the max8834y/ MAX8834Z address. the max8834y/MAX8834Z address byte consists of 7 address bits and a read/ write bit (r/ w ). after receiving the proper address, the max8834y/MAX8834Z issue an acknowledge bit by pulling sda low during the ninth clock cycle. slave address the max8834y/MAX8834Z act as a slave transmitter/ receiver. its slave address is 0x94 for write operations and 0x95 for read operations. bit transfer each data bit, from the most significant bit to the least significant bit, is transferred one by one during each clock cycle. during data transfer, the sda signal is allowed to change only during the low period of the scl clock and it must remain stable during the high period of the scl clock (figure 16). start and stop conditions both scl and sda remain high when the bus is not busy. the master signals the beginning of a transmis- sion with a start (s) condition by transitioning sda from high to low while scl is high. when the master has finished communicating with the max8834y/ MAX8834Z, it issues a stop (p) condition by transition- ing sda from low to high while scl is high. the bus is then free for another transmission (figure 17). both start and stop conditions are generated by the bus master. acknowledge the acknowledge bit is used by the recipient to hand- shake the receipt of each byte of data (figure 18). after data transfer, the master generates the acknowledge clock pulse and the recipient pulls down the sda line during this acknowledge clock pulse so the sda line stays low during the high duration of the clock pulse. when the master transmits the data to the max8834y/MAX8834Z, it releases the sda line and the max8834y/MAX8834Z take control of the sda line and generate the acknowledge bit. when sda remains high during this 9th clock pulse, this is defined as the not acknowledge signal. the master can then generate either a stop condition to abort the transfer, or a repeated start condition to start a new transfer. start condition (s) data line stable data valid data allowed to change stop condition (p) scl sda figure 16. bit transfer
max8834y/MAX8834Z adaptive step-up converters with 1.5a flash driver ______________________________________________________________________________________ 21 write operations the max8834y/MAX8834Z recognize the write byte protocol as defined in the smbus specification and shown in section a of figure 19. the write byte proto- col allows the i 2 c master device to send 1 byte of data to the slave device. the write-byte protocol requires a register pointer address for the subsequent write. the max8834y/MAX8834Z acknowledge any register pointer even though only a subset of those registers actually exists in the device. the write byte protocol is as follows: 1) the master sends a start command. 2) the master sends the 7-bit slave address followed by a write bit. 3) the addressed slave asserts an acknowledge by pulling sda low. 4) the master sends an 8-bit register pointer. 5) the slave acknowledges the register pointer. 6) the master sends a data byte. 7) the slave updates with the new data. 8) the slave acknowledges the data byte. 9) the master sends a stop (p) condition. in addition to the write-byte protocol, the max8834y/ MAX8834Z can write to multiple registers as shown in section b of figure 19. this protocol allows the i 2 c master device to address the slave only once and then send data to a sequential block of registers starting at the specified register pointer. use the following procedure to write to a sequential block of registers: 1) the master sends a start command. 2) the master sends the 7-bit slave address followed by a write bit. 3) the addressed slave asserts an acknowledge by pulling sda low. 4) the master sends the 8-bit register pointer of the first register to write. 5) the slave acknowledges the register pointer. 6) the master sends a data byte. 7) the slave updates with the new data. 8) the slave acknowledges the data byte. 9) steps 6 to 8 are repeated for as many registers in the block, with the register pointer automatically incremented each time. 10) the master sends a stop condition. read operations the method for reading a single register (byte) is shown in section a of figure 20. to read a single register: 1) the master sends a start command. 2) the master sends the 7-bit slave address followed by a write bit. 3) the addressed slave asserts an acknowledge by pulling sda low. 4) the master sends an 8-bit register pointer. sda scl start condition stop condition figure 17. start and stop conditions sda by master sda by slave scl 1 2 8 9 acknowledge clock pulse for acknowledgement d7 d6 d0 start condition not acknowledge figure 18. acknowledge smbus is a trademark of intel corp.
max8834y/MAX8834Z adaptive step-up converters with 1.5a flash driver 22 ______________________________________________________________________________________ 5) the slave acknowledges the register pointer. 6) the master sends a repeated start (sr) condition. 7) the master sends the 7-bit slave address followed by a read bit. 8) the slave asserts an acknowledge by pulling sda low. 9) the slave sends the 8-bit data (contents of the reg- ister). 10) the master asserts an acknowledge by pulling sda low. 11) the master sends a stop (p) condition. in addition, the max8834y/MAX8834Z can read a block of multiple sequential registers as shown in section b of figure 20. use the following procedure to read a sequential block of registers: 1) the master sends a start command. 2) the master sends the 7-bit slave address followed by a write bit. 3) the addressed slave asserts an acknowledge by pulling sda low. 4) the master sends an 8-bit register pointer of the first register in the block. 5) the slave acknowledges the register pointer. 6) the master sends a repeated start condition. 7) the master sends the 7-bit slave address followed by a read bit. 8) the slave asserts an acknowledge by pulling sda low. 9) the slave sends the 8-bit data (contents of the reg- ister). 10) the master asserts an acknowledge by pulling sda low. 11) steps 9 and 10 are repeated for as many registers in the block, with the register pointer automatically incremented each time. 12) the master sends a stop condition. 1 s number of bits r/w slave address 7 0 18 register pointer 118 data 1 p 1 slave to master master to slave legend a. writing to a single register with the write byte protocol 1 s number of bits r/w slave address 7 0 18 register pointer x 1 a 18 data x 1 b. writing to multiple registers ... 8 data x+n-1 18 data x+n 1 number of bits ... p 8 data x+1 1 a a a a a a a a figure 19. writing to the max8834y/MAX8834Z
max8834y/MAX8834Z adaptive step-up converters with 1.5a flash driver ______________________________________________________________________________________ 23 1 s number of bits r/w slave address 7 0 18 register pointer 11 18 slave address 1 1 slave to master master to slave legend a. reading a single register 1 s number of bits r/w slave address 7 0 18 register pointer x 1 a 11 8 slave address 1 b. reading multiple registers ... 8 data x+1 1 8 data x+n-1 1 number of bits ... 8 data x+1 1 a a aa a a sr a 1 8 data 1 p 1 a a 1 1 sr ... 8 data x+n 11 a p r/w figure 20. reading from the max8834y/MAX8834Z
max8834y/MAX8834Z adaptive step-up converters with 1.5a flash driver 24 ______________________________________________________________________________________ table 1. register map name table register address (hex) type description boost_cntl table 2 00 r/ w step-up converter control flash1_cur table 3 01 r/ w fled1 flash current control flash2_cur table 4 02 r/ w fled2 flash current control movie_cur table 5 03 r/ w fled1 and fled2 movie current control reserved for future use 04 r/ w reserved for future use ind_cur table 6 05 r/ w indicator led current control reserved for future use 06 r/ w reserved for future use ind_cntl table 7 07 r/ w indicator led ramp and blink control reserved for future use 08 r/ w reserved for future use led_cntl table 8 09 r/ w fled1, fled2, and indled on/off and mode control, and definition of led_en logic input function tmr_dur table 9 0a r/ w watchdog timer and flash safety timer control ntc_cntl table 10 0b r/ w ntc function control gsmb_cur table 11 0c r/ w fled1 and fled2 current control during gsm transmit maxflash1 table 12 0d r/ w maxflash function register 1 maxflash2 table 13 0e r/ w maxflash function register 2 wdt_rst table 14 16 r/ w watchdog timer reset status1 table 15 17 r status register status2 table 16 18 r status register reserved for future use 19 r/ w reserved for future use chip_id1 table 17 1a r die type information chip_id2 table 18 1b r die type and mask revision information
max8834y/MAX8834Z adaptive step-up converters with 1.5a flash driver ______________________________________________________________________________________ 25 register name boost_cntl address 0x00 reset value 0x00 type read/write special features table 2. boost_cntl this register contains step-up converter control values. bit name description default value b7 (msb) reserved for future use 0 b6 boost_en 0 = step-up converter off 1 = step-up converter on 0 b5 b4 boost_mode 00 = step-up voltage set adaptively 01 = step-up voltage set programmatically according to boost_cntl[3:0] 10 = step-up converter runs in dropout 11 = step-up converter automatically changes between adaptive regulation and dropout mode depending on operating conditions 00 b3 b2 b1 b0 (lsb) boost_cntl[3:0] 0000 = 3.7v 0001 = 3.8v 0010 = 3.9v 0011 = 4.0v 0100 = 4.1v 0101 = 4.2v 0110 = 4.3v 0111 = 4.4v 1000 = 4.5v 1001 = 4.6v 1010 = 4.7v 1011 = 4.8v 1100 = 4.9v 1101 = 5.0v 1110 = 5.1v 1111 = 5.2v 0000
max8834y/MAX8834Z adaptive step-up converters with 1.5a flash driver 26 ______________________________________________________________________________________ register name flash1_cur address 0x01 reset value 0x00 type read/write special features table 3. flash1_cur this register contains fled1 flash current control values. bit name description default value b7 (msb) b6 b5 b4 b3 flash1[4:0] fled1 flash mode current setting 00000 = 23.44ma 00001 = 46.88ma 00010 = 70.32ma 00011 = 93.76ma 00100 = 117.20ma 00101 = 140.64ma 00110 = 164.08ma 00111 = 187.52ma 01000 = 210.96ma 01001 = 234.40ma 01010 = 257.84ma 01011 = 281.28ma 01100 = 304.72ma 01101 = 328.16ma 01110 = 351.60ma 01111 = 375.04ma 10000 = 398.48ma 10001 = 421.92ma 10010 = 445.36ma 10011 = 468.80ma 10100 = 492.24ma 10101 = 515.68ma 10110 = 539.12ma 10111 = 562.56ma 11000 = 586.00ma 11001 = 609.44ma 11010 = 632.88ma 11011 = 656.32ma 11100 = 679.76ma 11101 = 703.20ma 11110 = 726.56ma 11111 = 750.00ma 00000 b2 reserved for future use b1 reserved for future use b0 (lsb) reserved for future use
max8834y/MAX8834Z adaptive step-up converters with 1.5a flash driver ______________________________________________________________________________________ 27 register name flash2_cur address 0x02 reset value 0x00 type read/write special features table 4. flash2_cur this register contains fled2 flash current control values. bit name description default value b7 (msb) b6 b5 b4 b3 flash2[4:0] fled2 flash mode current setting 00000 = 23.44ma 00001 = 46.88ma 00010 = 70.32ma 00011 = 93.76ma 00100 = 117.20ma 00101 = 140.64ma 00110 = 164.08ma 00111 = 187.52ma 01000 = 210.96ma 01001 = 234.40ma 01010 = 257.84ma 01011 = 281.28ma 01100 = 304.72ma 01101 = 328.16ma 01110 = 351.60ma 01111 = 375.04ma 10000 = 398.48ma 10001 = 421.92ma 10010 = 445.36ma 10011 = 468.80ma 10100 = 492.24ma 10101 = 515.68ma 10110 = 539.12ma 10111 = 562.56ma 11000 = 586.00ma 11001 = 609.44ma 11010 = 632.88ma 11011 = 656.32ma 11100 = 679.76ma 11101 = 703.20ma 11110 = 726.56ma 11111 = 750.00ma 00000 b2 reserved for future use b1 reserved for future use b0 (lsb) reserved for future use
max8834y/MAX8834Z adaptive step-up converters with 1.5a flash driver 28 ______________________________________________________________________________________ register name movie_cur address 0x03 reset value 0x00 type read/write special features table 5. movie_cur this register contains fled1 and fled2 movie current control values. bit name description default name b7 (msb) reserved for future use b6 b5 b4 movie1[2:0] fled1 movie mode current setting 000 = 15.625ma 001 = 31.250ma 010 = 49.875ma 011 = 62.500ma 100 = 78.125ma 101 = 93.750ma 110 = 109.375ma 111 = 125.000ma 000 b3 reserved for future use b2 b1 b0 (lsb) movie2[2:0] fled2 movie mode current setting 000 = 15.625ma 001 = 31.250ma 010 = 49.875ma 011 = 62.500ma 100 = 78.125ma 101 = 93.750ma 110 = 109.375ma 111 = 125.000ma 000
max8834y/MAX8834Z adaptive step-up converters with 1.5a flash driver ______________________________________________________________________________________ 29 register name ind_cur address 0x05 reset value 0x00 type read/write special features table 6. ind_cur this register contains indicator led current control values. bit name description default value b7 (msb) reserved for future use 0 b6 ind_bl_en indled indicator blink timer enable 0 = indicator blink is disabled 1 = indicator blink is enabled 0 b5 ind_rp_en indled indicator ramp-up/down enable 0 = indicator ramp-up/down is disabled 1= indicator ramp-up/down is enabled 0 b4 b3 b2 b1 b0 (lsb) ind[4:0] indled indicator mode current setting 00000 = 0.5ma 00001 = 1.0ma 00010 = 1.5ma 00011 = 2.0ma 00100 = 2.5ma 00101 = 3.0ma 00110 = 3.5ma 00111 = 4.0ma 01000 = 4.5ma 01001 = 5.0ma 01010 = 5.5ma 01011 = 6.0ma 01100 = 6.5ma 01101 = 7.0ma 01110 = 7.5ma 01111 = 8.0ma 10000 = 8.5ma 10001 = 9.0ma 10010 = 9.5ma 10011 = 10.0ma 10100 = 10.5ma 10101 = 11.0ma 10110 = 11.5ma 10111 = 12.0ma 11000 = 12.5ma 11001 = 13.0ma 11010 = 13.5ma 11011 = 14.0ma 11100 = 14.5ma 11101 = 15.0ma 11110 = 15.5ma 11111 = 16.0ma 00000
max8834y/MAX8834Z adaptive step-up converters with 1.5a flash driver 30 ______________________________________________________________________________________ register name ind_cntl address 0x07 reset value 0x00 type read/write special features table 7. ind_cntl this register contains indicator led ramp and blink timer control. bit name description default value b7 (msb) b6 ind_off indled indicator off blink timer control 00 = 512ms 01 = 1024ms 10 = 2048ms 11 = 4096ms 00 b5 b4 ind_on indled indicator on blink timer control 00 = 128ms 01 = 256ms 10 = 512ms 11 = 1024ms 00 b3 b2 ind_ru[1:0] indled indicator ramp-up timer control 00 = 128ms 01 = 256ms 10 = 512ms 11 = 1024ms 00 b1 b0 (lsb) ind_rd[1:0] indled indicator ramp-down timer control 00 = 128ms 01 = 256ms 10 = 512ms 11 = 1024ms 00
max8834y/MAX8834Z adaptive step-up converters with 1.5a flash driver ______________________________________________________________________________________ 31 register name led_cntl address 0x09 reset value 0x00 type read/write special features table 8. led_cntl this register contains fled1, fled2 and indled on/off and mode control. bit name description default value b7 (msb) b6 ind_en[1:0] indled indicator current regulator enable 00 = indled indicator led is disabled 01 = indled indicator led is disabled 10 = indled indicator led is enabled 11 = indled indicator led is controlled by led_en input 00 b5 b4 b3 movie_en[2:0] fled1/fled2 movie mode current regulator enable 000 = fled1 and fled2 movie mode disabled 001 = fled1 movie mode is enabled, fled2 movie mode is disabled 010 = fled2 movie mode is enabled, fled1 movie mode is disabled 011 = fled1 and fled2 movie mode is enabled 101 = fled1 movie mode is controlled by led_en, fled2 movie mode is disabled 110 = fled2 movie mode is controlled by led_en, fled1 movie mode is disabled 111 = fled1 and fled2 movie mode is controlled by led_en 000 b2 b1 b0 (lsb) flash_en[2:0] fled1/fled2 flash mode current regulator enable 000 = fled1 and fled2 flash mode disabled 001 = fled1 flash mode is enabled, fled2 flash mode is disabled 010 = fled2 flash mode is enabled, fled1 flash mode is disabled 011 = fled1 and fled2 flash mode is enabled 101 = fled1 flash mode is controlled by led_en, fled2 flash mode is disabled 110 = fled2 flash mode is controlled by led_en, fled1 flash mode is disabled 111 = fled1 and fled2 flash mode is controlled by led_en 000
max8834y/MAX8834Z adaptive step-up converters with 1.5a flash driver 32 ______________________________________________________________________________________ register name tmr_dur address 0x0a reset value 0x00 type read/write special features table 9. tmr_dur this register contains watchdog timer and flash safety time-control values. bit name description default value b7 (msb) wdt_en enable/disable of watchdog timer function 0 = wdt is disabled 1 = wdt is enabled 0 b6 b5 wdt_dur[1:0] watchdog timer duration 00 = 4s 01 = 8s 10 = 12s 11 = 16s 00 b4 tmr_mode safety timer control 0 = one-shot modegenerates a flash with a duration of tmr_dur regardless of led:en and i 2 c setting; pulling v dd low in this condition terminates flash operating and puts the ic into power-down mode 1 = maximum timer modeensures that flash duration does not exceed the timer defined in tmr:dur 0 b3 b2 b1 b0 (lsb) tmr_dur [3:0] safety timer duration control 0000 = 50ms 0001 = 100ms 0010 = 150ms 0011 = 200ms 0100 = 250ms 0101 = 300ms 0110 = 350ms 0111 = 400ms 1000 = 450ms 1001 = 500ms 1010 = 550ms 1011 = 600ms 1100 = 650ms 1101 = 700ms 1110 = 750ms 1111 = 800ms 0000
max8834y/MAX8834Z adaptive step-up converters with 1.5a flash driver ______________________________________________________________________________________ 33 register name ntc_cntl address 0x0b reset value 0x00 type read/write special features table 10. ntc_cntl this register contains ntc function control values. bit name description default value b7 (msb) flash_tmr_cntl flash safety timer reset control 0 = enable flash reset timer, only valid when flash mode is enabled using the led_en; led_en needs to be pulled low for minimum 30ms (typ) to reset the flash safety 1 = disable flash reset timer; flash safety timer is reset as soon as led_en is pulled low 0 b6 reserved for future use 0 b5 reserved for future use 0 b4 reserved for future use 0 b3 ntc_en finger-burn feature enable 0 = disable ntc function 1 = enable ntc function 0 b2 b1 b0 (lsb) ntc[2:0] finger-burn threshold control 000 = 200mv 001 = 250mv 010 = 300mv 011 = 350mv 100 = 400mv 101 = 450mv 110 = 500mv 111 = 550mv 000
max8834y/MAX8834Z adaptive step-up converters with 1.5a flash driver 34 ______________________________________________________________________________________ register name gsmb_cur address 0x0c reset value 0xc0 type read/write special features table 11. gsmb_cur this register contains fled1 and fled2 current control values for the gsmb function. bit name description default value b7 (msb) gsmb_en gsm blank enable 0 = gsmb input is disabled 1 = gsmb input is enabled 1 b6 gsmb_pol gsm blank polarity control 0 = gsmb is active-low 1 = gsmb is active-high 1 b5 b4 b3 b2 ilim[3:0] input current limit during gsmb 0000 = 50ma 0001 = 100ma 0010 = 150ma 0011 = 200ma 0100 = 250ma 0101 = 300ma 0110 = 350ma 0111 = 400ma 1000 = 450ma 1001 = 500ma 1010 = 550ma 1011 = 600ma 1100 = 650ma 1101 = 700ma 1110 = 750ma 1111 = 800ma 0000 b1 b0 (lsb) hc_tmr[1:0] gsmb reset timer 00 = 10s 01 = 20s 10 = 40s 11 = 80s 00
max8834y/MAX8834Z adaptive step-up converters with 1.5a flash driver ______________________________________________________________________________________ 35 register name maxflash1 address 0x0d reset value 0x00 type read/write special features table 12. maxflash1 this register contains maxflash control function. bit name description default value b7 (msb) lb_en maxflash function enable 0 = disabled 1 = low-battery function is enabled 0 b6 b5 b4 b3 b2 lb_th[4:0] low-battery detection threshold 00000 = 2.400v [do not use] 00001 = 2.433v [do not use] 00010 = 2.466v [do not use] 00011 = 2.500v 00100 = 2.533v 00101 = 2.566v 00110 = 2.600v 00111 = 2.633v 01000 = 2.666v 01001 = 2.700v 01010 = 2.733v 01011 = 2.766v 01100 = 2.800v 01101 = 2.833v 01110 = 2.866v 01111 = 2.900v 10000 = 2.933v 10001 = 2.966v 10010 = 3.000v 10011 = 3.033v 10100 = 3.066v 10101 = 3.100v 10110 = 3.133v 10111 = 3.166v 11000 = 3.200v 11001 = 3.233v 11010 = 3.266v 11011 = 3.300v 11100 = 3.333v 11101 = 3.366v 11110 = 3.400v 11111 = 3.400v 00000 b1 b0 (lsb) lb_hys[1:0] low-battery detection hysteresis 00 = 100mv 01 = 200mv 10 = reserved for future use 11 = hysteresis is disabledflash current is only reduced 00
max8834y/MAX8834Z adaptive step-up converters with 1.5a flash driver 36 ______________________________________________________________________________________ register name wdt_rst address 0x16 reset value 0x00 type read/write special features table 14. wdt_rst this register contains watchdog reset function. bit name description default value b7 (msb) reserved for future use 0 b6 reserved for future use 0 b4 reserved for future use 0 b3 reserved for future use 0 b3 reserved for future use 0 b2 reserved for future use 0 b1 reserved for future use 0 b0 (lsb) watchdog r eset 0 = default 1 = writing a 1 resets the watchdog timer; after writing a 1, this bit is cleared upon watchdog timer reset register name maxflash2 address 0x0e reset value 0x00 type read/write special features table 13. maxflash2 this register contains maxflash control function. bit name description default value b7 (msb) reserved for future use 0 b6 reserved for future use 0 b4 reserved for future use 0 b3 reserved for future use 0 b3 reserved for future use 0 b2 reserved for future use 0 b1 b0 (lsb) lb_tmr[1:0] low-battery reset timer 00 = 0.250ms 01 = 0.500ms 10 = reserved for future use 11 = reserved for future use 00
max8834y/MAX8834Z register name status1 address 0x17 reset value n/a type read special features table 15. status1 this register contains status information. bit name description default value b7 (msb) ntc_flt ntc status readback 0 = ntc status ok 1 = fault (short) occurred on ntc 0 b6 gsmb gsmb status readback 0 = no gsmb event has occurred 1 = gsmb event has occurred 0 b5 pok_flt pok window cooperator status readback 0 = output voltage is within pok window 1 = pok fault has occurred 0 b4 over_temp die temperature overload condition status readback 0 = die temp is within spec 1 = die overtemp event has occurred 0 b3 ntc_ovt ntc status readback 0 = ntc temperature is within spec 1 = ntc temperature threshold has tripped 0 b2 indled_flt indled status readback 0 = indled status is ok 1 = fault (open/short) has occurred on indled 0 b1 fled2_flt fled2 status readback 0 = fled2 status is ok 1 = fault (open/short) has occurred on fled2 0 b0 (lsb) fled1_flt fled1 status readback 0 = fled1 status is ok 1 = fault (open/short) has occurred on fled1 0 note: all faults are latched. bit(s) are cleared after reading register contents. if the fault is still present, the bit is set again . adaptive step-up converters with 1.5a flash driver ______________________________________________________________________________________ 37
max8834y/MAX8834Z adaptive step-up converters with 1.5a flash driver 38 ______________________________________________________________________________________ register name status2 address 0x18 reset value n/a type read special features table 16. status2 this register contains status information. bit name description default value b7 (msb) maxflash_stat indication of if maxflash function has been triggered since last read operation of this register 0 = maxflash event has not occurred 1 = maxflash event has occurred 0 b6 gsmb_ilim indication of if input current limit has been reached during gsmb since last read operation of this register 0 = input current limit not reached 1 = input current limit reached 0 b5 reserved for future use 0 b4 reserved for future use 0 b3 reserved for future use 0 b2 reserved for future use 0 b1 reserved for future use 0 b0 (lsb) reserved for future use 0 register name chip_id1 address 0x1a reset value n/a type read special features table 17. chip_id1 this register contains the max8834y/MAX8834Z die type number. bit name description default value b7 (msb) b6 b5 b4 die_type[7:4] bcd character 1 [ 0001] b3 b2 b1 b0 (lsb) die_type[3:0] bcd character 1 [ 0001] note: this register value is fixed in metal.
max8834y/MAX8834Z adaptive step-up converters with 1.5a flash driver ______________________________________________________________________________________ 39 applications information inductor selection see table 19 for a list of recommended inductors. to prevent core saturation, ensure that the inductor satura- tion current rating exceeds the peak inductor current for the application. calculate the worst-case peak inductor current as follows: where f sw is the switching frequency. capacitor selection bypass in to agnd and pgnd with a ceramic capaci- tor. ceramic capacitors with x5r and x7r dielectrics are recommended for their low esr and tighter tolerances over wide temperature ranges. place the capacitor as close as possible to the ic. the recommended minimum value for the input capacitor is 10?; however, larger value capacitors can be used to reduce input ripple at the expense of size and higher cost. the output capacitance required depends on the out- put current. a 10? ceramic capacitor works well in most situations, but a 4.7? ceramic capacitor is acceptable for lower load currents. compensation network selection the step-up converter is compensated for stability through an external compensation network from comp to agnd. see table 20 for recommended compensa- tion networks. pcb layout due to fast-switching waveforms and high-current paths, careful pcb layout is required. connect agnd, fgnd, and pgnd directly to the ground plane. the in bypass capacitor should be placed as close as possi- ble to the ic. r comp and c comp should be connected between comp and agnd as close as possible to the ic. minimize trace lengths between the ic and the inductor, the input capacitor, and the output capacitor; keep these traces short, direct, and wide. the ground connections of c in and c out should be as close together as possible and connected to pgnd. the traces from the input to the inductor and from the out- put capacitor to the leds may be longer. figure 21 illustrates an example pcb layout and routing scheme. refer to the max8834y/MAX8834Z evaluation kit for a pcb layout example. i vi v v peak out out max in min in min = + () () () . 09 2 f fl sw register name chip_id2 address 0x1b reset value n/a type read special features table 18. chip_id2 this register contains the die type dash number (0 = plain) and mask revision level. bit name description default value b7 (msb) b6 b5 b4 dash bcd character representing dash number b3 b2 b1 b0 (lsb) mask_rev bcd character representing die revision
max8834y/MAX8834Z adaptive step-up converters with 1.5a flash driver 40 ______________________________________________________________________________________ manufacturer part/series inductance (h) dcr (m )isat (a) dimensions (l typ x w typ x h max ) (mm) lps4012-222ml 2.2 100 2.3 4 x 4 x 1.1 lps4018-222ml 2.2 70 2.7 4 x 4 x 1.7 lps5030-220ml 2.2 57 3.1 5 x 5 x 2.9 lps6225-222ml 2.2 45 3.9 6.2 x 6.2 x 2.5 lpo3310-102ml 1 76 1.6 3 x 3 x 1 lps3015-102ml 1 75 1.6 3 x 3 x 1 lpo3010-102nlc 1 140 1.7 3 x 3 x 1 do3314-102ml 1 110 2.1 3 x 3 x 1.4 lps3314-102ml 1 45 2.3 3 x 3 x 1.4 dp1605t-102ml 1 40 2.5 4 x 4 x 1.8 lps4012-102ml 1 60 2.8 4 x 4 x 1.1 lps4018-102ml 1 40 2.8 4 x 4 x 1.7 coilcraft lps5015-102ml 1 50 3.8 5 x 5 x 1.5 nr4018t2r2m 2.2 72 2.7 4 x 4 x 1.8 nr3012t1r0n 1 60 1.5 3 x 3 x 1.2 nr4010t1r0n 1 120 1.8 4 x 4 x 1 nr3015t1r0n 1 36 2.1 3 x 3 x 1.5 nr4012t1r0n 1 72 2.5 4 x 4 x 1.2 np03sb1r0m 1 27 2.6 4 x 4 x 1.8 np04szb1r0n 1 30 4 5 x 5 x 2 taiyo yuden nr4018t1r0n 1 36 4 4 x 4 x 1.8 1117as-1r2n 1.2 65 1.2 3 x 3 x 1 1098as-1r2n 1.2 56 1.8 3 x 3 x 1.2 a997as-1r0n 1 40 1.8 4 x 4 x 1.8 1072as-1r0n 1 30 1.95 3 x 3 x 1.8 toko 1071as-1r0n 1 40 2.1 3 x 3 x 1.5 table 19. suggested inductors inductance r comp (k ) c comp (pf) 1.0h inductor (dynamic loads) 5.5 2200 2.2h inductor (dynamic loads) 4.3 2200 4.7h inductor (dynamic loads) 3 4700 10h inductor (dynamic loads) 3 6800 other (non-led) loads (1h to 10h) 0 (short) 22000 table 20. suggested compensation networks
max8834y/MAX8834Z adaptive step-up converters with 1.5a flash driver ______________________________________________________________________________________ 41 a1 a2 a3 a4 a5 lx in out pgnd v dd b1 b2 b3 b4 b5 lx scl out pgnd agnd c1 c2 c3 c4 c5 fgnd gsmb comp led_en sda d1 d3 d4 d5 fgnd indled fled2 fled1 ntc d2 c vdd c out c comp flash2 led cathode flash1 led cathode indicator led cathode 3.8mm 6.0mm l c in figure 21. recommended pcb layout
max8834y/MAX8834Z adaptive step-up converters with 1.5a flash driver 42 ______________________________________________________________________________________ comp pwm step-up converter 1 h input current limit adaptive/ fixed output select select min registers and control logic out fled1 fled2 indled 750ma 750ma 16ma fgnd 2mhz or 4mhz ntc 1mhz led_en flash timer watchdog timer gsmb scl sda pa_en flash/movie strobe v logic 1.62v to 3.6v i 2 c interface c vdd 0.1 f in agnd pgnd uvlo and power programmable output 3.7v to 5.2v r ntc 100k v dd i 2 c interface v ref v reg v pok c out 10 f c in 10 f v in 2.5v to 5.5v max8834y MAX8834Z lx c comp r comp sampling logic block diagram and typical application circuit
max8834y/MAX8834Z adaptive step-up converters with 1.5a flash driver maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 ____________________ 43 2009 maxim integrated products maxim is a registered trademark of maxim integrated products, inc. chip information process: bicmos package information for the latest package outline information and land patterns, go to www.maxim-ic.com/packages . package type package code document no. 20 wlp w202a2+2 21-0059 wlp (2.5mm 2.0mm) aa1 a2 a3 a4 a5 bb1 b2 b3 b4 b5 cc1 c2c3c4c5 12 3 4 lx in out pgnd lx scl out pgnd max8834y/MAX8834Z fgnd gsmb comp led_en d d1 d2 d3 d4 d5 fgnd indled fled2 fled1 5 v dd agnd sda ntc top view (bumps on bottom) pin configuration

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