june 2009 ?2009 fairchild semiconductor corporation FDZ197PZ rev.c1 www.fairchildsemi.com 1 FDZ197PZ p-channel 1.5 v specified powertrench ? thin wl-csp mosfet bottom top g s d s s d pin1 wl-csp 1x1.5 thin FDZ197PZ p-channel 1.5 v specified powertrench ? thin wl-csp mosfet -20 v, -3.8 a, 64 m ? features ? max r ds(on) = 64 m ? at v gs = -4.5 v, i d = -2.0 a ? max r ds(on) = 71 m ? at v gs = -2.5 v, i d = -2.0 a ? max r ds(on) = 79 m ? at v gs = -1.8 v, i d = -1.0 a ? max r ds(on) = 95 m ? at v gs = -1.5 v, i d = -1.0 a ? occupies only 1.5 mm 2 of pcb area.less than 50% of the area of 2 x 2 bga ? ultra-thin package: less than 0.65 mm height when mounted to pcb ? hbm esd protection level > 4400v (note3) ? rohs compliant general description designed on fairchild's advanced 1.5 v powertrench ? process with state of the art "fine pitch" wlcsp packaging process, the FDZ197PZ minimizes both pcb space and r ds(on) . this advanced wlcsp mosfet embodies a breakthrough in packaging technology which enabl es the device to combine excellent thermal transfer charac teristics, ultra-low profile packaging, low gate charge, and low r ds(on) . applications ? battery management ? load switch ? battery protection mosfet maximum ratings t a = 25 c unless otherwise noted thermal characteristics package marking and ordering information symbol parameter ratings units v ds drain to source voltage -20 v v gs gate to source voltage 8 v i d -continuous t a = 25c (note 1a) -3.8 a -pulsed -15 p d power dissipation t a = 25c (note 1a) 1.9 w power dissipation t a = 25c (note 1b) 0.9 t j , t stg operating and storage junction temperature range -55 to +150 c r ja thermal resistance, junction to ambient (note 1a) 65 c/w r ja thermal resistance, junction to ambient (note 1b) 133 device marking device package reel size tape width quantity 7 FDZ197PZ wl-csp 1x1.5 thin 7 ? 8 mm 5000 units
FDZ197PZ p-channel 1.5 v specified powertrench ? thin wl-csp mosfet www.fairchildsemi.com 2 ?2009 fairchild semiconductor corporation FDZ197PZ rev.c1 electrical characteristics t j = 25 c unless otherwise noted off characteristics on characteristics dynamic characteristics switching characteristics drain-source diode characteristics symbol parameter test conditions min typ max units bv dss drain to source breakdown voltage i d = -250 a, v gs = 0 v -20 v ? bv dss ? t j breakdown voltage temperature coefficient i d = -250 a, referenced to 25 c -10 mv/c i dss zero gate voltage drain current v ds = -16 v, v gs = 0 v -1 a i gss gate to source leakage current v gs = 8 v, v ds = 0 v 10 a v gs(th) gate to source threshold voltage v gs = v ds , i d = -250 a -0.4 -0.5 -1.0 v ? v gs(th) ? t j gate to source threshold voltage temperature coefficient i d = -250 a, referenced to 25 c 2.7 mv/c r ds(on) static drain to source on resistance v gs = -4.5 v, i d = -2.0 a 46 64 m ? v gs = -2.5 v, i d = -2.0 a 53 71 v gs = -1.8 v, i d = -1.0 a 59 79 v gs = -1.5 v, i d = -1.0 a 68 95 v gs = -4.5 v, i d = -2.0 a, t j =125 c 54 84 g fs forward transconductance v dd = -5 v, i d = -3.8 a 21 s c iss input capacitance v ds = -10 v, v gs = 0 v, f = 1 mhz 1180 1570 pf c oss output capacitance 190 255 pf c rss reverse transfer capacitance 160 225 pf t d(on) turn-on delay time v dd = -10 v, i d = -3.8 a, v gs = -4.5 v, r gen = 6 ? 5.8 12 ns t r rise time 5.9 12 ns t d(off) turn-off delay time 311 498 ns t f fall time 280 448 ns q g total gate charge v gs = 0v to -4.5v v dd = -10 v, i d = -3.8 a 18 25 nc q gs gate to source charge 1.5 nc q gd gate to drain ?miller? charge 4.7 nc v sd source to drain diode forward voltage v gs = 0 v, i s = -1.1 a (note 2) -0.6 -1.2 v t rr reverse recovery time i f = -3.8 a, di/dt = 100 a/ s 194 310 ns q rr reverse recovery charge 344 550 nc notes: 1. r ja is determined with the device mounted on a 1 in 2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of fr-4 material. r jc is guaranteed by design while r ca is determined by the user's board design. 2. pulse test: pulse width < 30 0 s, duty cycle < 2.0%. 3. the diode connected between the gate and source serves only as protection esd. no gate overvoltage rating is implied. a. 65 c/w when mounted on a 1 in 2 pad of 2 oz copper. b. 133 c/w when mounted on a minimum pad of 2 oz copper.
FDZ197PZ p-channel 1.5 v specified powertrench ? thin wl-csp mosfet www.fairchildsemi.com 3 ?2009 fairchild semiconductor corporation FDZ197PZ rev.c1 typical characteristics t j = 25 c unless otherwise noted figure 1. 0123 0 3 6 9 12 15 v gs = -3 v v gs = -4.5 v v gs = -1.8 v v gs = -2.5 v pulse duration = 80 p s duty cycle = 0.5% max v gs = -1.5 v -i d , drain current (a) -v ds , drain to source voltage (v) on-region characteristics figure 2. 03691215 0.5 1.0 1.5 2.0 2.5 v gs = -1.8 v v gs = -2.5 v normalized drain to source on-resistance -i d , drain current (a) v gs = -4.5 v v gs = -1.5 v v gs = -3 v pulse duration = 80 p s duty cycle = 0.5% max n o r m a l i z e d o n - r e s i s t a n c e vs drain current and gate voltage f i g u r e 3 . n o r m a l i z e d o n - r e s i s t a n c e -75 -50 -25 0 25 50 75 100 125 150 0.6 0.8 1.0 1.2 1.4 i d = -2 a v gs = -4.5 v normalized drain to source on-resistance t j , junction temperature ( o c ) vs junction temperature figure 4. 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 30 60 90 120 150 t j = 125 o c i d = -2 a t j = 25 o c -v gs , gate to source voltage (v) r ds(on) , drain to source on-resistance ( m : ) pulse duration = 80 p s duty cycle = 0.5% max o n - r e s i s t a n c e v s g a t e t o source voltage figure 5. transfer characteristics 0.0 0.5 1.0 1.5 2.0 0 3 6 9 12 15 t j = 150 o c v ds = -5 v pulse duration = 80 p s duty cycle = 0.5% max t j = -55 o c t j = 25 o c -i d , drain current (a) -v gs , gate to source voltage (v) figure 6. 0.0 0.2 0.4 0.6 0.8 1.0 1.2 0.001 0.01 0.1 1 10 20 t j = -55 o c t j = 25 o c t j = 150 o c v gs = 0 v -i s , reverse drain current (a) -v sd , body diode forward voltage (v) s o u r c e t o d r a i n d i o d e forward voltage vs source current
FDZ197PZ p-channel 1.5 v specified powertrench ? thin wl-csp mosfet www.fairchildsemi.com 4 ?2009 fairchild semiconductor corporation FDZ197PZ rev.c1 figure 7. 0369121518 0.0 1.5 3.0 4.5 i d = -3.8 a v dd = -10 v v dd = -8 v -v gs , gate to source voltage (v) q g , gate charge (nc) v dd = -12 v gate charge characteristics figure 8. 0.1 1 10 20 100 1000 3000 f = 1 mhz v gs = 0 v capacitance (pf) -v ds , drain to source voltage (v) c rss c oss c iss c a p a c i t a n c e v s d r a i n to source voltage f i g u r e 9 . u n c l a m p e d i n d u c t i v e switching capability 0.01 0.1 1 10 100 1000 0.1 1 10 t j = 25 o c t j = 125 o c t av , time in avalanche (ms) -i as , avalanche current (a) figure 10. forward bias safe operating area 0.1 1 10 50 0.01 0.1 1 10 20 100 p s dc 100 ms 10 ms 1 ms 1 s -i d , drain current (a) -v ds , drain to source voltage (v) this area is limited by r ds(on) single pulse t j = max rated r t ja = 133 o c/w t a = 25 o c figure 11. 03691215 10 -9 10 -8 10 -7 10 -6 10 -5 10 -4 10 -3 10 -2 v gs = 0 v t j = 25 o c t j = 125 o c -v gs , gate to source voltage (v) -i g , gate leakage current (a) gate leakage current vs ga te to so ur ce vol tag e figure 12. 10 -4 10 -3 10 -2 10 -1 110 100 1000 0.5 1 10 100 p ( pk ) , peak transient power (w) t, pulse width (sec) single pulse r t ja = 133 o c/w t a = 25 o c 200 single pulse maximum power dissipation typical characteristics t j = 25 c unless otherwise noted
FDZ197PZ p-channel 1.5 v specified powertrench ? thin wl-csp mosfet www.fairchildsemi.com 5 ?2009 fairchild semiconductor corporation FDZ197PZ rev.c1 figure 13. transient thermal response curve 10 -4 10 -3 10 -2 10 -1 110 100 1000 0.005 0.01 0.1 1 single pulse r t ja = 133 o c/w duty cycle-descending order normalized thermal impedance, z t ja t, rectangular pulse duration (sec) d = 0.5 0.2 0.1 0.05 0.02 0.01 2 p dm t 1 t 2 notes: duty factor: d = t 1 /t 2 peak t j = p dm x z t ja x r t ja + t a typical characteristics t j = 25 c unless otherwise noted
FDZ197PZ p-channel 1.5 v specified powertrench ? thin wl-csp mosfet www.fairchildsemi.com 6 ?2009 fairchild semiconductor corporation FDZ197PZ rev.c1
www.fairchildsemi.com FDZ197PZ p-channel 1.5 v specified powertrench ? thin wl-csp mosfet ?2009 fairchild semiconductor corporation FDZ197PZ rev.c1 trademarks the following includes registered and unregistered trademarks and se rvice marks, owned by fairchild semiconductor and/or its gl obal subsidiaries, and is not intended to be an exhaustive list of all such trademarks. *trademarks of system general corporation, used under license by fairchild semiconductor. disclaimer fairchild semiconductor reserves the right to make changes with out further notice to any products herein to improve reliability, function, or design. fairchild does not assume an y liability arising out of th e application or use of any product or circuit described herein; neither does it convey an y license under its patent rights, nor the rights of others. these specifications do not expand the terms of fairchild?s wo rldwide terms and conditions , specifically the warranty therein, which covers these products. life support policy fairchild?s products are not authorized fo r use as critical components in life support devices or systems without the express written approval of fa irchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform w hen properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. a critical component in any component of a life support, device, or system whose failure to perform can be reasonably ex pected to cause the failure of the life support device or system, or to affect its safety or effectiveness. product status definitions definition of terms auto-spm? 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