View HSDL-3310_735805.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

agilent HSDL-3310 irda ? data compliant 1.152 mb/s infrared transceiver data sheet functional description the HSDL-3310 is a small form factor infrared (ir) transceiver module that provides interface between logic and ir signals for through-air, serial, half-duplex ir data link. the module is compliant to irda physical layer specifications 1.3 and is iec 825-class 1 eye safe. the HSDL-3310 is designed to interface with input/output logic circuits as low as 1.8 v. features ? fully compliant to irda 1.3 specifications: C 2.4 kb/s to 1.152 mb/s C excellent nose-to-nose operation C typical link distance > 1.5 m ? guaranteed temperature performance, C20 to 70 c C critical parameters are guaranteed over specified temperatures and supply voltages ? low power consumption C low shutdown current (10 na typical) C complete shutdown for txd, rxd, and pin diode ? input/output interfacing voltage of as low as 1.8 v ? small module size C 4 x 10 x 5 mm max (h x w x d) ? adjustable optical power management C adjustable led driver current for saving power while maintaining link integrity ? typically withstands >100 mv p-p power supply ripple ?v cc supply 2.7 to 5.5 volts ? integrated emi shield ? led stuck-high protection the HSDL-3310 can be shut down completely to achieve very low power consumption. in the shut- down mode, the pin diode will be inactive and thus producing very little photocurrent even under very bright ambient light. also, HSDL-3310 incorporates adjust- able optical power feature to enhance low power consumption. applications ? mobile telecommunication C cellular phone C pager C smart phone ? data communication C pda C printer ? digital imaging C digital camera C photo-imaging printer ? electronic wallet ? medical and industry data collection
2 functional block diagram i/o pins configuration table pin symbol description note 1 gnd ground connect to system ground. 2 i/ov cc input/output asic v cc connect to asic logic controller v cc voltage or supply voltage. the voltage at this pin must be equal to or less than supply voltage. 3v cc supply voltage regulated 2.7 to 5.5 volts. 4 mir_sel mir select this pin to be driven high to select mir mode and low for sir mode. do not float this pin. 5 md0 mode 0 this pin must be driven either high or low. do not float this pin. 6 md1 mode 1 this pin must be driven either high or low. do not float the pin. 7 rxd receiver data output. output is a low pulse response when a light pulse is seen. active low. active low. 8 txd transmitter data input. logic high turns the led on. if held high longer than ~ 50 m s, the led is turned active high. off. txd must be either driven high or low. do not float this pin. 9 leda led anode tied to external resistor, r1, to regulated v cc from 2.7 to 5.5 volts. C shield emi shield do not connect shield directly to ground pin; connect to system ground via a low inductance trace. pinout rear view 98 7 654321 adjustable optical power shield txd (8) md0 (5) md1 (6) rxd (7) mir_sel (4) cx3 i/0 v cc (2) gnd (1) cx2 v cc (3) r1 leda (9) HSDL-3310 cx1
3 transceiver control truth table md0 md1 mir_sel rxd txd 1 0 x shutdown shutdown 0 0 0 sir full distance power 0 1 0 sir 50 cm distance power 1 1 0 sir 30 cm distance power 0 0 1 mir full distance power 0 1 1 mir 50 cm distance power 1 1 1 mir 30 cm distance power x = dont care transceiver i/o truth table inputs outputs transceiver mode mir_sel txd ei ie (led) rxd active x 3 v ih x high (on) nv active 0 v il ei h [1] low (off) low [3] active 1 v il ei h [2] low (off) low [3] active x v il ei l low (off) high shutdown x x [4] low (off) low (off) nv [5] notes: 1. in-band ei 115.2 kb/s and mir_sel=0 2. in-band ei 3 0.576 mb/s and mir_sel=1 3. logic low is a pulsed response. 4. to maintain low shutdown current, txd needs to be driven high or low and not to be left floating. 5. rxd is internally pull-up to v cc through high impedance pmos transistor (equivalent impedance is greater than 300 k w ). recommended application circuit components component recommended value r1 2.2 w 5%, 0.5 watt, for 2.7 v cc 3.3 v operation 2.7 w 5%, 0.5 watt, for 3.0 v cc 3.6 v operation 5.6 w 5%, 0.5 watt, for 4.5 v cc 5.5 v operation cx1 [1] , cx3 0.47 m f 20%, x7r ceramic cx2 [2] 6.8 m f 20%, tantalum caution: the component is susceptibile to damage from electrostatic discharge. it is advised that normal static precautions be taken during handling and assembling of this component to prevent damage and/or degradation, which may be caused by esd. x = dont care nv = not valid ei = in-band infrared intensity at detector notes: 1. cx1 must be placed within 0.7 cm from HSDL-3310 for optimum noise immunity. 2. when using with noisy power supplies, supply rejection can be enhanced by including cx2 as shown in HSDL-3310 functional block diagram.
4 recommended operating conditions parameter symbol min. max. units conditions operating temperature t a C20 70 c supply voltage v cc 2.7 5.5 v input/output voltage i/ov cc 1.8 5.5 v logic input voltage logic high v ih 2/3 iov cc iov cc v logic low v il 0 1/3 iov cc v receiver input irradiance logic high ei h 0.0036 500 mw/cm 2 for in-band signals 115.2 kb/s [1] 0.0090 500 mw/cm 2 0.576 mb/s in-band signals 1.152 mb/s [1] logic low ei l 0.3 m w/cm 2 for in-band signals led (logic high) current i leda 400 600 ma v led = v cc = 3.0, v i (txd) 3 v ih pulse amplitude md0 = 0, md1 = 0 receiver data rate 0.0024 1.152 mb/s ambient light see irda serial infrared physical layer link specification, appendix a for ambient levels absolute maximum ratings for implementations where case to ambient thermal resistance is 50 c/w. parameter symbol min. max. units storage temperature t s C40 100 c operating temperature t a C20 70 c led supply voltage v led 07v supply voltage v cc 07v input/output voltage i/ov cc 07v input voltage: txd, md0, md1 v i 07v output voltage: rxd v o C0.5 7 v for txd, md0, md1,mir_sel
5 electrical & optical specifications specifications (min. and max. values) hold over the recommended operating conditions unless otherwise noted. unspecified test conditions may be within the operating range. all typical values (typ.) are at 25 c with v cc and iov cc set to 3.0 v unless otherwise noted. parameter symbol min. typ. max. units conditions receiver viewing angle 2 f 1/2 30 peak sensitivity l p 880 nm wavelength rxd output voltage logic high v oh iov cc C0.2 iov cc vi oh = C200 m a, ei 0.3 m w/cm 2 logic low v ol 0 0.4 v i ol = 200 m a rxd pulse width (sir) [2] t rpw (sir) 1 7.5 m s q 1/2 15 , c l = 9 pf rxd pulse width (mir) [3] t rpw (mir) 200 750 ns q 1/2 15 , c l = 9 pf rxd rise and fall times t r , t f 25 100 ns c l = 9 pf receiver latency time [4] t l 25 50 m s receiver wake up time [5] t rw 18 100 m s ei = 10 mw/cm 2 transmitter radiant intensity ie h 100 220 mw/sr i leda = 400 ma, q 1/2 15 , txd 3 v ih . md0 = 0, md1 = 0, t a = 25 c viewing angle 2 q 1/2 30 60 peak wavelength l p 875 nm spectral line half width dl 1/2 35 nm txd logic levels high v ih 2/3 iov cc iov cc v low v il 0 1/3 iov cc v txd input current high i h 0.02 1 m av i 3 v ih low i l C1 C0.02 1 m a0 v i v il led current off i vled 0.03 1 m av vled = v cc = 3.0 v, v i (txd) v il md0 = 0, md1 = 0 wakeup time [6] t tw 30 100 m s maximum optical t pw(max) 25 50 m s pulse width [7] txd rise and t r , t f 40 ns t pw (txd) = 217 ns at 1.152 mb/s fall time (optical) txd pulse width (sir) t tpw (sir) 1.5 1.6 1.8 m st pw (txd) = 1.6 m s at 115.2 kb/s txd pulse width (mir) t tpw (mir) 148 217 260 ns t pw (txd) = 217 ns at 1.152 mb/s
6 notes: 1. an in-band optical signal is a pulse/sequence where the peak wavelength, l p, is defined as 850 nm l p 900 nm, and the pulse characteristics are compliant with the irda serial infrared physical layer link specification. 2. for in-band signals 2.41 kbps to 115.2 kbps where 3.6 m w/cm 2 ei 500 mw/cm 2 . 3. for in-band signals 0.576 mbps to 1.152 mbps where 9 m w/cm 2 ei 500 mw/cm 2 . 4. latency is defined as the time from the last txd light output pulse until the receiver has recovered its full sensitivity. 5. receiver wake up time is measured from the md0 pin high to low transition or md1 pin low to high transition or v cc power on to valid rxd output. 6. transmitter wake up time is measured from the md0 pin high to low transition or md1 pin low to high transition or v cc power on to valid light output in response to a txd pulse. 7. maximum optical pulse width is defined as the maximum time that the led will remain on. this is to prevent the long led turn on time. transceiver md0, md1, mir_sel high i h 0.01 1 m av i 3 v ih , v cc = iov cc = 5 low i l C1 -0.02 1 m a0 v i v il , v cc = iov cc = 5 supply current shutdown i cc1 0.01 1 m av sd 3 iov cc C 0.5, t a = 25 c, v cc = 5.0 v idle i cc2 290 400 m av i (txd) v il , ei = 0 active i cc3 28mav i (txd) v il input current
7 HSDL-3310 package outline with dimensions and recommended pc board layout HSDL-3310 ordering information part number package standard package increment HSDL-3310#007 front view 400 HSDL-3310#017 front view 10 4.9 9.8 2.7 2.93 mounting center 0.83 3.7 4 emitting center 0.37 1.925 light receiving center 1.15 1.4 2.3 4.94 4.44 0.7 0.25 r1.77 r2 unit: mm tolerance: ?0.2 0.45 9 7654321 8 p1.0 x 8 = 8.0 0.7 4 1.01 0.5 1.9 1.8 0.8 1 p1.0x3 = 3 p1.0x3 = 3 mounting center grounded wholly soldering pattern gnd iov cc v cc mir md0 md1 rxd txd vled 9 7 6 5 4 3 2 1 8 0.7 1 2.6 1.9
8 HSDL-3310 reel dimension and shape 80 ?2 180 2.0 ?0.5 17.5 13.0 ?0.5 21.0 ?0.8 r 1.0 +1 ?.5 1.6 ?0.5 label pasted here HSDL-3310 tape and carrier dimensions direction of pulling out 0.4 ?0.05 4.4 ?0.1 gnd vleda 10.2 ?0.1 0.73 ?0.1 4 ?0.1 1.6 +0.1 ? 5.24 ?0.1 8.0 ?0.1 7.5 ?0.1 1.75 ?0.1 16 ?0.3 polarity HSDL-3310 tape configuration empty (40 mm min.) parts mounted leader (400 mm min.) empty (40 mm min.) direction of pulling out
9 reflow profile the reflow profile is a straight line representation of a nominal temperature profile for a convec- tive reflow solder process. the temperature profile is divided into four process zones, each with different d t/ d time temperature change rates. the d t/ d time rates are detailed in the above table. the temperatures are measured at the component to printed-circuit board connections. we recom- mend using convection (forced- medium) reflow instead of ir reflow to eliminate the possibility of delamination damage and shadow effects. in process zone p1 , the pc board and HSDL-3310 castellation i/o pins are heated to a temperature of 125 c to activate the flux in the solder paste. the temperature ramp up rate, r1, is limited to 4 c per process zone symbol d t maximum d t/ d time heat up p1, r1 25 c to 125 c4 c/s solder paste dry p2, r2 125 c to 170 c 0.5 c/s solder reflow p3, r3 170 c to 230 c (245 c max.) 4 c/s p3, r4 230 c to 170 c-4 c/s cool down p4, r5 170 c to 25 c-3 c/s 0 t-time (seconds) t ?temperature ?(?) 200 170 125 100 50 50 150 100 200 250 300 150 183 230 p1 heat up p2 solder paste dry p3 solder reflow p4 cool down 25 r1 r2 r3 r4 r5 90 sec. max. above 183? max. 245? second to allow for even heating of both the pc board and HSDL-3310 castellation i/o pins. process zone p2 should be of sufficient time duration (> 60 seconds) to dry the solder paste. the temperature is raised to a level just below the liquidus point of the solder, usually 170 c (338 f). process zone p3 is the solder reflow zone. in zone p3, the temperature is quickly raised above the liquidus point of solder to 230 c (446 f) for optimum results. the dwell time above the liquidus point of solder should be between 15 and 90 seconds. it usually takes about 15 seconds to assure proper coalescing of the solder balls into liquid solder and the formation of good solder connections. beyond a dwell time of 90 seconds, the intermetallic growth within the solder connec- tions becomes excessive, result- ing in the formation of weak and unreliable connections. the temperature is then rapidly reduced to a point below the soli- dus temperature of the solder, usually 170 c (338 f), to allow the solder within the connections to freeze solid. process zone p4 is the cool down after solder freeze. the cool down rate, r5, from the liquidus point of the solder to 25 c (77 f) should not exceed C3 c per second maximum. this limitation is necessary to allow the pc board and HSDL-3310 castellation i/o pins to change dimensions evenly, putting mini- mal stresses on the HSDL-3310 transceiver.
10 pcb layout suggestion the following pcb layout shows a recommended layout that should result in good electrical and emi performance. things to note: 1. in case a separate ground plane is available in a multi- layer board, the ground plane should be continuous under the part, but should not extend under the trace. 2. the shield trace is a wide, low inductance trace back to the system ground. 3. the agnd pin is connected to the ground plane and not to the shield tab. 4. c1 is an optional v cc filter capacitor. it may be left out if the v cc is clean. 5. v led can be connected to either unfiltered or unregu- lated power. if c1 is used, and if v led uses the same supply as v cc , the connection should be made such that v led is filtered by c1 as well. a reference layout of a 2-layer agilent evaluation board for hsdl- 3310 based on the guidelines stated above is shown below. for more details, please refer to agilent application note 1114, infrared transceiver pc board layout for noise immunity , or to design guidelines in agilent irda data link design guide . gnd gnd gnd 1 11 1 1 1 3 5 7 9 11 2 4 6 8 10 12 cx4 cx2 17 mm 17.8 mm 27.1 mm 7.60001 mm 5.08 mm 2 top layer bottom layer v cc nc txd rxd v led 2 2 2 cx3 gnd gnd gnd gnd 2 cx1 ul
11 1.0 solder pad, mask, and metal solder stencil aperture 1.1 recommended land pattern for HSDL-3310 shield solder pad a b f 9x pad y d e g rx lens tx lens fiducial x c fiducial theta dim. mm inches a b c (pitch) d e f g 2.40 0.65 1.00 1.80 1.70 3.71 3.66 0.095 0.026 0.039 0.071 0.067 0.146 0.144 figure 1. stencil and pcba. figure 2. top view of land pattern. metal stencil for solder paste printing land pattern pcba stencil aperture solder mask
12 1.2 adjacent land keepout and solder mask areas dim. mm inches h min. 0.2 min. 0.008 j 10.8 0.425 k 4.7 0.185 l 3.2 0.126 ? adjacent land keep-out is the maximum space occupied by the unit relative to the land pattern. there should be no other smd components within this area. ? h is the minimum solder resist strip width required to avoid solder bridging adjacent pads. ? it is recommended that 2 fiducial cross be place at mid-length of the pads for unit alignment. note: wet/liquid photo- imageable solder resist/mask is recommended. 2.0 recommended solder paste/ cream volume for castellation joints based on the evaluation for hdsl-3600, the printed solder paste volume required per castellation pad is 0.30 cubic mm (based on either no-clean or aqueous solder cream types with typically 60 to 65% solid content by volume). figure 3. pcba C adjacent land keep-out and solder mask. h l rx lens tx lens j solder mask land k y x
13 2.1 recommended metal solder stencil aperture it is recommended that only 0.152 mm (0.006 inch) or 0.127 mm (0.005 inch) thick stencil be used for solder paste printing. this is to ensure adequate printed solder paste volume and no shorting. the following combination of metal stencil aperture and metal stencil thickness should be used: see figure 4.0 t, nominal stencil thickness l, length of aperture mm inches mm inches 0.152 0.006 3.0 0.05 0.12 0.002 0.127 0.005 3.7 0.05 0.15 0.002 w, the width of aperture is fixed at 0.65 mm (0.026 inch) aperture opening for shield pad is 1.8 mm x 1.8 mm as per land dimension. figure 4. solder paste stencil aperture. aperture as per land dimensions solder paste l w t (stencil thickness)
14 moisture-proof packaging the HSDL-3310 is shipped in moisture-proof packaging. once opened, moisture absorption begins. recommended stortage conditions storage temperature 10 c to 30 c relative humidity below 60% rh time from unsealing to soldering after removal from the bag, the parts should be soldered within two days if stored at the recom- mended storage conditions. if the parts have been removed from the bag for more than two days, the parts must be stored in a dry box. baking if the parts are not stored in a dry environment, they must be baked before reflow process to prevent damage to parts. baking should be done only once. packaging baking temperature baking time in reel 10 c 3 48 hours 100 c 3 4 hours in bulk 125 c 3 2 hours 150 c 3 1 hour
15 optical port dimensions for HSDL-3310 to ensure irda compliance, some constraints on the height and width of the window exist. the minimum dimensions ensure that the irda cone angles are met y d k a z x opaque material ir transparent window opaque material ir transparent window without vignetting. the maximum dimensions minimize the effects of stray light. the minimum size corresponds to a cone angle of 30 and the maximum size corre- sponds to a cone angle of 60 . in the figure above, x is the width of the window, y is the height of the window, and z is the distance from the HSDL-3310 to the back of the window. the distance from the center of the led lens to the center of the photodiode lens, k, is 5.63 mm. the equations for computing the window dimensions are as follows: x = k + 2*(z + d)*tana y = 2*(z + d)*tana the above equations assume that the thickness of the window is negligible compared to the distance of the module from the back of the window (z). if they are comparable, z' replaces z in the above equation. z' is defined as z' = z + t/n where t is the thickness of the window and n is the refractive index of the window material. the depth of the led image inside the HSDL-3310, d, is 8 mm. a is the required half angle for viewing. for irda com- pliance, the minimum is 15 and the maximum is 30 . these equa- tions result in the following tables and graphs:
16 aperture width (x) ?mm 30 module depth (z) ?mm 47 0 5 25 09 20 15 15 x max. x min. 23 6 8 10 aperture height (y) ?mm module depth (z) ?mm 47 0 5 25 09 20 15 15 y max. y min. 23 6 8 10 aperture width (x) vs. module depth. aperture height (y) vs. module depth. module depth aperture width (x) mm aperture height (y) mm (z) mm max. min. max. min. 0 14.8676 9.917187 9.237604 4.287187 1 16.0223 10.45309 10.3923 4.823085 2 17.17701 10.98898 11.54701 5.358984 3 18.33171 11.52488 12.70171 5.894882 4 19.48641 12.06078 13.85641 6.430781 5 20.64111 12.59668 15.01111 6.966679 6 21.79581 13.13258 16.16581 7.502577 7 22.95051 13.66848 17.32051 8.038476 8 24.10521 14.20437 18.47521 8.574374 9 25.25991 14.74027 19.62991 9.110273
17 window material almost any plastic material will work as a window material. poly- carbonate is recommended. the surface finish of the plastic should be smooth, without any texture. an ir filter dye may be used in the window to make it look black to the eye, but the total optical loss of the window should be 10 per- cent or less for best optical performance. light loss should be measured at 875 nm. shape of the window from an optics standpoint, the window should be flat. this en- sures that the window will not alter either the radiation pattern of the led, or the receive pattern of the photodiode. flat window (first choice) curved front and back (second choice) curved front, flat back (do not use) if the window must be curved for mechanical or industrial design reasons, place the same curve on the back side of the window that has an identical radius as the front side. while this will not completely eliminate the lens effect of the front curved surface, it will significantly reduce the effects. the amount of change in the radiation pattern is dependent upon the material chosen for the window, the radius of the front and back curves, and the distance from the back surface to the transceiver. once these items are known, a lens design can be made which will eliminate the effect of the front surface curve. the following drawings show the effects of a curved window on the radiation pattern. in all cases, the center thickness of the window is 1.5 mm, the window is made of polycarbonate plastic, and the distance from the transceiver to the back of the window is 3 mm.
www.semiconductor.agilent.com data subject to change. copyright ? 2001 agilent technologies, inc. april 4, 2001 5988-0129en

▲Up To Search▲

Price & Availability of HSDL-3310

	To Download HSDL-3310 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .