CVD1 product brief t el 408.919.4 1 1 1 fax 408.919.4122 www.zoran.com 06/02-ld description zorans CVD1 video decoder is a silicon efficient, cost effective, high video quality intellectual property core for ic designs requiring video input. the CVD1 decodes ntsc/pal/secam composite video or s-video and converts it into yuv 4:2:2, 16-bit digital video. employing adaptive 2d comb filter technology, the CVD1 is able to provide high quality y/c separation while maintaining excellent frequency response. the result is sharp, high detail video that eliminates unwanted dot crawl and false color effects. a fully digital design, the CVD1 requires the addition of only an a/d (two for s-video support), a dc restore circuit and line buffers for implementation. CVD1 is based on zorans extensive experience delivering high quality, high volume video ics to major oems worldwide. proven in silicon, the CVD1 video decoder greatly reduces the risk and time involved when integrating the video decoding function into an ic. deliverables ? rtl(verilog) source code ? bit accurate c++ model ? synopsis synthesis scripts ? test input files ? documentation ? fpgaevaluation board available fea tures ? decodes ntsc, palor secam composite video or s-video into the yuv 4:2:2 format ? component video inputs supported ? decodes all variations of the ntsc standard ? decodes all variations of pal standard C (i, b, g, h, d, n, m, combination n) ? excellent quality y/c separation C minimizes cross luma and cross color effects ? superior frequency response preserves fine detail ? accepts up to 11-bit inputs from a/d converter ? digital automatic gain control (agc) supported ? adaptive 2d comb filter provides high quality video: C 3-line 2d comb filter for ntsc & pal C 5-line 2d comb filter for pal (optional) ? auto-detects video standard (ntsc, pal or secam) ? auto-detects and locks to vcr trick modes ? decodes weak and noisy off-air signals ? auto-detects and decodes macrovision copy protection ? vbi decoding supported ? silicon efficient design of approximately 130k gates ? requires only a single clock input ranging from 20 to 30 mhz ? process technology independent, fully synchronous design zoran corporation 3112 scott boulevard santa clara, ca 95054-3317 CVD1-pb-4.0 applications ? lcd controllers ? digital tv decoders ? game processors ? pc video capture devices ? set top box decoders ? any ic requiring video input ? ntsc/pal/secam adaptive 2d comb filter video decoder solutions on a chip for enjoying the digital life style
06/02-ldCVD1-pb-4.0 CVD1 product brief ? f or more information, contact zoran's santa clara office or the office nearest you: ntsc/pal/secam adaptive 2d comb filter video decoder solutions on a chip for enjoying the digital life style canada zoran toronto lab 2175 queen st. east, suite 302 t oronto, ontario m4e 1e5 canada te l: (416) 690-3356 fax: (416) 690-3363 china zoran china office suite 2507 electronics science & t ech building 2070 central shennan rd. shenzhen, guangdong, 518031 p.r. china tel:+86-755-83780319 fax: +86-755-83780852 hong kong zoran asia pacific ltd. unit 504-505 new east ocean center no. 9 science museum road kowloon, hong kong t el: +852-2-620-5838 fax: +852-2-620-5238 israel zoran microelectronics ltd. advanced technology ctr. p .o. box 2495 haifa, 31024 israel te l : +972-4-8545-777 fax: +972-4-8551-551 ja pan zoran japan office 2-2-8 roppongi, minato-ku t okyo 106-0032, japan te l : +81-03-5574-7081 fax: +81-03-5574-7156 korea zoran korea office 505, dongbuk building 45-20, yoido-dong, y oungdungpo-ku seoul, korea 150-891 t el: +82-2-761-7471 fax: +82-2-761-7472 taiw an zoran taiwan office 4f-1, no. 5, alley 22 lane 513, reikuang rd. t aipei, taiwan r.o.c. te l: +886-2-2659-9797 fax: +886-2-2659-9595 ext_clk ext_reset_1 reg_addr[7:0] reg_rd_wtn reg_rdy reg_wt_data[7:0] clk reset_1 compluma[9:0] chroma[9:0] reg_ack reg_rd_rdy reg_rd_data[7:0] dc_gate dc_ref yup ydn cbup cbdn crup crdn gain[7:0] cr_sel cout[7:0] yout[7:0] dvalid hactive vactive vbi_dvalid hcount[9:0] vcount[9:0] hsync vsync field no_signal locked proscan 1b0_adr[9:0] 1b1_adr[9:0] 1b_wdata[35:0] 1b_wdata_rdy[1:0] 1b_rdata_req[1:0] 1b0_rdata[35:0] 1b1_rdata[35:0] figure 2. CVD1 logical pinout dc restore adc analog front end control line buffer adaptive 2d comb filter c pll register file ntsc/pal/secam demondulator h pll y u/v h,v, h blank figure 1.block diagram ofthe CVD1 intellectual property core
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