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| MICROCIRCUIT DATA SHEET MNLM111-X REV 0A0 VOLTAGE COMPARATOR General Description The LM111 is a voltage comparator that has input currents nearly a thousand times lower than devices such as the LM106 or LM710. It is also designed to operate over a wider range of supply voltages; from standard + 15V op amp supplies down to the single 5V supply used for IC logic. The output is compatible with RTL, DTL and TTL as well as MOS circuits. Further, it can drive lamp or relay switching voltages up to 50V at currents as high as 50 mA. Both the inputs and the output of the LM111 can be isolated from system ground, and the output can drive loads referred to ground, the positive supply or the negative supply. Offset balancing and strobe capability are provided, and outputs can be wire OR'ed. Although slower than the LM106 and LM710 (200 ns response time vs 40 ns) the device is also much less prone to spurious oscillations. The LM111 has the same pin configuration as LM106 and LM710. Original Creation Date: 06/28/95 Last Update Date: 11/12/98 Last Major Revision Date: 08/14/98 Industry Part Number LM111 NS Part Numbers LM111E/883 LM111H/883 LM111J-8/883 LM111J/883 LM111W/883 LM111WG/883 Prime Die LM111 Processing MIL-STD-883, Method 5004 Subgrp Description 1 2 3 4 5 6 7 8A 8B 9 10 11 Static tests at Static tests at Static tests at Dynamic tests at Dynamic tests at Dynamic tests at Functional tests at Functional tests at Functional tests at Switching tests at Switching tests at Switching tests at Temp ( oC) +25 +125 -55 +25 +125 -55 +25 +125 -55 +25 +125 -55 Quality Conformance Inspection MIL-STD-883, Method 5005 1 MNLM111-X REV 0A0 MICROCIRCUIT DATA SHEET Features Operates from single 5V supply Input current: 150 nA max. over temperature Offset current: 20 nA max. over temperature Differential input voltage range: +30V Power consumption: 135 mW at +15V 2 MNLM111-X REV 0A0 MICROCIRCUIT DATA SHEET (Absolute Maximum Ratings) (Note 1) Total Supply Voltage 36V Output to Negative Supply Voltage 50V Ground to Negative Supply Voltage 30V Differential Input Voltage + 30V Input Voltage (Note 3) + 15V Power Dissipation (Note 2) 500mW Output Short Circuit Duration 10 Sec Operating Temperature Range -55 C to +125 C Thermal Resistance ThetaJA Metal Can Pkg CERDIP (8-LEAD) CERDIP (14-LEAD) (Still Air @ 0.5W) (500LF/Min Air flow @ 0.5W) (Still Air @ 0.5W) (500LF/Min Air flow @ 0.5W) (Still Air @ 0.5W) (500LF/Min Air flow @ 0.5W) 162 C/W 92 C/W 134 C/W 76 C/W 97 C/W 65 C/W 231 C/W 153 C/W 90 C/W 65 C/W 231 C/W 153 C/W CERPACK (10-Lead) (Still Air @ 0.5W) (500LF/Min Air flow @ 0.5W) LCC (20-Lead) CERAMIC SOIC (10-Lead) (Still Air @ 0.5W) (500LF/Min Air flow @ 0.5W) (Still Air @ 0.5W) (500LF/Min Air flow @ 0.5W) ThetaJC Metal Can Pkg CERDIP ( 8-Lead) CERDIP (14-Lead) CERPACK (10-Lead) LCC (20-Lead) CERAMIC SOIC (10-Lead) Storage Temperature Range Lead Temperature (Soldering, 10 seconds) Voltage at Strobe Pin ESD Rating (Note 4) 50 21 20 24 21 24 C/W C/W C/W C/W C/W C/W -65 C to 150 C 260 C V+ -5V 300V 3 MNLM111-X REV 0A0 MICROCIRCUIT DATA SHEET (Absolute Maximum Ratings)Continued) ( (Note 1) Package Weight (Typical) Metal Can Pkg CERDIP ( 8-Lead) CERDIP (14-Lead) CERPACK (10-Lead) CERAMIC SOIC Note 1: TBD TBD TBD TBD 220mg Note 2: Note 3: Note 4: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions. The maximum power dissipation must be derated at elevated temperatures and is dictated by Tjmax (maximum junction temperature), ThetaJA (package junction to ambient thermal resistance), and TA (ambient temperature). The maximum allowable power dissipation at any temperature is PDmax = (Tjmax - TA)/ThetaJA or the number given in the Absolute Maximum Ratings, whichever is lower. This rating applies for +15V supplies. The positive input voltage limit is 30V above the negative supply. The negative input voltage limit is equal to the negative supply voltage or 30V below the positive supply, whichever is less. Human body model, 1.5K Ohms in series with 100pF. 4 MNLM111-X REV 0A0 MICROCIRCUIT DATA SHEET Electrical Characteristics DC PARAMETERS (The following conditions apply to all the following parameters, unless otherwise specified.) DC: V56=0, Rs=0 Ohm, +Vcc=+15V, Vcm=0, Vout=1.4V WRT -Vcc SYMBOL Iio PARAMETER Input Offset Current CONDITIONS Vcm=13.5V, Rs=50K Ohms NOTES PINNAME MIN -10 -20 Vcm=13.5V, V85=V86=0V, Rs=50K Ohms Vcm=-14.5V, Rs=50K Ohms -30 -10 -20 Vcm=-14.5V, V85=V86=0V, Rs=50K Ohms Rs=50K Ohms -30 -10 -20 V85=V86=0V, Rs=50K Ohms Iib Input Bias Current Vcm=13.5V, Rs=50K Ohms -30 MAX 10 20 30 10 20 30 10 20 30 100 150 Vcm = -14.5V, Rs=50K Ohms 100 150 Rs=50K Ohms 100 150 Ilout Output Leakage Current Ground Leakage Current Saturation Voltage Vcc=+ 18V, Vout=35V I5+I6=5mA Vcc= + 18V, Vout=50V I5+I6=5mA Vin= -5mV, I7=50mA Vin= -6mV, I7=8mA IccNegative Supply Current Positive Supply Current Input Leakage Current Input Leakage Current Vcc= + 18V, V28=1V, V38=30V, Vout=50V WRT -Vcc, I5+I6=5mA Vcc= + 18V, V38=1V, V28=30V, Vout=50V WRT -Vcc, I5+I6=5mA WRT -Vcc, 10 500 Ilg WRT -Vcc, 25 500 Vsat 1.5 0.4 5 15 Icc+ 6 15 Il1 10 30 Il2 10 30 UNIT nA nA nA nA nA nA nA nA nA nA nA nA nA nA nA nA nA nA nA V V mA mA mA mA nA nA nA nA SUBGROUPS 1 2, 3 1 1 2, 3 1 1 2, 3 1 1 2, 3 1 2, 3 1 2, 3 1 2, 3 1 2 1, 2, 3 1, 2, 3 1, 2 3 1, 2 3 1 2 1 2 5 MNLM111-X REV 0A0 MICROCIRCUIT DATA SHEET Electrical Characteristics DC PARAMETERS(Continued) (The following conditions apply to all the following parameters, unless otherwise specified.) DC: V56=0, Rs=0 Ohm, +Vcc=+15V, Vcm=0, Vout=1.4V WRT -Vcc SYMBOL Vo(STB) PARAMETER Collector Output Voltage (ST) ISTB = 3mA Vio Input Offset Voltage Vcm=13.5V CONDITIONS NOTES 1 1 PINNAME MIN 14 14 -3 -4 Vcm=13.5V, V85=V86=0V Vcm= -14.5V -3 -3 -4 Vcm= -14.5V, V85=V86=0V -3 -3 -4 V85=V86=0V Vout=0.4V, +Vcc=4.5V, -Vcc=0V, Vcm=3V -3 -5 -6 Vout=4.5V, +Vcc=4.5V, -Vcc=0V, Vcm=3V -3 -4 Vout=0.4V, +Vcc=4.5V, -Vcc=0V, Vcm=0.5V Vout=4.5V, +Vcc=4.5V, -Vcc=0V, Vcm=0.5V Avs Large Signal Gain -12V < Vout < 35V, Rl=1K Ohm 2 2 -5 -6 -3 -4 40 30 3 4 3 3 4 3 3 4 3 5 6 3 4 5 6 3 4 MAX UNIT V V mV mV mV mV mV mV mV mV mV mV mV mV mV mV mV mV mV SUBGROUPS 1 1 1 2, 3 1 1 2, 3 1 1 2, 3 1 1 2, 3 1 2, 3 1 2, 3 1 2, 3 V/mV 4 V/mV 5, 6 AC PARAMETERS (The following conditions apply to all the following parameters, unless otherwise specified.) AC: V56=0, Rs=0 Ohm, +Vcc=+15V, Vcm=0, Vout=1.4V WRT -Vcc tr Response Time 400 nS 7 6 MNLM111-X REV 0A0 MICROCIRCUIT DATA SHEET Electrical Characteristics DC PARAMETERS: DRIFT VALUES (The following conditions apply to all the following parameters, unless otherwise specified.) DC: V56=0, Rs=0 Ohms, +Vcc = +15V, Vcm=0, Vout=1.4V WRT -Vcc. "Deltas not required on B-Level product. Deltas required for S-Level product ONLY as specified on Internal Processing Instructions (IPI)." SYMBOL Iib Vio PARAMETER Input Bias Current Input Offset Voltage Note 1: Note 2: Tested on LTX system. Datalog reading in K = V/mV. Rs=50K Ohms CONDITIONS NOTES PINNAME MIN -10 -0.5 MAX 10 0.5 UNIT nA mV SUBGROUPS 1 1 7 MNLM111-X REV 0A0 MICROCIRCUIT DATA SHEET Graphics and Diagrams GRAPHICS# 05815HRA3 06047HRA2 08358HRB2 08570HRA1 09569HRC2 E20ARE H08CRF J08ARL J14ARH P000264A P000265A P000266A P000267A P000314B P000373A W10ARG WG10ARC DESCRIPTION LCC (E), TYPE C, 20 TERMINAL (B/I CKT) CERDIP (J), 8 LEAD (B/I CKT) METAL CAN, (H) TO-99,8 LEAD,.200 DIA P.C.(B/I CKT) CERDIP (J), 14 LEAD (B/I CKT) CERPACK (W), 10 LEAD (B/I CKT) LCC (E), TYPE C, 20 TERMINAL(P/P DWG) METAL CAN (H), TO-99, 8LD, .200 DIA P.C. (P/P DWG) CERDIP (J), 8 LEAD (P/P DWG) CERDIP (J), 14 LEAD (P/P DWG) METAL CAN (H), 8 LEAD (PINOUT) CERDIP (J), 8 LEAD (PINOUT) CERDIP (J), 14 LEAD (PINOUT) CERPACK (W), 10 LEAD (PINOUT) LCC (E), 20 LEAD (PINOUT) CERAMIC SOIC (WG), 10 LEAD (PINOUT) CERPACK (W), 10 LEAD (P/P DWG) CERAMIC SOIC (WG), 10 LEAD (P/P DWG) See attached graphics following this page. 8 N N N/C GND IN+ INN/C VBALANCE 1 2 3 4 5 6 7 14 13 12 11 10 9 8 N/C N/C N/C V+ N/C OUTPUT BALANCE/ STROBE LM111J 14 - LEAD DIP CONNECTION DIAGRAM TOP VIEW P000266A N MIL/AEROSPACE OPERATIONS 2900 SEMICONDUCTOR DRIVE SANTA CLARA, CA 95050 N N/C GND N/C V+ N/C N/C IN+ N/C INN/C 4 5 6 7 8 3 2 1 20 19 18 17 16 15 14 N/C OUTPUT N/C BALANCE/ STROBE N/C 9 10 11 12 13 N/C V- N/C BALANCE N/C LM111E 20 - LEAD LCC CONNECTION DIAGRAM TOP VIEW P000314B N MIL/AEROSPACE OPERATIONS 2900 SEMICONDUCTOR DRIVE SANTA CLARA, CA 95050 N |
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