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AN1439 APPLICATION NOTE
EVAL6565N, 30W AC-DC ADAPTER WITH THE L6565 QUASI-RESONANT PWM CONTROLLER
by Claudio Adragna
This note describes the evaluation board of the Quasi-resonant (QR) PWM controller L6565 (order code: EVAL6565N) and presents the results of its bench evaluation. The board implements a 30W, single-output (15V/2A), wide-range mains input, QR converter that can be used as a reference design for an AC-DC adapter, where good performance is to be achieved at low cost.
Design Specification Table 1 summarizes the electrical specification of the application, table 2 provides the BOM and table 3 lists transformer's spec. The electrical schematic is shown in figure 1 and the PCB layout in figure 2.
Table 1. EVAL6565N evaluation board: electrical specification
Input Voltage Range (Vin) Mains Frequency (fL) Maximum Output Power (Pout) Output 88 to 264 Vac 50/60 Hz 30 W Vout = 15 V 3% Iout = 0 to 2 A Vripple 1% 60 kHz > 80% < 0.75 W (*)
Minimum Switching Frequency (@ 100 VDC input voltage) Target Efficiency (@ Pout = 30 W, Vin = 88/264 Vac) Maximum No-load Input Power
Note: (*) compliant with European Code of Conduct on Efficiency of External Power Supplies, phase 2, 01.01.2003
Figure 1. EVAL6565N evaluation board: electrical schematic
F1 2A fuse Vin 88V to 264Vac NTC1 10R R1 100 B1 DF04G C5 100F 400V D1 1N4148 C14 56nF 400V D4 1.5KE200 D3 STTA106 3 T1
C15 100pF 400V 1
D7 8 STPS8H100F C10,C11 680F 25V 10 C6 2.2nF Y2
L2 10H C12 330F 25V
15V 2A R15 5.6K
D2 1N4148
R5 4.7 D5 1N4148 R2 1.5M C7 47F 25V R8 47K 5 3 7 R6 220 R7 10 4 2 1 6 C7b 100nF R9 1.5 D6 1N4148
4
R16 220K 8
R3 1.5M
5 IC3 PC817A Q1 STP5NB80FP 4
R11 1.5K 1
IC1
L6565
R10 1.5
3
2 1 IC2 TL431 2
R12 33K
R13 10K C13 560nF R14 2K
3
R4 18K
C8 1nF
C9 2.2nF
D01IN1303
June 2002
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The electrica l specification is typical of an AC-DC adapter for consumer equipment, usually realized as an external unit. As such, it falls within the scope of the European "Code of Conduct on Efficie ncy of External Power Supplies" and is required to be "efficient" under no-load conditions as specified in table 4. The design target is to fulfill the phase 2 requirements, so as to be up-to-date until the year 2005, when phase 3 will set even more stringent limits. Some hints to upgrade the design accordin g to this further step will be given in a following section.
Table 2. EVAL6565N evaluation board: Bill Of Material
Symbol R1 R2, R3 R4 R5 R6 R7 R8 R9, R10 R11 R12 R13 R14 R15 R16 C5 C6 C7 C7b C8, C9 C10, C11 C12 C13 C14 C15 L2 T1 B1 D1, D2, D5, D6 D3 D4 D7 IC1 IC2 IC3 Q1 NTC1 F1 PCB Value 100 1.5 M 18 k 4.7 220 10 47 k 1.5 1.5 k 33 k 10 k 2 k 5.6 k 220 k 100 F 2.2 nF 47 F 100 nF 2.2 nF 680 F 330 F 560 nF 56 nF 100 pF 10 H 558179 DF06G 1N4148 STTA106 1.5KE200 STPS8H100F L6565 TL431CZ PC817A STP5NB80FI SSN550 T2A250V --Note 5%
Metallic film
400V, Rubycon, MXR series or equivalent Y1 class 25V electrolytic Plastic film or ceramic Plastic film or ceramic 25V Rubycon, ZL series or equivalent 25V Sanyo, CG series or equivalent Plastic film or ceramic 400V, polyester 1kV, Y5P, Panasonic or equivalent ELC08D100E, R=44 m, Panasonic or equivalent See spec on table 3. Supplied by Albe s.r.l. (Tel. +39 363 61493) 1A / 600V bridge, DIP4, GI or equivalent 0.3A / 75V, glass case, Vishay or equivalent 1A / 600V Turboswitch, F126, ST 200V Transil, CB429, ST 8A / 100 V Schottky, ISOWATT220AB, ST QR PWM controller, DIP8, ST [1] Shunt regulator, TO92, ST Optocoupler, Sharp or equivalent 1.8 / 800V, TO220FP, ST NTC 10 , Vishay or equivalent 2A, 250V ELU FR-4, Cu single layer 35m, 95.8 x 64.7 mm
Notes: if not otherwise specified, all resistors are 1%, 1/4 W Q1 and D7 are both provided with a 40 C/W heatsink SK95/25/SA from Fischer Elektronik
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Table 3. EVAL6565N: transformer specification (Part number 558179, supplied by Albe s.r.l.)
Core Bobbin Air gap Leakage inductance Pin Start/End 1/2 Windings Spec & Build 7/9 8/10 2/3 4/5 E25/13/7, N67 Material or 3C85 or equivalent Vertical mounting, 10 pins 1 mm for an inductance 1-3 of 740 H < 20 H (@ 60 kHz) pins 1-3 with 4,5,7,8,9,10 shorted Winding Pri1 Sec1 Sec2 Pri2 Aux Wire AWG26 2xAWG23 2xAWG23 AWG26 AWG32 Turns 40 8 8 40 8 Notes Innermost winding Pins 7-8 will be shorted on the PCB Pins 9-10 will be shorted on the PCB Pin2 will be cut for safety Evenly spaced
Figure 2. EVAL6565N: PCB layout, silk + bottom layer (top view); 1:1 scale
Table 4. Limits envisaged by European Code of Conduct on Efficiency of External Power Supplies
No-load Power Consumption Rated Input Power Phase 1 01.01.2001 1.0 W 1.0 W 1.0 W Phase 2 01.01.2003 0.75 W 0.75 W 0.75 W Phase 3 01.01.2005 0.30 W 0.50 W 0.75 W
0.3 W and < 15 W 15 W and < 50 W 50 W and < 75 W
Evaluation board functionality The minimum switching frequency (60 kHz @ Vin = 100 VDC) has been chosen trading off transformer's size against frequency-related losses. The reflected voltage has been chosen equal to 150V, then ZVS will be achieved only when the converter operates from the 110V mains; however, this value seems to provide a good compromise between capacitive and switching losses at 220V mains. To provide room for the leakage inductance spike an 800V MOSFET (STP5NB80FI) will be used.
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To get 150V reflected voltage, the primary-to-secondary turn ratio is made 1:10, which originates relatively low reverse voltages at the secondary side and allows the use of a schottky rectifier as the secondary diode (D7). An STPS8H100F has been selected. Two design choices have been done to meet the no-load consumption target. First, the converter is started up with a charge pump made up by D1, D2, C14 and R1 instead of the usual dropping resistor. This circuit, usable thanks to the extremely low start-up current of the L6565, provides a typical wake-up time going from 2.2s @ 88 Vac to 0.7s @ 264 Vac, while dissipating less than 50 mW @ 264 Vac, i.e. saving about 200 mW as compared to a start-up circuit made with a dropping resistor that gives the same wake-up time. Second, the leakage inductance spikes are handled by a Transil clamp (D4, with the addition of D3 to prevent direct conduction during MOSFET's ON-time), instead of an RCD clamp, thus saving about 200 mW more. R2+R3 and R4 compensate for the power capability change vs. the input voltage (Voltage Feedforward). Their ratio has been found simply by fixing the high side one (using a high resistance value to keep the losses low) and varying the low side resistance until the converter loses output voltage regulation with the same load @ 88 and 264 Vac. A 1nF film capacitor bypasses any noise on pin #3 to ground. To stay within 3% tolerance, the output voltage regulation is done with secondary feedback, using a typical arrangement TL431+optocoupler. R12, C13 and C9 (on the primary side) compensate the voltage loop for stability. Typically, the crossover frequency is 5 kHz with 70 phase margin. A 100 pF low-loss capacitor (C15) has been added across the primary winding to optimize MOSFET's losses at maximum load by a small snubbing effect on the drain voltage rate of rise. The delay between transformer' s demagnetization and MOSFET's turn-on is adjusted by means of R8. The final value of 47 kW has been experimentally determined so as to achieve the optimum turn-on point (after the addition of C15). The converter is fully protected against short circuit: under this conditions it operates at the frequency of the internal starter (2.5 kHz) and the reflected voltage on the auxiliary winding drops, hence the supply voltage of the L6565 cannot be maintained. This results in intermittent operation ("hiccup" mode) with low power throughput (< 1W @ 264 Vac). R10 prevents improper MOSFET's turn-on, due to signal bouncing on the pin, by pulling up the ZCD pin that would be completely floating otherwise. Additionally, thanks to the 2nd overcurrent level on the L6565's current sense pin, also a short circuit directly across the secondary winding - or D7 failing short will cause an intermittent operation with an even lower level of power throughput.
Board evaluation: getting started The AC voltage, generated by an AC source ranging from 88 Vac to 264 Vac, will be applied to connector M1 (at the bottom left-hand corner). Should one want to use a high-voltage DC source, remember that the start-up charge pump would not work and a dropping resistor would be needed to let the L6565 start. The 15 VDC output (connector M2) is located close to the bottom right-hand corner and will be connected to the load. If an electronic load is going to be used in CC mode, make sure that the voltage which the load starts sinking current at is > 1 V or use CR mode if this cannot be set, otherwise the board may not start up at maximum load. This happens because Vout needs to build up a little in order for the ZCD signal to be large enough to trigger QR operation [2]. Before that, the converter runs at the frequency of the internal starter, with a much lower power capability that may be easily exceeded if the load starts sinking the maximum current as Vout is just above zero. In this case Vout gets clamped at a low value, the ZCD signal cannot reach the minimum amplitude required, QR operation cannot take place and the system cannot start up. Like in any offline circuit, extreme caution must be used when working with the application board because it contains dangerous and lethal potentials. The application must be tested with an isolation transformer connected between the AC mains and the input of the board to avoid any risk of electrical shock. Board evaluation: bench results and significant waveforms In the following tables the results of some bench evaluations are summarized. A number of waveforms under different load and line conditions are shown for user's reference.
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Table 5. EVAL6565N: typical performance
Parameter Regulated Output Voltage (@ Vin = 220 Vac, Iout = 2A) Minimum Operating Frequency (@ Vin = 88 Vac, Iout = 2A) Maximum Operating Frequency (@ Vin = 264 Vac, Iout = 1.1 A) Line Regulation (Vin = 88 to 264 Vac, Iout = 2 A) Load Regulation (Vin = 88 Vac, Iout = 0 to 2 A) High-frequency Output Voltage Ripple (@ Vin = 88 Vac, Iout = 2A) Line-frequency Output Voltage Ripple (@ Vin = 88 Vac, fL = 60 Hz, Iout = 2A) Maximum Full-load Efficiency (@ Vin = 176 Vac, Iout = 2) Maximum No-load Input Power (@ Vin = 264 Vac) Value 14.924 60 214 1 55 10 <5 85 0.6 Unit V kHz kHz mV mV mV mV % W
Table 6. EVAL6565N: Line/load regulation and Efficiency
Vac [V] 2.0 1.5 Iout [A] 1.0 0.5 0.2 88 Vout = 14.925V = 82.6 % Vout = 14.938V = 83.3 % Vout = 14.952V = 84.0 % Vout = 14.966V = 83.1 % Vout = 14.974V = 78.8 % 110 Vout = 14.924V = 84.0 % Vout = 14.938V = 84.6 % Vout = 14.952V = 85.0 % Vout = 14.966V = 83.1 % Vout = 14.974V = 78.8 % 132 Vout = 14.924V = 84.5 % Vout = 14.938V = 84.9 % Vout = 14.952V = 85.0 % Vout = 14.966V = 83.1 % Vout = 14.974V = 76.8 % 176 Vout = 14.924V = 85.0 % Vout = 14.938V = 84.9 % Vout = 14.952V = 84.0 % Vout = 14.966V = 81.3 % Vout = 14.974V = 73.0 % 220 Vout = 14.924V = 84.5 % Vout = 14.938V = 83.6 % Vout = 14.952V = 81.7 % Vout = 14.966V = 77.1 % Vout = 14.974V = 66.5 % 264 Vout = 14.924V = 83.1 % Vout = 14.938V = 81.8 % Vout = 14.952V = 78.7 % Vout = 14.966V = 72.6 % Vout = 14.974V = 58.7 %
Table 7. EVAL6565N: Light-load Input Power (@ Pout = 0.5 W)
VAC [V] Pin [W] 88 0.9 110 1.0 132 1.1 176 1.2 220 1.5 264 1.6
Table 8. EVAL6565N: No-load Input Power
VAC [V] Pin [W] 88 0.4 110 0.4 132 0.45 176 0.5 220 0.55 264 0.60
Table 9. EVAL6565N: Maximum Power Capability(measured at 0.95*Vout)
VAC [V] Pinmax [W] 88 52.5 110 57.1 132 59.5 176 60.2 220 57.4 264 52.3
Table 10. EVAL6565N: Typical Wake-up Time
VAC [V] TWAKE [s] 88 2.21 110 1.65 132 1.34 176 1.16 220 0.91 264 0.75
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Figure 3. Full load, Vin = 100 VDC (left), Vin = 380 VDC (right)
Ch2: Q1 drain voltage Ch1: current sense pin
Ch2: Q1 drain voltage Ch1: current sense pin
Figure 4. EVAL6565N: Half load, Vin = 100 VDC (left), Vin = 380 VDC (right, note uneven skipping)
Ch2: Q1 drain voltage Ch1: current sense pin
Ch2: Q1 drain voltage Ch1: current sense pin
Figure 5. EVAL6565N: No load, Vin = 100 VDC (left), Vin = 380 VDC (right, burst-mode)
Ch2: Q1 drain voltage Ch1: current sense pin
Ch2: Q1 drain voltage Ch1: current sense pin
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Figure 6. EVAL6565N Full-load Output Ripple @ Vin = 110 Vac: high freq. (left), line freq. (right)
Figure 7. EVAL6565N behavior upon short circuit on: the output (left), D7 (right). Vin = 220 Vac
Ch1: Q1 drain voltage Ch2: L6565 supply voltage
Ch1: Q1 drain voltage Ch2: L6565 supply voltage
Figure 8. EVAL6565N: Load Transient (@ Vin = 220 Vac: Iout = 0.5 to 2.5 A)
Ch2: Output voltage Ax1:Load current
Evaluation board optimization for minimum no-load consumption Some more optimization steps need to be taken in order for the EVAL6565N to fulfill the limits envisaged by the 3rd phase of the European Code of Conduct on Efficiency of External Power Supplies, which will be active starting from 01.01.2005. According to this, the no-load consumption must be less than 0.5 W at rated input voltage (220 Vac for European mains, the 110 Vac of the US mains is not a concern). To have some margin, it is a
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common design target to fulfill the spec even at maximum input voltage (264 Vac). The optimization steps are basically three:
1) Eliminate C15. This will slightly hurt efficiency at heavy and moderate load but save about 100 mW of no-load input consumption at maximum mains. 2) Replace the start-up charge pump with a more efficient high-voltage active start-up circuit, like the one shown in figure 9. This will save about 40 mW input consumption. 3) The feedback network topology at the primary side should be changed as shown in figure 10. The feedback topology used in the EVAL6565N is such that under no-load conditions the optocoupler draws about 3mA out of pin COMP, which adds up to the quiescent current of the IC. This additional load causes the Vcc voltage to drop so that a small dummy load (R15) is required at the secondary side. With the circuit in figure 10, the operating current of optocoupler is reduced at 1 mA and also the dummy load can be reduced, just the 10 k resistor used to provide adequate bias current to the TL431. The input consumption will be reduced by about 100 mW. Figure 9. High-voltage active start-up circuit
HV Input Bus 4.7 M 4.7 M STD1NB50
33 k
20V
BC337
33 k COMP
2
IC1
8
Vcc
R5 D5 4.7 1N4148 4
C7 47F 25 V
L6565
6 GND
5
Figure 10. Low-consumption feedback network
Vout
R11 1.5 k IC3 PC817A 4
1 RA 56 k INV RB
10 k 1
IC1
Vcc 8
L6565
2 COMP
3
2 1
R12 33 k C13 560 nF R13 10 k
6.8 k
CA 560 pF
RE 2.4 k
3 IC2 TL431 2
R14 2k
Table 11. EVAL6565N modified as per optimization steps 1 to 3: no-load input power measurements
VAC [V] Pin [W] 88 0.3 110 0.3 132 0.3 176 0.35 220 0.4 264 0.4
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To gain more design margin the following tips could be considered:
a) Increase R2, R3 and R4: by using 4.7M for R2 and R3 and 56 k for R4, the input consumption will be reduced by 30 mW. b) Reduce the parasitic capacitance of the drain node by using a smaller or lower voltage rating MOSFET. The price to pay is more dissipation at full load and a larger heatsink. For example, with the next smaller size (STP4NB80), the C is reduced by 30%, with an estimated power saving of about 15 oss mW under no-load conditions. The full load losses, however, will be increased by 2/3 and a 24 C/W heatsink (instead of 40 C/W) will be needed. It might be worth designing with a lower reflected voltage, so that a lower voltage MOSFET can be used. For example the 600V-rated MOSFET with the same Rds(on) as the STP5NB80, the STP4NC60, has a C which is only 53%, which allows saving oss about 20 mW. The full-load losses will be slightly increased but not so much. c) Another way to reduce the drain parasitic capacitance is to minimize the parasitic capacitance of the primary winding. To achieve a low capacitance, split the primary winding (this goes in favor of a low leakage inductance too) and wind first the half whose end is to be connected to the drain of the MOSFET. In case of multiple layer winding, which exhibits higher capacitance, it is useful to embed one layer of isolation in between. This, however, tends to increase leakage inductance and therefore should be done with care. Slotted bobbins are also very effective to this end but they tend to increase leakage inductance too.
REFERENCES [1] "L6565 Quasi-Resonant SMPS Controller" Datasheet [2] "L6565 Quasi-Resonant Controller" (AN1326)
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Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. N o license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics (c) 2002 STMicroelectronics - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan -Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. http:/ /www.st.com
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