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 SY89850U
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Precision Low-Power LVPECL Line Driver/Receiver with Internal Termination
General Description
The SY89850U is a 2.5V/3.3V precision, high-speed, differential receiver capable of handling clocks up to 4GHz and data streams up to 3.2Gbps. The differential input includes Micrel's unique, 3-pin input termination architecture that allows users to interface to any differential signal (AC or DC-coupled) as small as 100mV (200mVpp) without any level shifting or termination resistor networks in the signal path. The outputs are 800mV LVPECL, with extremely fast rise/fall times guaranteed to be less than 160ps. The SY89850U operates from a 2.5V 5% supply or a 3.3V 10% supply and is guaranteed over the full industrial temperature range of -40C to +85C. The SY89850U is part of Micrel's high-speed, Precision EdgeTM product line. All support documentation can be found on Micrel's web site at www.micrel.com.
Precision EdgeTM
Features
* Guaranteed AC performance over temperature and supply voltage: - DC- to > 3.2Gbps data rate throughput - 4GHz clock fmax (typ.) - <280ps In-to-Out tpd - <160ps tr/tf * Low power: 50mW (2.5V typ.) * Ultra-low jitter design: - <1ps(rms) random jitter - <10ps(pp) deterministic jitter - <10ps(pp) total jitter (clock) * Unique input termination and VT pin accepts DCand AC-coupled inputs (CML, PECL, LVDS) * Typical 800mV (100k) LVPECL Output Swing * Power supply 2.5V 5% or 3.3V 10% * Industrial temperature range -40C to +85C * Available in ultra-small (2mm x 2mm) 8-pin MLFTM package
Typical Application
Applications
* Backplane buffering * OC-12 to OC-192 SONET/SDN clock/data distribution * All Gigabit Ethernet clock or data distribution * Fibre Channel distribution
Markets
* * * * LAN/WAN Enterprise Servers ATE Test and Measurement
Precision Edge is a trademark of Micrel, Inc. MicroLeadFrame and MLF are trademarks of Amkor Technology, Inc.
February 2005
M9999-020305 hbwhelp@micrel.com or (408) 955-1690
Micrel, Inc.
SY89850U
www..com
Ordering Information(1)
Part Number SY89850UMG SY89850UMGTR
Notes: 1. Contact factory for dice availability. Dice are guaranteed at TA = 25C, DC Electrical Only. 2. Tape and Reel.
(2)
Package Type MLF-8 MLF-8
Operating Range Industrial Industrial
Package Marking 850U with Pb-Free bar-line indicator 850U with Pb-Free bar-line indicator
Lead Finish NiPdAu Pb-Free NiPdAu Pb-Free
Pin Configuration
8-Pin MLFTM (MLF-8)
Pin Description
Pin Number 1, 4 Pin Name IN, /IN Pin Function Differential Input: This input pair is the signal to be buffered. These inputs accept AC- or DC-coupled signals as small as 100mV. Each pin of this pair internally terminates to a VT pin through 50. Note that this input will default to an indeterminate state if left open. Please refer to the "Input Interface Applications" section for more details. Input Termination Center-Tap: Each side of the differential input pair terminates to this pin. The VT pin provides a center-tap to a termination network for maximum interface flexibility. See "Input Interface Applications" section for more details. Reference Output Voltage: This output biases to VCC -1.2V. Connect to VT pin when AC-coupling the input. Bypass with 0.01F low ESR capacitor to VCC. Maximum sink/source current is 1.5mA. Due to the limited drive capability, the VREF-AC pin is only intended to drive its respective VT pin. See "Input Interface Applications" section. Ground: Ground pin and exposed pad must be connected to the same ground plane. Differential 100K LVPECL Output: This LVPECL output is the output of the device. Terminate through 50 to VCC-2V. See "Output Interface Applications" section. Positive Power Supply: Bypass with 0.1F//0.01F low ESR capacitors as close to the VCC pin as possible.
2
VT
3
VREF-AC
5 7, 6 8
GND, Exposed Pad Q, /Q VCC
February 2005
2
M9999-020305 hbwhelp@micrel.com or (408) 955-1690
Micrel, Inc.
SY89850U
www..com
Absolute Maximum Ratings(1)
Supply Voltage (VCC) .......................... -0.5V to +4.0V Input Voltage (VIN) .................................. -0.5V to VCC LVPECL Output Current (IOUT) ................................... Continuous..................................................50mA Surge ........................................................100mA Input Current .............................................................. Source or sink current on IN, /IN ..............50mA Termination Current ................................................... Source or sink current on VT ..................100mA Source or sink current on VREF-AC .....................2mA Lead Temperature (soldering, 20sec.) ............. 260C Storage Temperature (Ts) ...............-65C to +150C
Operating Ratings(2)
Supply Voltage (VCC).................. +2.375V to +2.625V ......................................................+3.0V to +3.6V Ambient Temperature (TA)................ -40C to +85C Package Thermal Resistance(3) MLFTM (JA) Still-Air ..................................................... 93C/W MLFTM (JB) Junction-to-Board .................................... 60C/W
DC Electrical Characteristics(4)
TA = -40C to +85C, unless noted.
Symbol VCC ICC RDIFF_IN RIN VIH VIL VIN VDIFF_IN VT_IN VREF-AC
Notes: 1. Permanent device damage may occur if Absolute Maximum Ratings are exceeded. This is a stress rating only and functional operation is not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings. Package Thermal Resistance assumes exposed pad is soldered (or equivalent) to the devices most negative potential on the PCB. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. VIH (min) not lower than 1.2V.
Parameter Power Supply Power Supply Current Differential Input Resistance (IN-to-/IN) Input Resistance (IN-to-VT), (/IN-to-VT) Input High Voltage (IN, /IN) Input Low Voltage (IN, /IN) Input Voltage Swing (IN, /IN) Differential Input Voltage Swing |IN-/IN| In-to-VT (IN, /IN) Output Reference Voltage
Condition
Min 2.375 3.0
Typ 2.5 3.3 20 100 50
Max 2.625 3.6 30 110 55 VCC VIH-0.1 1.7
Units V V mA V V V V
No load, max. VCC 90 45 Note 5 VCC-1.6 0 See Figure 1a. See Figure 1b. 0.1 0.2
1.28 VCC-1.3 VCC-1.2 VCC-1.1
V V
2. 3. 4. 5.
February 2005
3
M9999-020305 hbwhelp@micrel.com or (408) 955-1690
Micrel, Inc.
SY89850U
www..com
LVPECL Output DC Electrical Characteristics(6)
VCC = +2.5V 5% or +3.3V 10%; TA = -40C to +85C; RL = 50 to VCC -2V, unless otherwise stated.
Symbol VCC VOL VOUT VDIFF_OUT
Note: 6. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.
Parameter Output High Voltage Q, /Q Output Low Voltage Q, /Q Output Voltage Swing Q, /Q Differential Output Voltage Swing Q, /Q
Condition
Min VCC -1.145 VCC -1.945
Typ
Max VCC -0.895 VCC -1.695
Units V V mV mV
See Figure 1a. See Figure 1b.
550 1100
800 1600
AC Electrical Characteristics(7)
VCC = +2.5V 5% or +3.3V 10%; TA = -40C to +85C; RL = 50 to VCC -2V, unless otherwise stated.
Symbol fMAX tpd tpd Tempco tJITTER Parameter Maximum Operating Frequency VOUT 400mV Propagation Delay IN-to-Q Differential Propagation Delay Temperature Coefficient Data Random Jitter (RJ) Deterministic Jitter (DJ) Clock Cycle-to-Cycle Jitter Total Jitter (TJ) tr, tf
Notes: 7. 8. 9. The circuit is designed to meet the AC specifications shown in the above table after thermal equilibrium has been established. Random jitter is measured with a K28.7 comma detect character pattern, measured at 2.5Gbps and 3.2Gbps. Deterministic jitter is measured at 2.5Gbps and 3.2Gbps, with both K28.5 and 2 -1 PRBS pattern.
23
Condition NRZ Data Clock VIN 100mV
Min 3.2
Typ 4
Max
Units Gbps GHz
180
260 115
360
ps fs/C
Note 8 Note 9 Note 10 Note 11 At full output swing. 50 100
1 10 1 10 160
ps(rms) ps(pp) ps(rms) ps(pp) ps
Rise/Fall Time (20% to 80%) Q, /Q
10. Cycle-to-cycle jitter definition: the variation of periods between adjacent cycles, Tn -Tn-1 where T is the time between rising edges of the output signal. 11. Total jitter definition: with an ideal clock input of frequency < fMAX, no more than one output edge in 10 output edges will deviate by more than the specified peak-to-peak jitter value.
12
February 2005
4
M9999-020305 hbwhelp@micrel.com or (408) 955-1690
Micrel, Inc.
SY89850U
www..com
Single-Ended and Differential Swings
Figure 1a. Singled-Ended Voltage Swing
Figure 1b. Differential Voltage Swing
Timing Diagram
February 2005
5
M9999-020305 hbwhelp@micrel.com or (408) 955-1690
Micrel, Inc.
SY89850U
www..com
Typical Operating Characteristics
VCC = 3.3V, GND = 0V, VIN = 400mVpp, tr/tf 300ps, TA = 25C, unless otherwise stated.
February 2005
6
M9999-020305 hbwhelp@micrel.com or (408) 955-1690
Micrel, Inc.
SY89850U
www..com
Functional Characteristics
VCC = 3.3V, GND = 0V, VIN = 400mVpp, tr/tf 300ps, TA = 25C, unless otherwise stated.
February 2005
7
M9999-020305 hbwhelp@micrel.com or (408) 955-1690
Micrel, Inc.
SY89850U
www..com
Input and Output Stages
Figure 2a. Simplified Differential Input Stage
Figure 2b. Simplified LVPECL Output Stage
Input Interface Applications
Option: may connect VT to VCC
Figure 3a. LVPECL Interface (DC-Coupled)
Figure 3b. LVPECL Interface (AC-Coupled)
Figure 3c. CML Interface (DC-Coupled)
Figure 3d. CML Interface (AC-Coupled)
Figure 3e. LVDS Interface (DC-Coupled)
February 2005
8
M9999-020305 hbwhelp@micrel.com or (408) 955-1690
Micrel, Inc.
SY89850U
www..com
Output Interface Applications
LVPECL has a high input impedance, a very low output impedance (open emitter), and a small signal swing which results in low EMI. LVPECL is ideal for driving 50 and 100-controlled impedance transmission lines. There are several techniques for terminating the LVPECL output: Parallel TerminationThevenin Equivalent, Parallel Termination (3-resistor), and AC-coupled Termination. Unused output pairs may be left floating. However, single-ended outputs must be terminated, or balanced.
Note: 1. For +2.5V systems, R1 = 250, R2 = 62.5.
Figure 4a. Parallel Termination-Thevenin Equivalent
Notes: 1. Power-saving alternative to Thevenin termination. 2. Place termination resistors as close to destination inputs as possible. 3. Rb resistor sets the DC bias voltage, equal to VT. 4. For 2.5V systems, Rb = 19.
Figure 4b. Parallel Termination (3-Resistor)
Related Product and Support Documentation
Part Number SY58601U Function Ultra-Precision Differential 800mV LVPECL Line Driver/Receiver with Internal Termination MLFTM Application Note HBW Solutions New Products and Applications Data Sheet Link www.micrel.com/product-info/products/sy58601u.shtml www.amkor.com/products/notes_papers/MLF_AppNote.pdf www.micrel.com/product-info/products/solutions.shtml
February 2005
9
M9999-020305 hbwhelp@micrel.com or (408) 955-1690
Micrel, Inc.
SY89850U
www..com
Package Information
8-Pin Ultra-Small EPAD MLFTM (MLF-8)
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA
TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http:/www.micrel.com
The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer. Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser's use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser's own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. (c) 2005 Micrel, Incorporated.
February 2005
10
M9999-020305 hbwhelp@micrel.com or (408) 955-1690


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