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EL7563C
EL7563C
Monolithic 4 Amp DC:DC Step-down Regulator
Features
* Integrated synchronous MOSFETs and current mode controller * 4A continuous output current * Up to 95% efficiency * Internal patented current sense * Cycle-by-cycle current limit * 3V to 3.6V input voltage * Adjustable output voltage 1V to 2.5V * Precision reference * 0.5% load and line regulation * Adjustable switching frequency to 1MHz * Oscillator synchronization possible * Internal soft-start * Over-voltage protection * Junction temperature indicator * Over-temperature protection * Under-voltage lockout * Multiple supply start-up tracking * Power-good indicator * 20-pin SO (0.300") package * 28-pin HTSSOP package
General Description
The EL7563C is an integrated, full-featured synchronous step-down regulator with output voltage adjustable from 1.0V to 2.5V. It is capable of delivering 4A continuous current at up to 95% efficiency. The EL7563C operates at a constant frequency pulse width modulation (PWM) mode, making external synchronization possible. Patented onchip resistorless current sensing enables current mode control, which provides cycle-by-cycle current limiting, over-current protection, and excellent step load response. The EL7563C features power tracking, which makes the start-up sequencing of multiple converters possible. A junction temperature indicator conveniently monitors the silicon die temperature, saving the designer time on the tedious thermal characterization. The minimal external components and full functionality make this EL7563C ideal for desktop and portable applications. The EL7563C is specified for operation over the full -40C to +85C temperature range.
Typical Application Diagram (EL7563CM)
C5 1 CREF 0.1F 2 SGND C4 3 COSC R4 22 C3 0.22F 390pF 4 VS C2 5 PSHR 2.2nF 6 PGND VIN 3.3V C1 330F 7 PGND 8 VIN 9 STP LX 15 LX 14 PGNDP 13 PGND 12 PGND 11 VHI 16 C6 0.22F L1 4.7H C10 2.2nF C7 330F D1 VDRV 17 D3 C9 0.1F VOUT 2.5V 4A R2 1.54k R1 1k PG 18 D2 D4 C8 0.22F FB 19 EN 20
Applications
* * * * * DSP, CPU Core, and I/O Supplies Logic/Bus supplies Portable equipment DC:DC converter modules GTL + Bus power supply
Ordering Information
Part No EL7563CM EL7563CM-T13 EL7563CRE-T7 EL7563CRE-T13 Package 20-Pin SO (0.300") 20-Pin SO (0.300") 28-Pin HTSSOP 28-Pin HTSSOP Tape & Reel 13" 7" 13" Outline # MDP0027 MDP0027 MDP0048 MDP0048
10 STN
October 5, 2001
EL7563CM
Typical Application Diagrams continued on page 3 Manufactured Under U.S. Patent No. 5,7323,974
Note: All information contained in this data sheet has been carefully checked and is believed to be accurate as of the date of publication; however, this data sheet cannot be a "controlled document". Current revisions, if any, to these specifications are maintained at the factory and are available upon your request. We recommend checking the revision level before finalization of your design documentation.
(c) 2001 Elantec Semiconductor, Inc.
EL7563C
EL7563C
Monolithic 4 Amp DC:DC Step-down Regulator
Absolute Maximum Ratings (T
Supply Voltage between VIN or VDD and GND VLX Voltage Input Voltage VHI Voltage
A
= 25C)
+4.5V VIN +0.3V GND -0.3V, VDD +0.3V GND -0.3V, VLX +6V
Storage Temperature Operating Ambient Temperature Operating Junction Temperature
-65C to +150C -40C to +85C +135C
Important Note: All parameters having Min/Max specifications are guaranteed. Typ values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA.
DC Characteristics
VDD = VIN = 3.3V, TA = TJ = 25C, COSC = 1.2nF, unless otherwise specified. Parameter VREF VREFTC VREFLOAD VRAMP IOSC_CHG IOSC_DIS IVDD+VDRV IVDD_OFF VDD_OFF VDD_ON TOT THYS ILEAK ILMAX RDSON RDSONTC ISTP ISTN VPGP VPGN VPG_HI VPG_LO VOVP VFB VFB_LINE VFB_LOAD VFB_TC IFB VEN_HI VEN_LO IEN Description Reference Accuracy Reference Temperature Coefficient Reference Load Regulation Oscillator Ramp Amplitude Oscillator Charge Current Oscillator Discharge Current VDD+VDRV Supply Current VDD Standby Current VDD for Shutdown VDD for Startup Over Temperature Threshold Over Temperature Hysteresis Internal FET Leakage Current Peak Current Limit FET On Resistance RDSON Tempco Auxilliary Supply Tracking Positive Input Pull Down Current Auxilliary Supply Tracking Negative Input Pull Up Current Positive Power Good Threshold Negative Power Good Threshold Power Good Drive High Power Good Drive Low Over Voltage Protection Output Initial Accuracy Output Line Regulation Output Load Regulation Output Temperature Stability Feedback Input Pull Up Current EN Input High Level EN Input Low Level Enable Pull Up Current VEN = 0 1 -4 -2.5 ILOAD = 0A VIN = 3.3V, VIN = 10%, ILOAD = 0A 0.5A< ILOAD <4A -40C < TA<85C, ILOAD = 2A VFB = 0V 0.977 VSTP = VIN/2 VSTN = VIN/2 With respect to target output voltage With respect to target output voltage IPG = 1mA IPG = -1mA 10 0.992 0.5 0.5 1 100 200 2.7 1.007 8 -16 2.7 0.5 -4 Wafer level test only EN = 0, LX = 3.3V (low FET), LX = 0V (high FET) 5 30 0.2 2.5 2.5 4 16 -8 60 0.1V2
EL7563C
EL7563C
Monolithic 4 Amp DC:DC Step-down Regulator
Closed Loop AC Electrical Characteristics
VS = VIN = 3.3V, TA = TJ = 25C, COSC = 1.2nF, unless otherwise specified. Parameter FOSC tSYNC MSS tBRM tLEB DMAX Description Oscillator Initial Accuracy Minimum Oscillator Sync Width Soft Start Slope FET Break Before Make Delay High Side FET Minimum On Time Maximum Duty Cycle Conditions Min 100 Typ 115 25 0.5 15 150 95 Max 125 Unit kHz ns V/ms ns ns %
Typical Application Diagrams (Continued)
C5 1 CREF 0.1F 2 SGND C4 3 COSC R4 22 C3 0.22F 390pF 4 VS C2 5 PSHR 2.2nF 6 PGND C1 330F 7 PGND 8 PGND 9 PGND 10 VIN 11 VIN 12 NC 13 STP 14 STN LX 23 LX 22 LX 21 LX 20 LX 19 LX 18 NC 17 PGND 16 PGND 15 EL7563CRE VHI 24 C6 0.22F L1 4.7H C10 2.2nF C7 330F D1 VDRV 25 D3 C9 0.1F VOUT 2.5V 4A R2 1.54k R1 1k PG 26 D2 D4 C8 0.22F FB 27 EN 28
VIN 3.3V
For the package information, please refer to the Elantec website at http://www.elantec.com/pages/package_outline.html
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EL7563C
EL7563C
Monolithic 4 Amp DC:DC Step-down Regulator
Pin Descriptions
Pin Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Pin Name VREF SGND COSC VDD VTJ PGND PGND VIN STP STN PGND PGND PGND LX LX VHI VDRV PG FB EN Control circuit negative supply or signal ground Oscillator timing capacitor (see performance curves) Control circuit positive supply; normally connected to VIN through an RC filter Junction temperature monitor; connected with 2.2nF to 3.3nF to SGND Ground return of the regulator; connected to the source of the low-side synchronous NMOS power FET Ground return of the regulator; connected to the source of the low-side synchronous NMOS power FET Power supply input of the regulator; connected to the drain of the high-side NMOS power FET Auxilliary supply tracking positive input; tied to regulator output to synchronize start up with a second supply; leave open for stand alone operation; 2A internal pull down current Auxilliary supply tracking negative input; connect to output of a second supply to synchronize start up; leave open for stand alone operation; 2A internal pull up current Ground return of the regulator; connected to the source of the low-side synchronous NMOS power FET Ground return of the regulator; connected to the source of the low-side synchronous NMOS power FET Ground return of the regulator; connected to the source of the low-side synchronous NMOS power FET Inductor drive pin; high current output whose average voltage equals the regulator output voltage Inductor drive pin; high current output whose average voltage equals the regulator output voltage Positive supply of high-side driver; boot strapped from VDRV to LX with an external 0.22F capacitor Positive supply of low-side driver and input voltage for high side boot strap Power good window comparator output; logic 1 when regulator output is within 10% of target output voltage Voltage feedback input; connected to external resistor divider between VOUT and SGND; a 125nA pull-up current forces VOUT to SGND in the event that FB is floating Chip enable, active high; a 2A internal pull up current enables the device if the pin is left open; a capacitor can be added at this pin to delay the start of converter Pin Function Bandgap reference bypass capacitor; typically 0.1F to SGND
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EL7563C
EL7563C
Monolithic 4 Amp DC:DC Step-down Regulator
Typical Performance Curves (20-Pin SO Package)
*Note: The 28-Pin HTSSOP Package Offers Improved Performance
100 95 90 Efficiency (%)
*Efficiency vs I O VIN=3.3V VO=2.5V VO=1.8V
100 95 90 Efficiency (%) 85 80 75 70 65 2.5 3 3.5 4 60
*Efficiency vs I O VO=2.5V VIN=3V VIN=3.3V VIN=3.6V
85 80 75 70 65 60 0 Measured with SO20 package 0.5 1 1.5 2 VO=1.2V VO=1V
Measured with SO20 package 0 0.5 1 1.5 2 2.5 3 3.5 4
Load Current IO (A) *Converter Total Power Loss vs IO VIN=3.3V Measured with SO20 package VO=1.2V VO=1.8V Load Regulation VO=2.5V
Load Current IO (A)
1.8 1.6 1.4
2.505 2.5 2.495 Output Voltage (V) 2.49 2.485 2.48 2.475 2.47
VIN=3.6V
Power Loss (W)
1.2 1 0.8 0.6 0.4 0.2 0 0 0.5 1 1.5 2
VIN=3.3V
VO=1V
VIN=3V
VO=2.5V
2.5
3
3.5
4
2.465 0.5
1
1.5
2
2.5
3
3.5
4
Output Current IO (A) Line Regulation VO=3.5V
Load Current IO (A) VREF vs Junction Temperature 1.27 1.268 1.266
2.505 2.5 2.495 2.49 VO (V) 2.485 2.48 2.475 2.47 2.465
IO=0.5A
IO=2A
VREF (V) 3.2 3.3 VIN (V) 3.4 3.5 3.6
1.264 1.262 1.26
IO=4A
1.258 1.256 -50 -10 30 70 110 150
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3.1
Junction Temperature (C)
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EL7563C
EL7563C
Monolithic 4 Amp DC:DC Step-down Regulator
Typical Performance Curves
*Note: The 28-Pin HTSSOP Package Offers Improved Performance
Switching Frequency vs COSC 1000 900 800 700 FS (KHz) VPSHR 600 500 400 300 200 100 100 200 300 400 500 600 700 800 900 1000 0.9 1.3 1.5
VTJ vs Junction Temperature
1.1
0
25
50
75
100
125
150
COSC (pF) *JA vs Copper Area SO20 Package VIN VLX
Junction Temperature (C) Switching Waveforms VIN=3.3V, VO=1.8V, I O=4A
50 46 42 38
Thermal Resistance (C/W)
with no airflow
iL
with 100 LFPM airflow 34 30 Test Condition: Chip in the center of copper area 1 1.5 2 2.5
VO
1 oz. copper PCB used 3 3.5 4
PCB Copper Heat-Sinking Area (in2) Transient Response VIN=3.3V, VO=1.8V, IO=0.2A-4A Power-Up VIN=3.3V, VO=1.8V, I O=0.2A
IO
VO
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EL7563C
EL7563C
Monolithic 4 Amp DC:DC Step-down Regulator
Typical Performance Curves
Power-Down VIN=3.3V, VO=1.8V, IO=4A VIN Enable VIN=3.3V, VO=1.8V at 4A
EN VO VO
Disable VIN=3.3V, VO=1.8V at 4A EN
Short-Circuit Protection VIN=3.3V, VO=1.8V, IO=4A to short
IO
VO VO
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EL7563C
EL7563C
Monolithic 4 Amp DC:DC Step-down Regulator
Block Diagram
0.1F
390pF
VREF VTJ 2.2nF Controller Supply 22 VDD Junction Temperature Voltage Reference
COSC VDRV
D2
D4
Oscillator
0.22F VHI VIN D1 D3
3.3V
0.22F PWM Controller Drivers
Power FET Power FET PGND
0.22F 4.7H
0.1F VOUT (2.5V, 4A)
330F
1.58k 1k
2.2nF
EN STP STN Power Tracking VREF Current Sense +
PG
SGND
FB
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EL7563C
EL7563C
Monolithic 4 Amp DC:DC Step-down Regulator
Applications Information
Circuit Description General
The EL7563C is a fixed frequency, current mode controlled DC:DC converter with integrated N-channel power MOSFETs and a high precision reference. The device incorporates all the active circuitry required to implement a cost effective, user-programmable 4A synchronous step-down regulator suitable for use in DSP core power supplies. By combining fused-lead packaging technology with an efficient synchronous switching architecture, high power output (10W) can be realized without the use of discrete external heat sinks. output, the relatively large LC time constant found in power supply applications generally results in low bandwidth and poor transient response. By directly monitoring changes in inductor current via a series sense resistor the controller's response time is not entirely limited by the output LC filter and can react more quickly to changes in line and load conditions. This feed-forward characteristic also simplifies AC loop compensation since it adds a zero to the overall loop response. Through proper selection of the current-feedback to voltage-feedback ratio the overall loop response will approach a onepole system. The resulting system offers several advantages over traditional voltage control systems, including simpler loop compensation, pulse by pulse current limiting, rapid response to line variation and good load step response. The heart of the controller is an input direct summing comparator which sum voltage feedback, current feedback, slope compensation ramp and power tracking signals together. Slope compensation is required to prevent system instability that occurs in current-mode topologies operating at duty-cycles greater than 50% and is also used to define the open-loop gain of the overall system. The slope compensation is fixed internally and optimized for 500mA inductor ripple current. The power tracking will not contribute any input to the comparator steady-state operation. Current feedback is measured by the patented sensing scheme that senses the inductor current flowing through the high-side switch whenever it is conducting. At the beginning of each oscillator period the high-side NMOS switch is turned on. The comparator inputs are gated off for a minimum period of time of about 150ns (LEB) after the high-side switch is turned on to allow the system to settle. The Leading Edge Blanking (LEB) period prevents the detection of erroneous voltages at the comparator inputs due to switching noise. If the inductor current exceeds the maximum current limit (ILMAX) a secondary overcurrent comparator will terminate the high-side switch on time. If ILMAX has not been reached, the feedback voltage FB derived from the regulator output voltage VOUT is then compared to the internal feedback reference voltage. The resultant error voltage is summed with the current feedback and slope compensation ramp. The
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Theory of Operation
The EL7563C is composed of 7 major blocks: 1. PWM Controller 2. NMOS Power FETs and Drive Circuitry 3. Bandgap Reference 4. Oscillator 5. Temperature Sensor 6. Power Good and Power On Reset 7. Auxiliary Supply Tracking
PWM Controller
The EL7563C regulates output voltage through the use of current-mode controlled pulse width modulation. The three main elements in a PWM controller are the feedback loop and reference, a pulse width modulator whose duty cycle is controlled by the feedback error signal, and a filter which averages the logic level modulator output. In a step-down (buck) converter, the feedback loop forces the time-averaged output of the modulator to equal the desired output voltage. Unlike pure voltagemode control systems, current-mode control utilizes dual feedback loops to provide both output voltage and inductor current information to the controller. The voltage loop minimizes DC and transient errors in the output voltage by adjusting the PWM duty-cycle in response to changes in line or load conditions. Since the output voltage is equal to the time-averaged of the modulator
EL7563C
EL7563C
Monolithic 4 Amp DC:DC Step-down Regulator
high-side switch remains on until all four comparator inputs have summed to zero, at which time the high-side switch is turned off and the low-side switch is turned on. However, the maximum on-duty ratio of the high-side switch is limited to 95%. In order to eliminate cross-conduction of the high-side and low-side switches a 15ns break-before-make delay is incorporated in the switch drive circuitry. The output enable (EN) input allows the regulator output to be disabled by an external logic control signal. tor acts as the dominant pole of the amplifier and can be increased in size to maximize transient noise rejection. A value of 0.1F is recommended.
Oscillator
The system clock is generated by an internal relaxation oscillator with a maximum duty-cycle of approximately 95%. Operating frequency can be adjusted through the COSC pin or can be driven by an external source. If the oscillator is driven by an external source care must be taken in selecting the ramp amplitude. Since CSLOPE value is derived from the COSC ramp, changes to COSC ramp will change the CSLOPE compensation ramp which determine the open-loop gain of the system. When external synchronization is required, always choose COSC such that the free-running frequency is at least 20% lower than that of sync source to accommodate component and temperature variations. Figure 1 shows a typical connection.
1 2 3 390pF 5 6 7 8 9 10 EL7563C 20 19 18 16 15 14 13 12 11
Output Voltage Setting
In general:
R 2 V OUT = 0.992V x 1 + ------ R 1
However, due to the relatively low open loop gain of the system, gain errors will occur as the output voltage and loop-gain is changed. This is shown in the performance curves. A 100nA pull-up current from FB to VDD forces VOUT to GND in the event that FB is floating.
NMOS Power FETs and Drive Circuitry
The EL7563C integrates low on-resistance (30m) NMOS FETs to achieve high efficiency at 4A. In order to use an NMOS switch for the high-side drive it is necessary to drive the gate voltage above the source voltage (LX). This is accomplished by bootstrapping the VHI pin above the LX voltage with an external capacitor CVHI and internal switch and diode. When the low-side switch is turned on and the LX voltage is close to GND potential, capacitor CVHI is charged through internal switch to VDRV, typically 6V with external chargepump. At the beginning of the next cycle the high-side switch turns on and the LX pins begin to rise from GND to VIN potential. As the LX pin rises the positive plate of capacitor CVHI follows and eventually reaches a value of VDRV+VIN, typically 9V, for VIN=3.3V. This voltage is then level shifted and used to drive the gate of the high-side FET, via the VHI pin. A value of 0.22F for CVHI is recommended.
100pF External Oscillator
BAT54S
Figure 1. Oscillator Synchronization Junction Temperature Sensor
An internal temperature sensor continuously monitors die temperature. In the event that die temperature exceeds the thermal trip-point, the system is in fault state and will be shut down. The upper and low trip-points are set to 135C and 115C respectively. The VTJ pin is an accurate indication of the internal silicon junction temperature (see performance curve.) The
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Reference
A 1.5% temperature compensated bandgap reference is integrated in the EL7563C. The external VREF capaci-
EL7563C
EL7563C
Monolithic 4 Amp DC:DC Step-down Regulator
junction temperature TJ (C) can be deducted from the following relation:
1.2 - VTJ T J = 75 + ----------------------0.00384
comparator. A logic high on the PG output indicates that the regulated output voltage is within about +10% of the nominal selected output voltage.
Power Tracking
The power tracking pins STP and STN are the inputs to a comparator, whose HI output forces the PWM controller to skip switching cycle.
Where VTJ is the voltage at VTJ pin in volts.
Power Good and Power On Reset
During power up the output regulator will be disabled until VIN reaches a value of approximately 2.9V. About 300mV hysteresis is present to eliminate noise-induced oscillations. Under-voltage and over-voltage conditions on the regulator output are detected through an internal window
1. Linear Tracking
In this application, it is always the case that the lower voltage supply VC tracks the higher output supply VP. Please see Figure 2 below.
1 2 6 7 8 9 10 EL7563C
20 19 15 14 13 VP + 12 11 VOUT VC VC
1 2 6 7 8 9 10 EL7563C
20 19 15 14 13 12 11 VP
TIME
+ -
Figure 2. Linear Power Tracking
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EL7563C
EL7563C
Monolithic 4 Amp DC:DC Step-down Regulator
2. Offset Tracking
The intended start-up sequence is shown in Figure 3a. In this configuration, VC will not start until VP reaches a preset value of:
RB ------------------- x V IN RA + RB
However, due to the superimpose of VC and VIN, the choice of RA and RB are restricted by the following relationship:
RA RB V P + 0.5 < ------------------- x V IN + ------------------- x V C RA + RB RA + R B
Where 0.5 is for noise immunity. See Figure 3 below.
RB
1 2 6 VIN RA 7 8 9 10 STP STN + EL7563C
20 19 15 14 13 12 11 TIME VOUT VC VC VP
1 2 6 7 8 9 10 STP STN + EL7563C
20 19 15 14 13 12 11 VP
Figure 3. Offset Power Tracking
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EL7563C
EL7563C
Monolithic 4 Amp DC:DC Step-down Regulator
The second way of offset tracking is to use the EN and Power Good pins, as shown in Figure 4. In this configuration, VP does not have to be larger than VC.
1 2 3 5 6 7 8 9 10 EL7563C
EN 20 19 PG 18 16 15 14 13 12 11 VP VC VC
1 2 3 5 6 7 8 9 10 EL7563C
EN 20 19 PG 18 16 15 14 13 12 11 VP TIME
Figure 4. Offset Tracking
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EL7563C
EL7563C
Monolithic 4 Amp DC:DC Step-down Regulator
3. External Soft Start
An external soft start can be combined with auxilliary supply tracking to provide desired soft start other than internally preset soft start (Figure 5). The appropriate start-up time is:
VO t s = R x C x --------V IN
1 2 6 VIN 7 R 8 9 10 C STP STN + EL7563C
20 19 15 14 13 12 11 VOUT
Figure 5. External Soft Start
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EL7563C
EL7563C
Monolithic 4 Amp DC:DC Step-down Regulator
4. Start-up Delay
A capacitor can be added to the EN pin to delay the converter start-up (Figure 6) by utilizing the pull-up current. The delay time is approximately:
t d ( ms ) = 1200 x C ( F )
1 2 6 7 8 9 10 STP STN + EL7563C
20 C 19 15 14 VIN 13 12 11 TIME VO td VOUT
Figure 6. Start-up Delay
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EL7563C
EL7563C
Monolithic 4 Amp DC:DC Step-down Regulator
Thermal Management
The EL7563C utilizes "fused lead" packaging technology in conjunction with the system board layout to achieve a lower thermal resistance than typically found in standard SO20 packages. By fusing (or connecting) multiple external leads to the die substrate within the package, a very conductive heat path is created to the outside of the package. This conductive heat path MUST then be connected to a heat sinking area on the PCB in order to dissipate heat out and away from the device. The conductive paths for the EL7563CM package are the fused leads: # 6, 7, 11, 12, and 13. If a sufficient amount of PCB metal area is connected to the fused package leads, a junction-to-ambient resistance of 43C/W can be achieved (compared to 85C/W for a standard SO20 package). The general relationship between PCB heat-sinking metal area and the thermal resistance for this package is shown in the Performance Curves section of this data sheet. It can be readily seen that the thermal resistance for this package approaches an asymptotic value of approximately 43C/W without any airflow, and 33C/W with 100 LFPM airflow. Additional information can be found in Application Note #8 (Measuring the Thermal Resistance of Power SurfaceMount Packages). For a thermal shutdown die junction temperature of 135C, and power dissipation of 1.5W, the ambient temperature can be as high as 70C without airflow. With 100 LFPM airflow, the ambient temperature can be extended to 85C. The EL7563CRE utilizes the 28-pin HTSSOP package. The majority if heat is dissipated through the heat pad exposed at the bottom of the package. Therefore, the heat pad needs to be soldered to the PCB. The thermal resistance for this package is better than that of the SO20. Actual test results are available from Elantec Applications staff. The actual junction temperature can be measured at VTJ pin. Since the thermal performance of the IC is heavily dependent on the board layout, the system designer should exercise care during the design phase to ensure that the IC will operate under the worst-case environmental conditions.
Layout Considerations
The layout is very important for the converter to function properly. Power Ground ( ) and Signal Ground (---) should be separated to ensure that the high pulse current in the Power Ground never interferes with the sensitive signals connected to Signal Ground. They should only be connected at one point (normally at the negative side of either the input or output capacitor.) The trace connected to the FB pin is the most sensitive trace. It needs to be as short as possible and in a "quiet" place, preferably between PGND or SGND traces. In addition, the bypass capacitor connected to the VDD pin needs to be as close to the pin as possible. The heat of the chip is mainly dissipated through the PGND pins. Maximizing the copper area around these pins is preferable. In addition, a solid ground plane is always helpful for the EMI performance. The demo board is a good example of layout based on these principles. Please refer to the EL7563C Application Brief for the layout.
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EL7563C
EL7563C
Monolithic 4 Amp DC:DC Step-down Regulator
Package Outline Drawing
NOTE: The package drawing shown here may not be the latest version. For the latest revision, please refer to the Elantec website at http://www.elantec.com/pages/package_outline.html
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EL7563C
EL7563C
Monolithic 4 Amp DC:DC Step-down Regulator
General Disclaimer
Specifications contained in this data sheet are in effect as of the publication date shown. Elantec, Inc. reserves the right to make changes in the circuitry or specifications contained herein at any time without notice. Elantec, Inc. assumes no responsibility for the use of any circuits described herein and makes no representations that they are free from patent infringement.
WARNING - Life Support Policy
Elantec, Inc. products are not authorized for and should not be used within Life Support Systems without the specific written consent of Elantec, Inc. Life Support systems are equipment intended to support or sustain life and whose failure to perform when properly used in accordance with instructions provided can be reasonably expected to result in significant personal injury or death. Users contemplating application of Elantec, Inc. Products in Life Support Systems are requested to contact Elantec, Inc. factory headquarters to establish suitable terms & conditions for these applications. Elantec, Inc.'s warranty is limited to replacement of defective components and does not cover injury to persons or property or other consequential damages.
Printed in U.S.A.
October 5, 2001
Elantec Semiconductor, Inc.
675 Trade Zone Blvd. Milpitas, CA 95035 Telephone: (408) 945-1323 (888) ELANTEC Fax: (408) 945-9305 European Office: +44-118-977-6020 Japan Technical Center: +81-45-682-5820
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